[PATCH v3 0/1] drm/amd/pm: restore the forced performance level after a reset

[PATCH v3 0/1] drm/amd/pm: restore the forced performance level after a reset

[Priya Hosur]

After a GPU reset the level reported through
power_dpm_force_performance_level no longer matches the hardware. The reset
reinitialises PMFW, which comes back on its default curve, while
smu_dpm.dpm_level still holds the level the user forced.

On an SMU 14.0.1 APU this shows up as gfxclk dropping from 2.8GHz to 600MHz
while sysfs still reports high, with no thermal or power event involved.

smu_late_init() already tries to re-apply the level after the reset through
AMD_PP_TASK_COMPLETE_INIT, but smu_adjust_power_state_dynamic() compares
the cached level against itself and force_performance_level is false for
that task, so the hardware is never programmed.

amdgpu_dpm_reapply_umd_profile() covers the PROFILE_* levels after
recovery, but returns early for high, low and manual.

v3 forces the level to be programmed for AMD_PP_TASK_COMPLETE_INIT during
reset recovery, using the existing force_performance_level argument.

Tested on an SMU 14.0.1 APU (PMFW 100.113.0) on amd-staging-drm-next,
triggering resets through debugfs/amdgpu_gpu_recover and reading the level
and gfxclk before and after each reset:

  without this patch
  level              before    reset 1   reset 2   reset 3
  high               2449MHz    630MHz    600MHz    600MHz

  with this patch
  level              before    reset 1   reset 2   reset 3
  high               2446MHz   2794MHz   2796MHz   2794MHz
  low                1399MHz    604MHz    600MHz    600MHz
  manual              600MHz    600MHz    601MHz    601MHz
  profile_peak       2016MHz   2289MHz   2137MHz   1644MHz
  profile_standard    834MHz    700MHz    700MHz    700MHz
  auto                636MHz    601MHz    600MHz    600MHz

The level is retained across every reset, and auto is left on its own
curve. The "before" sample is taken one second after the level is written.
The profile_peak readings vary from sample to sample both with and without
this patch. 18 MODE2 resets over the run, with no errors in the kernel log.

An s2idle cycle also keeps the level: high at 2667MHz before suspend, high
at 2799MHz after resume.

This is the only configuration I have available to test. The change is in
generic SMU code, so it applies to every ASIC going through
smu_late_init().

v3:
  - Use the existing force_performance_level argument of
    smu_adjust_power_state_dynamic() for AMD_PP_TASK_COMPLETE_INIT during
    reset recovery, instead of switching the cached level to AUTO first
  - The cached level is no longer modified, so if programming fails the
    level the user asked for is still retained and the failure is logged
  - Rebased on amd-staging-drm-next, which now includes Kevin's
    "drm/amd/pm: reapply umd profile state after recovery"
  - Explain in the commit message why that path does not cover high,
    low and manual (Kevin's question on v2)
  - Add test results without the patch on the same base

v2:
  - Restore the forced level after the reset instead of reporting the
    default, as the driver is expected to keep the level the user asked
    for and the reset often goes unnoticed (Lijo)
  - Link: https://lore.kernel.org/amd-gfx/20261008104026.4102222-1-Priya.Hosur@amd.com/

v1:
  - Reset the cached level to AUTO after a reset so that sysfs reports the
    level PMFW is actually running at
  - Link: https://lore.kernel.org/amd-gfx/20261007122103.4019578-1-Priya.Hosur@amd.com/

Priya Hosur (1):
  drm/amd/pm: restore the forced performance level after a reset

 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

-- 
2.43.0

[PATCH v3 1/1] drm/amd/pm: restore the forced performance level after a reset

[Priya Hosur]

smu_late_init() re-applies the DPM level with

  smu_handle_task(smu, smu->smu_dpm.dpm_level, AMD_PP_TASK_COMPLETE_INIT);

but smu_adjust_power_state_dynamic() only programs the hardware when

  if (force_performance_level || smu_dpm_ctx->dpm_level != level)

AMD_PP_TASK_COMPLETE_INIT passes force_performance_level = false and
smu_dpm_ctx is &smu->smu_dpm, so the level is compared against itself and
smu_asic_set_performance_level() is never called.

PMFW is reinitialised by a reset and comes back on its default curve, while
smu_dpm.dpm_level still holds the level the user forced. The device then
runs at the default level while sysfs keeps reporting the forced one. On an
SMU 14.0.1 APU gfxclk drops from 2.8GHz to 600MHz while sysfs still reports
high. Writing the same level again does not help either, as
amdgpu_dpm_force_performance_level() returns early when the requested level
matches the cached one.

amdgpu_dpm_reapply_umd_profile() restores the PROFILE_* levels after
recovery, but returns early for any other level, so high, low and manual
are left on the PMFW default.

Force the level to be programmed for AMD_PP_TASK_COMPLETE_INIT during reset
recovery. The cached level is left untouched, so if programming fails the
level the user asked for is still retained and the failure is logged.

Signed-off-by: Priya Hosur <Priya.Hosur@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index a901f8535598..654ff6824fdd 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2553,7 +2553,12 @@ static int smu_handle_task(struct smu_context *smu,
 		ret = smu_adjust_power_state_dynamic(smu, level, false, false);
 		break;
 	case AMD_PP_TASK_COMPLETE_INIT:
-		ret = smu_adjust_power_state_dynamic(smu, level, true, false);
+		/*
+		 * PMFW is reinitialised by a reset, so program the retained
+		 * level again even though it matches the cached one.
+		 */
+		ret = smu_adjust_power_state_dynamic(smu, level, true,
+						     amdgpu_reset_in_recovery(smu->adev));
 		break;
 	case AMD_PP_TASK_READJUST_POWER_STATE:
 		ret = smu_adjust_power_state_dynamic(smu, level, true, false);
-- 
2.43.0

Re: [PATCH v3 1/1] drm/amd/pm: restore the forced performance level after a reset

[Lazar, Lijo]

On 03-Nov-26 3:58 PM, Priya Hosur wrote:
> smu_late_init() re-applies the DPM level with
> 
>    smu_handle_task(smu, smu->smu_dpm.dpm_level, AMD_PP_TASK_COMPLETE_INIT);
> 
> but smu_adjust_power_state_dynamic() only programs the hardware when
> 
>    if (force_performance_level || smu_dpm_ctx->dpm_level != level)
> 
> AMD_PP_TASK_COMPLETE_INIT passes force_performance_level = false and
> smu_dpm_ctx is &smu->smu_dpm, so the level is compared against itself and
> smu_asic_set_performance_level() is never called.
> 
> PMFW is reinitialised by a reset and comes back on its default curve, while
> smu_dpm.dpm_level still holds the level the user forced. The device then
> runs at the default level while sysfs keeps reporting the forced one. On an
> SMU 14.0.1 APU gfxclk drops from 2.8GHz to 600MHz while sysfs still reports
> high. Writing the same level again does not help either, as
> amdgpu_dpm_force_performance_level() returns early when the requested level
> matches the cached one.
> 
> amdgpu_dpm_reapply_umd_profile() restores the PROFILE_* levels after
> recovery, but returns early for any other level, so high, low and manual
> are left on the PMFW default.
> 
> Force the level to be programmed for AMD_PP_TASK_COMPLETE_INIT during reset
> recovery. The cached level is left untouched, so if programming fails the
> level the user asked for is still retained and the failure is logged.
> 
> Signed-off-by: Priya Hosur <Priya.Hosur@amd.com>
> ---
>   drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 ++++++-
>   1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index a901f8535598..654ff6824fdd 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -2553,7 +2553,12 @@ static int smu_handle_task(struct smu_context *smu,
>   		ret = smu_adjust_power_state_dynamic(smu, level, false, false);
>   		break;
>   	case AMD_PP_TASK_COMPLETE_INIT:
> -		ret = smu_adjust_power_state_dynamic(smu, level, true, false);
> +		/*
> +		 * PMFW is reinitialised by a reset, so program the retained
> +		 * level again even though it matches the cached one.
> +		 */
> +		ret = smu_adjust_power_state_dynamic(smu, level, true,
> +						     amdgpu_reset_in_recovery(smu->adev));
>   		break;

There is already a reapply profile to handle this.

Does it work if you replace the current smu_reapply_power_state_dynamic 
by calling smu_adjust_power_state_dynamic(smu, level, true, true)?

Thanks,
Lijo

>   	case AMD_PP_TASK_READJUST_POWER_STATE:
>   		ret = smu_adjust_power_state_dynamic(smu, level, true, false);

Re: [PATCH v3 1/1] drm/amd/pm: restore the forced performance level after a reset

[Lazar, Lijo]

On 03-Nov-26 4:11 PM, Lazar, Lijo wrote:
> 
> 
> On 03-Nov-26 3:58 PM, Priya Hosur wrote:
>> smu_late_init() re-applies the DPM level with
>>
>>    smu_handle_task(smu, smu->smu_dpm.dpm_level, 
>> AMD_PP_TASK_COMPLETE_INIT);
>>
>> but smu_adjust_power_state_dynamic() only programs the hardware when
>>
>>    if (force_performance_level || smu_dpm_ctx->dpm_level != level)
>>
>> AMD_PP_TASK_COMPLETE_INIT passes force_performance_level = false and
>> smu_dpm_ctx is &smu->smu_dpm, so the level is compared against itself and
>> smu_asic_set_performance_level() is never called.
>>
>> PMFW is reinitialised by a reset and comes back on its default curve, 
>> while
>> smu_dpm.dpm_level still holds the level the user forced. The device then
>> runs at the default level while sysfs keeps reporting the forced one. 
>> On an
>> SMU 14.0.1 APU gfxclk drops from 2.8GHz to 600MHz while sysfs still 
>> reports
>> high. Writing the same level again does not help either, as
>> amdgpu_dpm_force_performance_level() returns early when the requested 
>> level
>> matches the cached one.
>>
>> amdgpu_dpm_reapply_umd_profile() restores the PROFILE_* levels after
>> recovery, but returns early for any other level, so high, low and manual
>> are left on the PMFW default.
>>
>> Force the level to be programmed for AMD_PP_TASK_COMPLETE_INIT during 
>> reset
>> recovery. The cached level is left untouched, so if programming fails the
>> level the user asked for is still retained and the failure is logged.
>>
>> Signed-off-by: Priya Hosur <Priya.Hosur@amd.com>
>> ---
>>   drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 ++++++-
>>   1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/ 
>> drm/amd/pm/swsmu/amdgpu_smu.c
>> index a901f8535598..654ff6824fdd 100644
>> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
>> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
>> @@ -2553,7 +2553,12 @@ static int smu_handle_task(struct smu_context 
>> *smu,
>>           ret = smu_adjust_power_state_dynamic(smu, level, false, false);
>>           break;
>>       case AMD_PP_TASK_COMPLETE_INIT:
>> -        ret = smu_adjust_power_state_dynamic(smu, level, true, false);
>> +        /*
>> +         * PMFW is reinitialised by a reset, so program the retained
>> +         * level again even though it matches the cached one.
>> +         */
>> +        ret = smu_adjust_power_state_dynamic(smu, level, true,
>> +                             amdgpu_reset_in_recovery(smu->adev));
>>           break;
> 
> There is already a reapply profile to handle this.
> 
> Does it work if you replace the current smu_reapply_power_state_dynamic 
> by calling smu_adjust_power_state_dynamic(smu, level, true, true)?
> 

To be clear - replace the logic in the current 
smu_reapply_power_state_dynamic.

Thanks,
Lijo
> Thanks,
> Lijo
> 
>>       case AMD_PP_TASK_READJUST_POWER_STATE:
>>           ret = smu_adjust_power_state_dynamic(smu, level, true, false);
> 

RE: [PATCH v3 1/1] drm/amd/pm: restore the forced performance level after a reset

[Wang, Kevin]

AMD General

  case AMD_PP_TASK_COMPLETE_INIT:
        if (amdgpu_reset_in_recovery(smu->adev))
                ret = smu_reapply_power_state_dynamic(smu, level);
        else
                ret = smu_adjust_power_state_dynamic(smu, level, true,
                                                     false);
        break;

how about use above logic to handle this case? If no concern, the patch is

Reviewed-by: Kevin Wang <kevin.wang@amd.com>

Btw, please add 'Fixes' tag in your commit message.


Best Regards,
Kevin

> -----Original Message-----
> From: Lazar, Lijo <Lijo.Lazar@amd.com>
> Sent: Tuesday, November 3, 2026 6:44 PM
> To: Hosur, Priya <Priya.Hosur@amd.com>; amd-gfx@lists.freedesktop.org;
> Deucher, Alexander <Alexander.Deucher@amd.com>; Wang, Kevin
> <Kevin.Wang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>;
> Kuehling, Felix <Felix.Kuehling@amd.com>
> Cc: Gopalakrishnan, Veerabadhran (Veera)
> <Veerabadhran.Gopalakrishnan@amd.com>; Vishwakarma, Pratik
> <Pratik.Vishwakarma@amd.com>
> Subject: Re: [PATCH v3 1/1] drm/amd/pm: restore the forced performance
> level after a reset
>
>
>
> On 03-Nov-26 4:11 PM, Lazar, Lijo wrote:
> >
> >
> > On 03-Nov-26 3:58 PM, Priya Hosur wrote:
> >> smu_late_init() re-applies the DPM level with
> >>
> >>    smu_handle_task(smu, smu->smu_dpm.dpm_level,
> >> AMD_PP_TASK_COMPLETE_INIT);
> >>
> >> but smu_adjust_power_state_dynamic() only programs the hardware
> when
> >>
> >>    if (force_performance_level || smu_dpm_ctx->dpm_level != level)
> >>
> >> AMD_PP_TASK_COMPLETE_INIT passes force_performance_level = false
> and
> >> smu_dpm_ctx is &smu->smu_dpm, so the level is compared against itself
> >> and
> >> smu_asic_set_performance_level() is never called.
> >>
> >> PMFW is reinitialised by a reset and comes back on its default curve,
> >> while smu_dpm.dpm_level still holds the level the user forced. The
> >> device then runs at the default level while sysfs keeps reporting the
> >> forced one.
> >> On an
> >> SMU 14.0.1 APU gfxclk drops from 2.8GHz to 600MHz while sysfs still
> >> reports high. Writing the same level again does not help either, as
> >> amdgpu_dpm_force_performance_level() returns early when the
> requested
> >> level matches the cached one.
> >>
> >> amdgpu_dpm_reapply_umd_profile() restores the PROFILE_* levels after
> >> recovery, but returns early for any other level, so high, low and
> >> manual are left on the PMFW default.
> >>
> >> Force the level to be programmed for AMD_PP_TASK_COMPLETE_INIT
> during
> >> reset recovery. The cached level is left untouched, so if programming
> >> fails the level the user asked for is still retained and the failure
> >> is logged.
> >>
> >> Signed-off-by: Priya Hosur <Priya.Hosur@amd.com>
> >> ---
> >>   drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 ++++++-
> >>   1 file changed, 6 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/
> >> drm/amd/pm/swsmu/amdgpu_smu.c index a901f8535598..654ff6824fdd
> 100644
> >> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> >> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> >> @@ -2553,7 +2553,12 @@ static int smu_handle_task(struct smu_context
> >> *smu,
> >>           ret = smu_adjust_power_state_dynamic(smu, level, false,
> >> false);
> >>           break;
> >>       case AMD_PP_TASK_COMPLETE_INIT:
> >> -        ret = smu_adjust_power_state_dynamic(smu, level, true,
> >> false);
> >> +        /*
> >> +         * PMFW is reinitialised by a reset, so program the retained
> >> +         * level again even though it matches the cached one.
> >> +         */
> >> +        ret = smu_adjust_power_state_dynamic(smu, level, true,
> >> +                             amdgpu_reset_in_recovery(smu->adev));
> >>           break;
> >
> > There is already a reapply profile to handle this.
> >
> > Does it work if you replace the current
> > smu_reapply_power_state_dynamic by calling
> smu_adjust_power_state_dynamic(smu, level, true, true)?
> >
>
> To be clear - replace the logic in the current
> smu_reapply_power_state_dynamic.
>
> Thanks,
> Lijo
> > Thanks,
> > Lijo
> >
> >>       case AMD_PP_TASK_READJUST_POWER_STATE:
> >>           ret = smu_adjust_power_state_dynamic(smu, level, true,
> >> false);
> >

Re: [PATCH v3 1/1] drm/amd/pm: restore the forced performance level after a reset

[Lazar, Lijo]

On 03-Nov-26 5:07 PM, Wang, Kevin wrote:
> AMD General
> 
>    case AMD_PP_TASK_COMPLETE_INIT:
>          if (amdgpu_reset_in_recovery(smu->adev))
>                  ret = smu_reapply_power_state_dynamic(smu, level);
>          else
>                  ret = smu_adjust_power_state_dynamic(smu, level, true,
>                                                       false);
>          break;
> 
> how about use above logic to handle this case? If no concern, the patch is
> 
> Reviewed-by: Kevin Wang <kevin.wang@amd.com>
> 
> Btw, please add 'Fixes' tag in your commit message.
> 

I think it's better to apply it through the common path than keeping two 
different places for restoring perf level.

amdgpu_dpm_reapply_umd_profile() => amdgpu_dpm_reapply_performance_level.

For non-profile levels, it could call reapply directly.

Thanks,
Lijo
> 
> Best Regards,
> Kevin
> 
>> -----Original Message-----
>> From: Lazar, Lijo <Lijo.Lazar@amd.com>
>> Sent: Tuesday, November 3, 2026 6:44 PM
>> To: Hosur, Priya <Priya.Hosur@amd.com>; amd-gfx@lists.freedesktop.org;
>> Deucher, Alexander <Alexander.Deucher@amd.com>; Wang, Kevin
>> <Kevin.Wang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>;
>> Kuehling, Felix <Felix.Kuehling@amd.com>
>> Cc: Gopalakrishnan, Veerabadhran (Veera)
>> <Veerabadhran.Gopalakrishnan@amd.com>; Vishwakarma, Pratik
>> <Pratik.Vishwakarma@amd.com>
>> Subject: Re: [PATCH v3 1/1] drm/amd/pm: restore the forced performance
>> level after a reset
>>
>>
>>
>> On 03-Nov-26 4:11 PM, Lazar, Lijo wrote:
>>>
>>>
>>> On 03-Nov-26 3:58 PM, Priya Hosur wrote:
>>>> smu_late_init() re-applies the DPM level with
>>>>
>>>>     smu_handle_task(smu, smu->smu_dpm.dpm_level,
>>>> AMD_PP_TASK_COMPLETE_INIT);
>>>>
>>>> but smu_adjust_power_state_dynamic() only programs the hardware
>> when
>>>>
>>>>     if (force_performance_level || smu_dpm_ctx->dpm_level != level)
>>>>
>>>> AMD_PP_TASK_COMPLETE_INIT passes force_performance_level = false
>> and
>>>> smu_dpm_ctx is &smu->smu_dpm, so the level is compared against itself
>>>> and
>>>> smu_asic_set_performance_level() is never called.
>>>>
>>>> PMFW is reinitialised by a reset and comes back on its default curve,
>>>> while smu_dpm.dpm_level still holds the level the user forced. The
>>>> device then runs at the default level while sysfs keeps reporting the
>>>> forced one.
>>>> On an
>>>> SMU 14.0.1 APU gfxclk drops from 2.8GHz to 600MHz while sysfs still
>>>> reports high. Writing the same level again does not help either, as
>>>> amdgpu_dpm_force_performance_level() returns early when the
>> requested
>>>> level matches the cached one.
>>>>
>>>> amdgpu_dpm_reapply_umd_profile() restores the PROFILE_* levels after
>>>> recovery, but returns early for any other level, so high, low and
>>>> manual are left on the PMFW default.
>>>>
>>>> Force the level to be programmed for AMD_PP_TASK_COMPLETE_INIT
>> during
>>>> reset recovery. The cached level is left untouched, so if programming
>>>> fails the level the user asked for is still retained and the failure
>>>> is logged.
>>>>
>>>> Signed-off-by: Priya Hosur <Priya.Hosur@amd.com>
>>>> ---
>>>>    drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 ++++++-
>>>>    1 file changed, 6 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
>> b/drivers/gpu/
>>>> drm/amd/pm/swsmu/amdgpu_smu.c index a901f8535598..654ff6824fdd
>> 100644
>>>> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
>>>> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
>>>> @@ -2553,7 +2553,12 @@ static int smu_handle_task(struct smu_context
>>>> *smu,
>>>>            ret = smu_adjust_power_state_dynamic(smu, level, false,
>>>> false);
>>>>            break;
>>>>        case AMD_PP_TASK_COMPLETE_INIT:
>>>> -        ret = smu_adjust_power_state_dynamic(smu, level, true,
>>>> false);
>>>> +        /*
>>>> +         * PMFW is reinitialised by a reset, so program the retained
>>>> +         * level again even though it matches the cached one.
>>>> +         */
>>>> +        ret = smu_adjust_power_state_dynamic(smu, level, true,
>>>> +                             amdgpu_reset_in_recovery(smu->adev));
>>>>            break;
>>>
>>> There is already a reapply profile to handle this.
>>>
>>> Does it work if you replace the current
>>> smu_reapply_power_state_dynamic by calling
>> smu_adjust_power_state_dynamic(smu, level, true, true)?
>>>
>>
>> To be clear - replace the logic in the current
>> smu_reapply_power_state_dynamic.
>>
>> Thanks,
>> Lijo
>>> Thanks,
>>> Lijo
>>>
>>>>        case AMD_PP_TASK_READJUST_POWER_STATE:
>>>>            ret = smu_adjust_power_state_dynamic(smu, level, true,
>>>> false);
>>>
>