From: Krzysztof Kozlowski <krzk@kernel.org>
To: Xianwei Zhao <xianwei.zhao@amlogic.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Bartosz Golaszewski <brgl@bgdev.pl>,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org
Subject: Re: [PATCH v3 1/5] dt-bindings: pinctrl: Add support for Amlogic SoCs
Date: Mon, 20 Jan 2025 08:21:49 +0100 [thread overview]
Message-ID: <d08136ac-e08f-4e5d-b562-78529f34d86f@kernel.org> (raw)
In-Reply-To: <012cfaca-e8f5-4614-9393-a4a46a797adb@amlogic.com>
On 20/01/2025 06:57, Xianwei Zhao wrote:
> Hi Krzysztof,
> Thanks for reply.
>
> On 2025/1/17 16:48, Krzysztof Kozlowski wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On Wed, Jan 15, 2025 at 02:41:59PM +0800, Xianwei Zhao wrote:
>>> +properties:
>>> + compatible:
>>> + const: amlogic,pinctrl-a4
>>> +
>>> + "#address-cells":
>>> + const: 2
>>> +
>>> + "#size-cells":
>>> + const: 2
>>
>> Why this moved to '2'? 32-bit was not enough?
>>
> Previously only represented a register address offset value, now
> directly represents a register, through 'ranges" which to represent.
> 32-bit is enough, but since APB bus is defined as 64-bit, here is
Changelog was silent on this.
> following. I increase support for 32-bit. Like the following values:
No, just keep one of these.
Best regards,
Krzysztof
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linux-amlogic@lists.infradead.org
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WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Xianwei Zhao <xianwei.zhao@amlogic.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Bartosz Golaszewski <brgl@bgdev.pl>,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org
Subject: Re: [PATCH v3 1/5] dt-bindings: pinctrl: Add support for Amlogic SoCs
Date: Mon, 20 Jan 2025 08:21:49 +0100 [thread overview]
Message-ID: <d08136ac-e08f-4e5d-b562-78529f34d86f@kernel.org> (raw)
In-Reply-To: <012cfaca-e8f5-4614-9393-a4a46a797adb@amlogic.com>
On 20/01/2025 06:57, Xianwei Zhao wrote:
> Hi Krzysztof,
> Thanks for reply.
>
> On 2025/1/17 16:48, Krzysztof Kozlowski wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On Wed, Jan 15, 2025 at 02:41:59PM +0800, Xianwei Zhao wrote:
>>> +properties:
>>> + compatible:
>>> + const: amlogic,pinctrl-a4
>>> +
>>> + "#address-cells":
>>> + const: 2
>>> +
>>> + "#size-cells":
>>> + const: 2
>>
>> Why this moved to '2'? 32-bit was not enough?
>>
> Previously only represented a register address offset value, now
> directly represents a register, through 'ranges" which to represent.
> 32-bit is enough, but since APB bus is defined as 64-bit, here is
Changelog was silent on this.
> following. I increase support for 32-bit. Like the following values:
No, just keep one of these.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-01-20 7:24 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-15 6:41 [PATCH v3 0/5] Pinctrl: Add Amlogic pinctrl driver Xianwei Zhao
2025-01-15 6:41 ` Xianwei Zhao via B4 Relay
2025-01-15 6:41 ` Xianwei Zhao via B4 Relay
2025-01-15 6:41 ` [PATCH v3 1/5] dt-bindings: pinctrl: Add support for Amlogic SoCs Xianwei Zhao
2025-01-15 6:41 ` Xianwei Zhao via B4 Relay
2025-01-15 6:41 ` Xianwei Zhao via B4 Relay
2025-01-17 8:48 ` Krzysztof Kozlowski
2025-01-17 8:48 ` Krzysztof Kozlowski
2025-01-20 5:57 ` Xianwei Zhao
2025-01-20 5:57 ` Xianwei Zhao
2025-01-20 7:21 ` Krzysztof Kozlowski [this message]
2025-01-20 7:21 ` Krzysztof Kozlowski
2025-01-15 6:42 ` [PATCH v3 2/5] pinctrl: pinconf-generic: Add API for pinmux propertity in DTS file Xianwei Zhao
2025-01-15 6:42 ` Xianwei Zhao via B4 Relay
2025-01-15 6:42 ` Xianwei Zhao via B4 Relay
2025-01-15 6:42 ` [PATCH v3 3/5] pinctrl: Add driver support for Amlogic SoCs Xianwei Zhao
2025-01-15 6:42 ` Xianwei Zhao via B4 Relay
2025-01-15 6:42 ` Xianwei Zhao via B4 Relay
2025-01-15 6:42 ` [PATCH v3 4/5] arm64: dts: amlogic: a4: add pinctrl node Xianwei Zhao
2025-01-15 6:42 ` Xianwei Zhao via B4 Relay
2025-01-15 6:42 ` Xianwei Zhao via B4 Relay
2025-01-17 8:41 ` Krzysztof Kozlowski
2025-01-17 8:41 ` Krzysztof Kozlowski
2025-01-20 6:00 ` Xianwei Zhao
2025-01-20 6:00 ` Xianwei Zhao
2025-01-15 6:42 ` [PATCH v3 5/5] MAINTAINERS: Add an entry for Amlogic pinctrl driver Xianwei Zhao
2025-01-15 6:42 ` Xianwei Zhao via B4 Relay
2025-01-15 6:42 ` Xianwei Zhao via B4 Relay
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