* [PATCH 0/4] Assorted fixes/tweaks to GuC support
@ 2021-12-03 0:06 ` John.C.Harrison
0 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Fix a potential null pointer dereference, improve debug crash reports,
improve code separation, improve GuC/HuC load performance.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
John Harrison (3):
drm/i915/uc: Allow platforms to have GuC but not HuC
drm/i915/guc: Increase GuC log size for CONFIG_DEBUG_GEM
drm/i915/guc: Don't go bang in GuC log if no GuC
Vinay Belgaumkar (1):
drm/i915/guc: Request RP0 before loading firmware
drivers/gpu/drm/i915/gt/intel_rps.c | 59 ++++++++++++
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_guc_log.h | 5 +-
.../drm/i915/gt/uc/intel_guc_log_debugfs.c | 4 +-
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 6 ++
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 93 +++++++++++++------
drivers/gpu/drm/i915/i915_reg.h | 4 +
7 files changed, 140 insertions(+), 33 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 23+ messages in thread
* [Intel-gfx] [PATCH 1/4] drm/i915/uc: Allow platforms to have GuC but not HuC
2021-12-03 0:06 ` John.C.Harrison
@ 2021-12-03 0:06 ` John.C.Harrison
-1 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
It is possible for platforms to require GuC but not HuC firmware.
Also, the firmware versions for GuC and HuC advance independently. So
split the macros up to allow the lists to be maintained separately.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 93 ++++++++++++++++--------
1 file changed, 63 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 3aa87be4f2e4..a7788ce50736 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -48,22 +48,39 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* Note that RKL and ADL-S have the same GuC/HuC device ID's and use the same
* firmware as TGL.
*/
-#define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
- fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3), huc_def(tgl, 7, 9, 3)) \
- fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 9, 3)) \
- fw_def(DG1, 0, guc_def(dg1, 62, 0, 0), huc_def(dg1, 7, 9, 3)) \
- fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 9, 3)) \
- fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 9, 3)) \
- fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0), huc_def(ehl, 9, 0, 0)) \
- fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0), huc_def(ehl, 9, 0, 0)) \
- fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0), huc_def(icl, 9, 0, 0)) \
- fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0), huc_def(cml, 4, 0, 0)) \
- fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0), huc_def(glk, 4, 0, 0)) \
- fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0), huc_def(bxt, 2, 0, 0)) \
- fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0), huc_def(skl, 2, 0, 0))
+#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
+ fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3)) \
+ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(DG1, 0, guc_def(dg1, 62, 0, 0)) \
+ fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0)) \
+ fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0)) \
+ fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0))
+
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
+ fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(ALDERLAKE_S, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(DG1, 0, huc_def(dg1, 7, 9, 3)) \
+ fw_def(ROCKETLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(TIGERLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(JASPERLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, huc_def(icl, 9, 0, 0)) \
+ fw_def(COMETLAKE, 5, huc_def(cml, 4, 0, 0)) \
+ fw_def(COMETLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, huc_def(skl, 2, 0, 0))
#define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
"i915/" \
@@ -79,11 +96,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
__MAKE_UC_FW_PATH(prefix_, "_huc_", major_, minor_, bld_num_)
/* All blobs need to be declared via MODULE_FIRMWARE() */
-#define INTEL_UC_MODULE_FW(platform_, revid_, guc_, huc_) \
- MODULE_FIRMWARE(guc_); \
- MODULE_FIRMWARE(huc_);
+#define INTEL_UC_MODULE_FW(platform_, revid_, uc_) \
+ MODULE_FIRMWARE(uc_);
-INTEL_UC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH, MAKE_HUC_FW_PATH)
+INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH)
+INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH)
/* The below structs and macros are used to iterate across the list of blobs */
struct __packed uc_fw_blob {
@@ -106,31 +123,47 @@ struct __packed uc_fw_blob {
struct __packed uc_fw_platform_requirement {
enum intel_platform p;
u8 rev; /* first platform rev using this FW */
- const struct uc_fw_blob blobs[INTEL_UC_FW_NUM_TYPES];
+ const struct uc_fw_blob blob;
};
-#define MAKE_FW_LIST(platform_, revid_, guc_, huc_) \
+#define MAKE_FW_LIST(platform_, revid_, uc_) \
{ \
.p = INTEL_##platform_, \
.rev = revid_, \
- .blobs[INTEL_UC_FW_TYPE_GUC] = guc_, \
- .blobs[INTEL_UC_FW_TYPE_HUC] = huc_, \
+ .blob = uc_, \
},
+struct fw_blobs_by_type {
+ const struct uc_fw_platform_requirement *blobs;
+ u32 count;
+};
+
static void
__uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
{
- static const struct uc_fw_platform_requirement fw_blobs[] = {
- INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB)
+ static const struct uc_fw_platform_requirement blobs_guc[] = {
+ INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB)
+ };
+ static const struct uc_fw_platform_requirement blobs_huc[] = {
+ INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB)
};
+ static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = {
+ [INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) },
+ [INTEL_UC_FW_TYPE_HUC] = { blobs_huc, ARRAY_SIZE(blobs_huc) },
+ };
+ static const struct uc_fw_platform_requirement *fw_blobs;
enum intel_platform p = INTEL_INFO(i915)->platform;
+ u32 fw_count;
u8 rev = INTEL_REVID(i915);
int i;
- for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) {
+ GEM_BUG_ON(uc_fw->type >= ARRAY_SIZE(blobs_all));
+ fw_blobs = blobs_all[uc_fw->type].blobs;
+ fw_count = blobs_all[uc_fw->type].count;
+
+ for (i = 0; i < fw_count && p <= fw_blobs[i].p; i++) {
if (p == fw_blobs[i].p && rev >= fw_blobs[i].rev) {
- const struct uc_fw_blob *blob =
- &fw_blobs[i].blobs[uc_fw->type];
+ const struct uc_fw_blob *blob = &fw_blobs[i].blob;
uc_fw->path = blob->path;
uc_fw->major_ver_wanted = blob->major;
uc_fw->minor_ver_wanted = blob->minor;
@@ -140,7 +173,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
/* make sure the list is ordered as expected */
if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST)) {
- for (i = 1; i < ARRAY_SIZE(fw_blobs); i++) {
+ for (i = 1; i < fw_count; i++) {
if (fw_blobs[i].p < fw_blobs[i - 1].p)
continue;
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 1/4] drm/i915/uc: Allow platforms to have GuC but not HuC
@ 2021-12-03 0:06 ` John.C.Harrison
0 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
It is possible for platforms to require GuC but not HuC firmware.
Also, the firmware versions for GuC and HuC advance independently. So
split the macros up to allow the lists to be maintained separately.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 93 ++++++++++++++++--------
1 file changed, 63 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 3aa87be4f2e4..a7788ce50736 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -48,22 +48,39 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* Note that RKL and ADL-S have the same GuC/HuC device ID's and use the same
* firmware as TGL.
*/
-#define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
- fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3), huc_def(tgl, 7, 9, 3)) \
- fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 9, 3)) \
- fw_def(DG1, 0, guc_def(dg1, 62, 0, 0), huc_def(dg1, 7, 9, 3)) \
- fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 9, 3)) \
- fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0), huc_def(tgl, 7, 9, 3)) \
- fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0), huc_def(ehl, 9, 0, 0)) \
- fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0), huc_def(ehl, 9, 0, 0)) \
- fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0), huc_def(icl, 9, 0, 0)) \
- fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0), huc_def(cml, 4, 0, 0)) \
- fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0), huc_def(glk, 4, 0, 0)) \
- fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0), huc_def(kbl, 4, 0, 0)) \
- fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0), huc_def(bxt, 2, 0, 0)) \
- fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0), huc_def(skl, 2, 0, 0))
+#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
+ fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3)) \
+ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(DG1, 0, guc_def(dg1, 62, 0, 0)) \
+ fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0)) \
+ fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0)) \
+ fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0))
+
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
+ fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(ALDERLAKE_S, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(DG1, 0, huc_def(dg1, 7, 9, 3)) \
+ fw_def(ROCKETLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(TIGERLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(JASPERLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, huc_def(icl, 9, 0, 0)) \
+ fw_def(COMETLAKE, 5, huc_def(cml, 4, 0, 0)) \
+ fw_def(COMETLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, huc_def(skl, 2, 0, 0))
#define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
"i915/" \
@@ -79,11 +96,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
__MAKE_UC_FW_PATH(prefix_, "_huc_", major_, minor_, bld_num_)
/* All blobs need to be declared via MODULE_FIRMWARE() */
-#define INTEL_UC_MODULE_FW(platform_, revid_, guc_, huc_) \
- MODULE_FIRMWARE(guc_); \
- MODULE_FIRMWARE(huc_);
+#define INTEL_UC_MODULE_FW(platform_, revid_, uc_) \
+ MODULE_FIRMWARE(uc_);
-INTEL_UC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH, MAKE_HUC_FW_PATH)
+INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH)
+INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH)
/* The below structs and macros are used to iterate across the list of blobs */
struct __packed uc_fw_blob {
@@ -106,31 +123,47 @@ struct __packed uc_fw_blob {
struct __packed uc_fw_platform_requirement {
enum intel_platform p;
u8 rev; /* first platform rev using this FW */
- const struct uc_fw_blob blobs[INTEL_UC_FW_NUM_TYPES];
+ const struct uc_fw_blob blob;
};
-#define MAKE_FW_LIST(platform_, revid_, guc_, huc_) \
+#define MAKE_FW_LIST(platform_, revid_, uc_) \
{ \
.p = INTEL_##platform_, \
.rev = revid_, \
- .blobs[INTEL_UC_FW_TYPE_GUC] = guc_, \
- .blobs[INTEL_UC_FW_TYPE_HUC] = huc_, \
+ .blob = uc_, \
},
+struct fw_blobs_by_type {
+ const struct uc_fw_platform_requirement *blobs;
+ u32 count;
+};
+
static void
__uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
{
- static const struct uc_fw_platform_requirement fw_blobs[] = {
- INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB)
+ static const struct uc_fw_platform_requirement blobs_guc[] = {
+ INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB)
+ };
+ static const struct uc_fw_platform_requirement blobs_huc[] = {
+ INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB)
};
+ static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = {
+ [INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) },
+ [INTEL_UC_FW_TYPE_HUC] = { blobs_huc, ARRAY_SIZE(blobs_huc) },
+ };
+ static const struct uc_fw_platform_requirement *fw_blobs;
enum intel_platform p = INTEL_INFO(i915)->platform;
+ u32 fw_count;
u8 rev = INTEL_REVID(i915);
int i;
- for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) {
+ GEM_BUG_ON(uc_fw->type >= ARRAY_SIZE(blobs_all));
+ fw_blobs = blobs_all[uc_fw->type].blobs;
+ fw_count = blobs_all[uc_fw->type].count;
+
+ for (i = 0; i < fw_count && p <= fw_blobs[i].p; i++) {
if (p == fw_blobs[i].p && rev >= fw_blobs[i].rev) {
- const struct uc_fw_blob *blob =
- &fw_blobs[i].blobs[uc_fw->type];
+ const struct uc_fw_blob *blob = &fw_blobs[i].blob;
uc_fw->path = blob->path;
uc_fw->major_ver_wanted = blob->major;
uc_fw->minor_ver_wanted = blob->minor;
@@ -140,7 +173,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
/* make sure the list is ordered as expected */
if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST)) {
- for (i = 1; i < ARRAY_SIZE(fw_blobs); i++) {
+ for (i = 1; i < fw_count; i++) {
if (fw_blobs[i].p < fw_blobs[i - 1].p)
continue;
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Intel-gfx] [PATCH 2/4] drm/i915/guc: Request RP0 before loading firmware
2021-12-03 0:06 ` John.C.Harrison
@ 2021-12-03 0:06 ` John.C.Harrison
-1 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
By default, GT (and GuC) run at RPn. Requesting for RP0
before firmware load can speed up DMA and HuC auth as well.
In addition to writing to 0xA008, we also need to enable
swreq in 0xA024 so that Punit will pay heed to our request.
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
drivers/gpu/drm/i915/gt/intel_rps.c | 59 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 6 +++
drivers/gpu/drm/i915/i915_reg.h | 4 ++
4 files changed, 71 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 07ff7ba7b2b7..4f7fe079ed4a 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -2226,6 +2226,65 @@ u32 intel_rps_read_state_cap(struct intel_rps *rps)
return intel_uncore_read(uncore, GEN6_RP_STATE_CAP);
}
+static void intel_rps_set_manual(struct intel_rps *rps, bool enable)
+{
+ struct intel_uncore *uncore = rps_to_uncore(rps);
+ u32 state = enable ? GEN9_RPSWCTL_ENABLE : GEN9_RPSWCTL_DISABLE;
+
+ if (enable)
+ intel_rps_clear_timer(rps);
+
+ /* Allow punit to process software requests */
+ intel_uncore_write(uncore, GEN6_RP_CONTROL, state);
+
+ if (!enable)
+ intel_rps_set_timer(rps);
+}
+
+void intel_rps_raise_unslice(struct intel_rps *rps)
+{
+ struct intel_uncore *uncore = rps_to_uncore(rps);
+ u32 rp0_unslice_req;
+
+ intel_rps_set_manual(rps, true);
+
+ /* RP limits have not been read yet */
+ if (!rps->rp0_freq)
+ rp0_unslice_req = ((intel_rps_read_state_cap(rps) >> 0)
+ & 0xff) * GEN9_FREQ_SCALER;
+ else
+ rp0_unslice_req = rps->rp0_freq;
+
+ intel_uncore_write(uncore, GEN6_RPNSWREQ,
+ ((rp0_unslice_req <<
+ GEN9_SW_REQ_UNSLICE_RATIO_SHIFT) |
+ GEN9_IGNORE_SLICE_RATIO));
+
+ intel_rps_set_manual(rps, false);
+}
+
+void intel_rps_lower_unslice(struct intel_rps *rps)
+{
+ struct intel_uncore *uncore = rps_to_uncore(rps);
+ u32 rpn_unslice_req;
+
+ intel_rps_set_manual(rps, true);
+
+ /* RP limits have not been read yet */
+ if (!rps->min_freq)
+ rpn_unslice_req = ((intel_rps_read_state_cap(rps) >> 16)
+ & 0xff) * GEN9_FREQ_SCALER;
+ else
+ rpn_unslice_req = rps->min_freq;
+
+ intel_uncore_write(uncore, GEN6_RPNSWREQ,
+ ((rpn_unslice_req <<
+ GEN9_SW_REQ_UNSLICE_RATIO_SHIFT) |
+ GEN9_IGNORE_SLICE_RATIO));
+
+ intel_rps_set_manual(rps, false);
+}
+
/* External interface for intel_ips.ko */
static struct drm_i915_private __rcu *ips_mchdev;
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h
index aee12f37d38a..c6d76a3d1331 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps.h
@@ -45,6 +45,8 @@ u32 intel_rps_get_rpn_frequency(struct intel_rps *rps);
u32 intel_rps_read_punit_req(struct intel_rps *rps);
u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps);
u32 intel_rps_read_state_cap(struct intel_rps *rps);
+void intel_rps_raise_unslice(struct intel_rps *rps);
+void intel_rps_lower_unslice(struct intel_rps *rps);
void gen5_rps_irq_handler(struct intel_rps *rps);
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 2fef3b0bbe95..ed7180b79a6f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -8,6 +8,7 @@
#include "intel_guc.h"
#include "intel_guc_ads.h"
#include "intel_guc_submission.h"
+#include "gt/intel_rps.h"
#include "intel_uc.h"
#include "i915_drv.h"
@@ -462,6 +463,8 @@ static int __uc_init_hw(struct intel_uc *uc)
else
attempts = 1;
+ intel_rps_raise_unslice(&uc_to_gt(uc)->rps);
+
while (attempts--) {
/*
* Always reset the GuC just before (re)loading, so
@@ -529,6 +532,9 @@ static int __uc_init_hw(struct intel_uc *uc)
err_log_capture:
__uc_capture_load_err_log(uc);
err_out:
+ /* Return GT back to RPn */
+ intel_rps_lower_unslice(&uc_to_gt(uc)->rps);
+
__uc_sanitize(uc);
if (!ret) {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3450818802c2..229d33a65891 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9415,6 +9415,7 @@ enum {
#define GEN6_OFFSET(x) ((x) << 19)
#define GEN6_AGGRESSIVE_TURBO (0 << 15)
#define GEN9_SW_REQ_UNSLICE_RATIO_SHIFT 23
+#define GEN9_IGNORE_SLICE_RATIO (0 << 0)
#define GEN6_RC_VIDEO_FREQ _MMIO(0xA00C)
#define GEN6_RC_CONTROL _MMIO(0xA090)
@@ -9450,6 +9451,9 @@ enum {
#define GEN6_RP_UP_BUSY_CONT (0x4 << 3)
#define GEN6_RP_DOWN_IDLE_AVG (0x2 << 0)
#define GEN6_RP_DOWN_IDLE_CONT (0x1 << 0)
+#define GEN6_RPSWCTL_SHIFT 9
+#define GEN9_RPSWCTL_ENABLE (0x2 << GEN6_RPSWCTL_SHIFT)
+#define GEN9_RPSWCTL_DISABLE (0x0 << GEN6_RPSWCTL_SHIFT)
#define GEN6_RP_UP_THRESHOLD _MMIO(0xA02C)
#define GEN6_RP_DOWN_THRESHOLD _MMIO(0xA030)
#define GEN6_RP_CUR_UP_EI _MMIO(0xA050)
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 2/4] drm/i915/guc: Request RP0 before loading firmware
@ 2021-12-03 0:06 ` John.C.Harrison
0 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: Vinay Belgaumkar, DRI-Devel
From: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
By default, GT (and GuC) run at RPn. Requesting for RP0
before firmware load can speed up DMA and HuC auth as well.
In addition to writing to 0xA008, we also need to enable
swreq in 0xA024 so that Punit will pay heed to our request.
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
drivers/gpu/drm/i915/gt/intel_rps.c | 59 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 6 +++
drivers/gpu/drm/i915/i915_reg.h | 4 ++
4 files changed, 71 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 07ff7ba7b2b7..4f7fe079ed4a 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -2226,6 +2226,65 @@ u32 intel_rps_read_state_cap(struct intel_rps *rps)
return intel_uncore_read(uncore, GEN6_RP_STATE_CAP);
}
+static void intel_rps_set_manual(struct intel_rps *rps, bool enable)
+{
+ struct intel_uncore *uncore = rps_to_uncore(rps);
+ u32 state = enable ? GEN9_RPSWCTL_ENABLE : GEN9_RPSWCTL_DISABLE;
+
+ if (enable)
+ intel_rps_clear_timer(rps);
+
+ /* Allow punit to process software requests */
+ intel_uncore_write(uncore, GEN6_RP_CONTROL, state);
+
+ if (!enable)
+ intel_rps_set_timer(rps);
+}
+
+void intel_rps_raise_unslice(struct intel_rps *rps)
+{
+ struct intel_uncore *uncore = rps_to_uncore(rps);
+ u32 rp0_unslice_req;
+
+ intel_rps_set_manual(rps, true);
+
+ /* RP limits have not been read yet */
+ if (!rps->rp0_freq)
+ rp0_unslice_req = ((intel_rps_read_state_cap(rps) >> 0)
+ & 0xff) * GEN9_FREQ_SCALER;
+ else
+ rp0_unslice_req = rps->rp0_freq;
+
+ intel_uncore_write(uncore, GEN6_RPNSWREQ,
+ ((rp0_unslice_req <<
+ GEN9_SW_REQ_UNSLICE_RATIO_SHIFT) |
+ GEN9_IGNORE_SLICE_RATIO));
+
+ intel_rps_set_manual(rps, false);
+}
+
+void intel_rps_lower_unslice(struct intel_rps *rps)
+{
+ struct intel_uncore *uncore = rps_to_uncore(rps);
+ u32 rpn_unslice_req;
+
+ intel_rps_set_manual(rps, true);
+
+ /* RP limits have not been read yet */
+ if (!rps->min_freq)
+ rpn_unslice_req = ((intel_rps_read_state_cap(rps) >> 16)
+ & 0xff) * GEN9_FREQ_SCALER;
+ else
+ rpn_unslice_req = rps->min_freq;
+
+ intel_uncore_write(uncore, GEN6_RPNSWREQ,
+ ((rpn_unslice_req <<
+ GEN9_SW_REQ_UNSLICE_RATIO_SHIFT) |
+ GEN9_IGNORE_SLICE_RATIO));
+
+ intel_rps_set_manual(rps, false);
+}
+
/* External interface for intel_ips.ko */
static struct drm_i915_private __rcu *ips_mchdev;
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h
index aee12f37d38a..c6d76a3d1331 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps.h
@@ -45,6 +45,8 @@ u32 intel_rps_get_rpn_frequency(struct intel_rps *rps);
u32 intel_rps_read_punit_req(struct intel_rps *rps);
u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps);
u32 intel_rps_read_state_cap(struct intel_rps *rps);
+void intel_rps_raise_unslice(struct intel_rps *rps);
+void intel_rps_lower_unslice(struct intel_rps *rps);
void gen5_rps_irq_handler(struct intel_rps *rps);
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 2fef3b0bbe95..ed7180b79a6f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -8,6 +8,7 @@
#include "intel_guc.h"
#include "intel_guc_ads.h"
#include "intel_guc_submission.h"
+#include "gt/intel_rps.h"
#include "intel_uc.h"
#include "i915_drv.h"
@@ -462,6 +463,8 @@ static int __uc_init_hw(struct intel_uc *uc)
else
attempts = 1;
+ intel_rps_raise_unslice(&uc_to_gt(uc)->rps);
+
while (attempts--) {
/*
* Always reset the GuC just before (re)loading, so
@@ -529,6 +532,9 @@ static int __uc_init_hw(struct intel_uc *uc)
err_log_capture:
__uc_capture_load_err_log(uc);
err_out:
+ /* Return GT back to RPn */
+ intel_rps_lower_unslice(&uc_to_gt(uc)->rps);
+
__uc_sanitize(uc);
if (!ret) {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3450818802c2..229d33a65891 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9415,6 +9415,7 @@ enum {
#define GEN6_OFFSET(x) ((x) << 19)
#define GEN6_AGGRESSIVE_TURBO (0 << 15)
#define GEN9_SW_REQ_UNSLICE_RATIO_SHIFT 23
+#define GEN9_IGNORE_SLICE_RATIO (0 << 0)
#define GEN6_RC_VIDEO_FREQ _MMIO(0xA00C)
#define GEN6_RC_CONTROL _MMIO(0xA090)
@@ -9450,6 +9451,9 @@ enum {
#define GEN6_RP_UP_BUSY_CONT (0x4 << 3)
#define GEN6_RP_DOWN_IDLE_AVG (0x2 << 0)
#define GEN6_RP_DOWN_IDLE_CONT (0x1 << 0)
+#define GEN6_RPSWCTL_SHIFT 9
+#define GEN9_RPSWCTL_ENABLE (0x2 << GEN6_RPSWCTL_SHIFT)
+#define GEN9_RPSWCTL_DISABLE (0x0 << GEN6_RPSWCTL_SHIFT)
#define GEN6_RP_UP_THRESHOLD _MMIO(0xA02C)
#define GEN6_RP_DOWN_THRESHOLD _MMIO(0xA030)
#define GEN6_RP_CUR_UP_EI _MMIO(0xA050)
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Intel-gfx] [PATCH 3/4] drm/i915/guc: Increase GuC log size for CONFIG_DEBUG_GEM
2021-12-03 0:06 ` John.C.Harrison
@ 2021-12-03 0:06 ` John.C.Harrison
-1 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Lots of testing is done with the DEBUG_GEM config option enabled but
not the DEBUG_GUC option. That means we only get teeny-tiny GuC logs
which are not hugely useful. Enabling full DEBUG_GUC also spews lots
of other detailed output that is not generally desired. However,
bigger GuC logs are extremely useful for almost any regression debug.
So enable bigger logs for DEBUG_GEM builds as well.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_log.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
index ac1ee1d5ce10..fe6ab7550a14 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
@@ -15,9 +15,12 @@
struct intel_guc;
-#ifdef CONFIG_DRM_I915_DEBUG_GUC
+#if defined(CONFIG_DRM_I915_DEBUG_GUC)
#define CRASH_BUFFER_SIZE SZ_2M
#define DEBUG_BUFFER_SIZE SZ_16M
+#elif defined(CONFIG_DRM_I915_DEBUG_GEM)
+#define CRASH_BUFFER_SIZE SZ_1M
+#define DEBUG_BUFFER_SIZE SZ_2M
#else
#define CRASH_BUFFER_SIZE SZ_8K
#define DEBUG_BUFFER_SIZE SZ_64K
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 3/4] drm/i915/guc: Increase GuC log size for CONFIG_DEBUG_GEM
@ 2021-12-03 0:06 ` John.C.Harrison
0 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Lots of testing is done with the DEBUG_GEM config option enabled but
not the DEBUG_GUC option. That means we only get teeny-tiny GuC logs
which are not hugely useful. Enabling full DEBUG_GUC also spews lots
of other detailed output that is not generally desired. However,
bigger GuC logs are extremely useful for almost any regression debug.
So enable bigger logs for DEBUG_GEM builds as well.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_log.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
index ac1ee1d5ce10..fe6ab7550a14 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
@@ -15,9 +15,12 @@
struct intel_guc;
-#ifdef CONFIG_DRM_I915_DEBUG_GUC
+#if defined(CONFIG_DRM_I915_DEBUG_GUC)
#define CRASH_BUFFER_SIZE SZ_2M
#define DEBUG_BUFFER_SIZE SZ_16M
+#elif defined(CONFIG_DRM_I915_DEBUG_GEM)
+#define CRASH_BUFFER_SIZE SZ_1M
+#define DEBUG_BUFFER_SIZE SZ_2M
#else
#define CRASH_BUFFER_SIZE SZ_8K
#define DEBUG_BUFFER_SIZE SZ_64K
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [Intel-gfx] [PATCH 4/4] drm/i915/guc: Don't go bang in GuC log if no GuC
2021-12-03 0:06 ` John.C.Harrison
@ 2021-12-03 0:06 ` John.C.Harrison
-1 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
If the GuC has failed to load for any reason and then the user pokes
the debugfs GuC log interface, a BUG and/or null pointer deref can
occur. Don't let that happen.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
index 46026c2c1722..8fd068049376 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
@@ -31,7 +31,7 @@ static int guc_log_level_get(void *data, u64 *val)
{
struct intel_guc_log *log = data;
- if (!intel_guc_is_used(log_to_guc(log)))
+ if (!log->vma)
return -ENODEV;
*val = intel_guc_log_get_level(log);
@@ -43,7 +43,7 @@ static int guc_log_level_set(void *data, u64 val)
{
struct intel_guc_log *log = data;
- if (!intel_guc_is_used(log_to_guc(log)))
+ if (!log->vma)
return -ENODEV;
return intel_guc_log_set_level(log, val);
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 4/4] drm/i915/guc: Don't go bang in GuC log if no GuC
@ 2021-12-03 0:06 ` John.C.Harrison
0 siblings, 0 replies; 23+ messages in thread
From: John.C.Harrison @ 2021-12-03 0:06 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
If the GuC has failed to load for any reason and then the user pokes
the debugfs GuC log interface, a BUG and/or null pointer deref can
occur. Don't let that happen.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
index 46026c2c1722..8fd068049376 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
@@ -31,7 +31,7 @@ static int guc_log_level_get(void *data, u64 *val)
{
struct intel_guc_log *log = data;
- if (!intel_guc_is_used(log_to_guc(log)))
+ if (!log->vma)
return -ENODEV;
*val = intel_guc_log_get_level(log);
@@ -43,7 +43,7 @@ static int guc_log_level_set(void *data, u64 val)
{
struct intel_guc_log *log = data;
- if (!intel_guc_is_used(log_to_guc(log)))
+ if (!log->vma)
return -ENODEV;
return intel_guc_log_set_level(log, val);
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [Intel-gfx] [PATCH 4/4] drm/i915/guc: Don't go bang in GuC log if no GuC
2021-12-03 0:06 ` John.C.Harrison
@ 2021-12-03 0:33 ` Lucas De Marchi
-1 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-12-03 0:33 UTC (permalink / raw)
To: John.C.Harrison; +Cc: Intel-GFX, DRI-Devel
On Thu, Dec 02, 2021 at 04:06:23PM -0800, John.C.Harrison@Intel.com wrote:
>From: John Harrison <John.C.Harrison@Intel.com>
>
>If the GuC has failed to load for any reason and then the user pokes
>the debugfs GuC log interface, a BUG and/or null pointer deref can
>occur. Don't let that happen.
>
>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>index 46026c2c1722..8fd068049376 100644
>--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>@@ -31,7 +31,7 @@ static int guc_log_level_get(void *data, u64 *val)
> {
> struct intel_guc_log *log = data;
>
>- if (!intel_guc_is_used(log_to_guc(log)))
>+ if (!log->vma)
> return -ENODEV;
>
> *val = intel_guc_log_get_level(log);
>@@ -43,7 +43,7 @@ static int guc_log_level_set(void *data, u64 val)
> {
> struct intel_guc_log *log = data;
>
>- if (!intel_guc_is_used(log_to_guc(log)))
>+ if (!log->vma)
> return -ENODEV;
>
> return intel_guc_log_set_level(log, val);
>--
>2.25.1
>
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 4/4] drm/i915/guc: Don't go bang in GuC log if no GuC
@ 2021-12-03 0:33 ` Lucas De Marchi
0 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-12-03 0:33 UTC (permalink / raw)
To: John.C.Harrison; +Cc: Intel-GFX, DRI-Devel
On Thu, Dec 02, 2021 at 04:06:23PM -0800, John.C.Harrison@Intel.com wrote:
>From: John Harrison <John.C.Harrison@Intel.com>
>
>If the GuC has failed to load for any reason and then the user pokes
>the debugfs GuC log interface, a BUG and/or null pointer deref can
>occur. Don't let that happen.
>
>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>index 46026c2c1722..8fd068049376 100644
>--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>@@ -31,7 +31,7 @@ static int guc_log_level_get(void *data, u64 *val)
> {
> struct intel_guc_log *log = data;
>
>- if (!intel_guc_is_used(log_to_guc(log)))
>+ if (!log->vma)
> return -ENODEV;
>
> *val = intel_guc_log_get_level(log);
>@@ -43,7 +43,7 @@ static int guc_log_level_set(void *data, u64 val)
> {
> struct intel_guc_log *log = data;
>
>- if (!intel_guc_is_used(log_to_guc(log)))
>+ if (!log->vma)
> return -ENODEV;
>
> return intel_guc_log_set_level(log, val);
>--
>2.25.1
>
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [Intel-gfx] [PATCH 4/4] drm/i915/guc: Don't go bang in GuC log if no GuC
2021-12-03 0:33 ` Lucas De Marchi
(?)
@ 2021-12-03 20:00 ` Daniele Ceraolo Spurio
2021-12-07 7:01 ` Lucas De Marchi
-1 siblings, 1 reply; 23+ messages in thread
From: Daniele Ceraolo Spurio @ 2021-12-03 20:00 UTC (permalink / raw)
To: Lucas De Marchi, John.C.Harrison; +Cc: Intel-GFX, DRI-Devel
On 12/2/2021 4:33 PM, Lucas De Marchi wrote:
> On Thu, Dec 02, 2021 at 04:06:23PM -0800, John.C.Harrison@Intel.com
> wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> If the GuC has failed to load for any reason and then the user pokes
>> the debugfs GuC log interface, a BUG and/or null pointer deref can
>> occur. Don't let that happen.
>>
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
> Lucas De Marchi
>
Do we need a fixes tag? or is it ok to not have it for debugfs bugs?
Daniele
>> ---
>> drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>> index 46026c2c1722..8fd068049376 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>> @@ -31,7 +31,7 @@ static int guc_log_level_get(void *data, u64 *val)
>> {
>> struct intel_guc_log *log = data;
>>
>> - if (!intel_guc_is_used(log_to_guc(log)))
>> + if (!log->vma)
>> return -ENODEV;
>>
>> *val = intel_guc_log_get_level(log);
>> @@ -43,7 +43,7 @@ static int guc_log_level_set(void *data, u64 val)
>> {
>> struct intel_guc_log *log = data;
>>
>> - if (!intel_guc_is_used(log_to_guc(log)))
>> + if (!log->vma)
>> return -ENODEV;
>>
>> return intel_guc_log_set_level(log, val);
>> --
>> 2.25.1
>>
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [Intel-gfx] [PATCH 4/4] drm/i915/guc: Don't go bang in GuC log if no GuC
2021-12-03 20:00 ` [Intel-gfx] " Daniele Ceraolo Spurio
@ 2021-12-07 7:01 ` Lucas De Marchi
0 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-12-07 7:01 UTC (permalink / raw)
To: Daniele Ceraolo Spurio; +Cc: Intel-GFX, DRI-Devel
On Fri, Dec 03, 2021 at 12:00:59PM -0800, Daniele Ceraolo Spurio wrote:
>
>
>On 12/2/2021 4:33 PM, Lucas De Marchi wrote:
>>On Thu, Dec 02, 2021 at 04:06:23PM -0800, John.C.Harrison@Intel.com
>>wrote:
>>>From: John Harrison <John.C.Harrison@Intel.com>
>>>
>>>If the GuC has failed to load for any reason and then the user pokes
>>>the debugfs GuC log interface, a BUG and/or null pointer deref can
>>>occur. Don't let that happen.
>>>
>>>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>
>>
>>Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>>
>>Lucas De Marchi
>>
>
>Do we need a fixes tag? or is it ok to not have it for debugfs bugs?
>
for this file in debugfs, I don't think so, but I will let the
maintainers to chime in.
Lucas De Marchi
>Daniele
>
>>>---
>>>drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c | 4 ++--
>>>1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>>>b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>>>index 46026c2c1722..8fd068049376 100644
>>>--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>>>+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>>>@@ -31,7 +31,7 @@ static int guc_log_level_get(void *data, u64 *val)
>>>{
>>> struct intel_guc_log *log = data;
>>>
>>>- if (!intel_guc_is_used(log_to_guc(log)))
>>>+ if (!log->vma)
>>> return -ENODEV;
>>>
>>> *val = intel_guc_log_get_level(log);
>>>@@ -43,7 +43,7 @@ static int guc_log_level_set(void *data, u64 val)
>>>{
>>> struct intel_guc_log *log = data;
>>>
>>>- if (!intel_guc_is_used(log_to_guc(log)))
>>>+ if (!log->vma)
>>> return -ENODEV;
>>>
>>> return intel_guc_log_set_level(log, val);
>>>--
>>>2.25.1
>>>
>
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [Intel-gfx] [PATCH 4/4] drm/i915/guc: Don't go bang in GuC log if no GuC
@ 2021-12-07 7:01 ` Lucas De Marchi
0 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-12-07 7:01 UTC (permalink / raw)
To: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin, Intel-GFX, DRI-Devel, John.C.Harrison
On Fri, Dec 03, 2021 at 12:00:59PM -0800, Daniele Ceraolo Spurio wrote:
>
>
>On 12/2/2021 4:33 PM, Lucas De Marchi wrote:
>>On Thu, Dec 02, 2021 at 04:06:23PM -0800, John.C.Harrison@Intel.com
>>wrote:
>>>From: John Harrison <John.C.Harrison@Intel.com>
>>>
>>>If the GuC has failed to load for any reason and then the user pokes
>>>the debugfs GuC log interface, a BUG and/or null pointer deref can
>>>occur. Don't let that happen.
>>>
>>>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>
>>
>>Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>>
>>Lucas De Marchi
>>
>
>Do we need a fixes tag? or is it ok to not have it for debugfs bugs?
>
for this file in debugfs, I don't think so, but I will let the
maintainers to chime in.
Lucas De Marchi
>Daniele
>
>>>---
>>>drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c | 4 ++--
>>>1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>>>b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>>>index 46026c2c1722..8fd068049376 100644
>>>--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>>>+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
>>>@@ -31,7 +31,7 @@ static int guc_log_level_get(void *data, u64 *val)
>>>{
>>> struct intel_guc_log *log = data;
>>>
>>>- if (!intel_guc_is_used(log_to_guc(log)))
>>>+ if (!log->vma)
>>> return -ENODEV;
>>>
>>> *val = intel_guc_log_get_level(log);
>>>@@ -43,7 +43,7 @@ static int guc_log_level_set(void *data, u64 val)
>>>{
>>> struct intel_guc_log *log = data;
>>>
>>>- if (!intel_guc_is_used(log_to_guc(log)))
>>>+ if (!log->vma)
>>> return -ENODEV;
>>>
>>> return intel_guc_log_set_level(log, val);
>>>--
>>>2.25.1
>>>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Assorted fixes/tweaks to GuC support
2021-12-03 0:06 ` John.C.Harrison
` (4 preceding siblings ...)
(?)
@ 2021-12-03 0:20 ` Patchwork
-1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-12-03 0:20 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
== Series Details ==
Series: Assorted fixes/tweaks to GuC support
URL : https://patchwork.freedesktop.org/series/97514/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
394709d4751f drm/i915/uc: Allow platforms to have GuC but not HuC
-:36: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#36: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:51:
+#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
+ fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3)) \
+ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(DG1, 0, guc_def(dg1, 62, 0, 0)) \
+ fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0)) \
+ fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0)) \
+ fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0))
-:36: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'fw_def' - possible side-effects?
#36: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:51:
+#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
+ fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3)) \
+ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(DG1, 0, guc_def(dg1, 62, 0, 0)) \
+ fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0)) \
+ fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0)) \
+ fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0))
-:36: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'guc_def' - possible side-effects?
#36: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:51:
+#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
+ fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3)) \
+ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(DG1, 0, guc_def(dg1, 62, 0, 0)) \
+ fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0)) \
+ fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0)) \
+ fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0))
-:53: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#53: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:68:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
+ fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(ALDERLAKE_S, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(DG1, 0, huc_def(dg1, 7, 9, 3)) \
+ fw_def(ROCKETLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(TIGERLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(JASPERLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, huc_def(icl, 9, 0, 0)) \
+ fw_def(COMETLAKE, 5, huc_def(cml, 4, 0, 0)) \
+ fw_def(COMETLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, huc_def(skl, 2, 0, 0))
-:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'fw_def' - possible side-effects?
#53: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:68:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
+ fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(ALDERLAKE_S, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(DG1, 0, huc_def(dg1, 7, 9, 3)) \
+ fw_def(ROCKETLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(TIGERLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(JASPERLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, huc_def(icl, 9, 0, 0)) \
+ fw_def(COMETLAKE, 5, huc_def(cml, 4, 0, 0)) \
+ fw_def(COMETLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, huc_def(skl, 2, 0, 0))
-:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'huc_def' - possible side-effects?
#53: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:68:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
+ fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(ALDERLAKE_S, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(DG1, 0, huc_def(dg1, 7, 9, 3)) \
+ fw_def(ROCKETLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(TIGERLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(JASPERLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, huc_def(icl, 9, 0, 0)) \
+ fw_def(COMETLAKE, 5, huc_def(cml, 4, 0, 0)) \
+ fw_def(COMETLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, huc_def(skl, 2, 0, 0))
-:79: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#79: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:99:
+#define INTEL_UC_MODULE_FW(platform_, revid_, uc_) \
+ MODULE_FIRMWARE(uc_);
total: 2 errors, 1 warnings, 4 checks, 134 lines checked
1b7f2b22f34a drm/i915/guc: Request RP0 before loading firmware
fa97e9d77b1b drm/i915/guc: Increase GuC log size for CONFIG_DEBUG_GEM
687c22d86d16 drm/i915/guc: Don't go bang in GuC log if no GuC
^ permalink raw reply [flat|nested] 23+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Assorted fixes/tweaks to GuC support
2021-12-03 0:06 ` John.C.Harrison
` (5 preceding siblings ...)
(?)
@ 2021-12-03 0:21 ` Patchwork
-1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-12-03 0:21 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
== Series Details ==
Series: Assorted fixes/tweaks to GuC support
URL : https://patchwork.freedesktop.org/series/97514/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 23+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for Assorted fixes/tweaks to GuC support
2021-12-03 0:06 ` John.C.Harrison
` (6 preceding siblings ...)
(?)
@ 2021-12-03 0:44 ` Patchwork
-1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-12-03 0:44 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4630 bytes --]
== Series Details ==
Series: Assorted fixes/tweaks to GuC support
URL : https://patchwork.freedesktop.org/series/97514/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10957 -> Patchwork_21735
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/index.html
Participating hosts (38 -> 32)
------------------------------
Missing (6): bat-dg1-6 bat-dg1-5 fi-icl-u2 fi-bsw-cyan bat-jsl-2 bat-jsl-1
Known issues
------------
Here are the changes found in Patchwork_21735 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2: NOTRUN -> [SKIP][1] ([fdo#109271]) +23 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/fi-skl-6700k2/igt@amdgpu/amd_basic@cs-gfx.html
* igt@amdgpu/amd_cs_nop@fork-compute0:
- fi-ivb-3770: NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/fi-ivb-3770/igt@amdgpu/amd_cs_nop@fork-compute0.html
* igt@gem_exec_suspend@basic-s3:
- fi-bdw-5557u: [PASS][3] -> [INCOMPLETE][4] ([i915#146])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][5] -> [DMESG-FAIL][6] ([i915#4528])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/fi-blb-e6850/igt@i915_selftest@live@requests.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@runner@aborted:
- fi-blb-e6850: NOTRUN -> [FAIL][7] ([fdo#109271] / [i915#2403] / [i915#4312])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/fi-blb-e6850/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_heartbeat:
- {fi-tgl-dsi}: [DMESG-FAIL][8] ([i915#541]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@hangcheck:
- fi-ivb-3770: [INCOMPLETE][10] ([i915#3303]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-skl-6700k2: [INCOMPLETE][12] ([i915#198]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/fi-skl-6700k2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/fi-skl-6700k2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Build changes
-------------
* Linux: CI_DRM_10957 -> Patchwork_21735
CI-20190529: 20190529
CI_DRM_10957: 10716ba5171eb4158a11d1c4fa773254751023e9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6299: 0933b7ccdb2bb054b6a8154171e35315d84299b7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21735: 687c22d86d1674969b6a2e6bfea05366d340d01d @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
687c22d86d16 drm/i915/guc: Don't go bang in GuC log if no GuC
fa97e9d77b1b drm/i915/guc: Increase GuC log size for CONFIG_DEBUG_GEM
1b7f2b22f34a drm/i915/guc: Request RP0 before loading firmware
394709d4751f drm/i915/uc: Allow platforms to have GuC but not HuC
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/index.html
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^ permalink raw reply [flat|nested] 23+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for Assorted fixes/tweaks to GuC support
2021-12-03 0:06 ` John.C.Harrison
` (7 preceding siblings ...)
(?)
@ 2021-12-03 1:55 ` Patchwork
-1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-12-03 1:55 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30259 bytes --]
== Series Details ==
Series: Assorted fixes/tweaks to GuC support
URL : https://patchwork.freedesktop.org/series/97514/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10957_full -> Patchwork_21735_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_21735_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21735_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (9 -> 9)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_21735_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_eio@kms:
- shard-glk: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-glk2/igt@gem_eio@kms.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-glk9/igt@gem_eio@kms.html
* igt@i915_pm_rps@reset:
- shard-tglb: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-tglb8/igt@i915_pm_rps@reset.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb2/igt@i915_pm_rps@reset.html
* igt@i915_pm_rps@waitboost:
- shard-tglb: NOTRUN -> [FAIL][5]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@i915_pm_rps@waitboost.html
* igt@kms_atomic_transition@modeset-transition@1x-outputs:
- shard-tglb: [PASS][6] -> [INCOMPLETE][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-tglb3/igt@kms_atomic_transition@modeset-transition@1x-outputs.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_atomic_transition@modeset-transition@1x-outputs.html
Known issues
------------
Here are the changes found in Patchwork_21735_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_eio@unwedge-stress:
- shard-skl: [PASS][8] -> [TIMEOUT][9] ([i915#3063])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl8/igt@gem_eio@unwedge-stress.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl10/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_capture@pi@rcs0:
- shard-skl: NOTRUN -> [INCOMPLETE][10] ([i915#4547])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl2/igt@gem_exec_capture@pi@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][11] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb4/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-tglb: [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-tglb6/igt@gem_exec_fair@basic-pace@vecs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb1/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_params@secure-non-master:
- shard-tglb: NOTRUN -> [SKIP][14] ([fdo#112283])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb2/igt@gem_exec_params@secure-non-master.html
* igt@gem_lmem_swapping@parallel-random:
- shard-skl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl6/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_pread@exhaustion:
- shard-skl: NOTRUN -> [WARN][16] ([i915#2658])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl10/igt@gem_pread@exhaustion.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-kbl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#3323])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl6/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@input-checking:
- shard-iclb: NOTRUN -> [DMESG-WARN][18] ([i915#3002])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb8/igt@gem_userptr_blits@input-checking.html
* igt@gen7_exec_parse@cmd-crossing-page:
- shard-tglb: NOTRUN -> [SKIP][19] ([fdo#109289]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@gen7_exec_parse@cmd-crossing-page.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][20] -> [DMESG-WARN][21] ([i915#1436] / [i915#716])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl8/igt@gen9_exec_parse@allowed-single.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl9/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_lpsp@screens-disabled:
- shard-iclb: NOTRUN -> [SKIP][22] ([i915#1902])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb6/igt@i915_pm_lpsp@screens-disabled.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: NOTRUN -> [WARN][23] ([i915#2684])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@i915_pm_rpm@dpms-non-lpsp:
- shard-tglb: NOTRUN -> [SKIP][24] ([fdo#111644] / [i915#1397] / [i915#2411])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@i915_pm_rpm@dpms-non-lpsp.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-tglb: NOTRUN -> [SKIP][25] ([fdo#109506] / [i915#2411])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@i915_suspend@sysfs-reader:
- shard-kbl: NOTRUN -> [DMESG-WARN][26] ([i915#180])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl1/igt@i915_suspend@sysfs-reader.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][27] ([i915#3743]) +2 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#3777]) +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl4/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][29] ([i915#3763])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-skl: NOTRUN -> [SKIP][30] ([fdo#109271] / [i915#3777]) +3 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl10/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][31] ([fdo#111615])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_big_fb@yf-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-kbl: NOTRUN -> [SKIP][32] ([fdo#109271]) +19 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3886]) +17 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl10/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3886]) +1 similar issue
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl6/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-crc-primary-basic-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][35] ([fdo#111615] / [i915#3689])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_ccs@pipe-c-crc-primary-basic-yf_tiled_ccs.html
* igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3886])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl3/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][37] ([fdo#109271]) +311 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl2/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_cdclk@plane-scaling:
- shard-tglb: NOTRUN -> [SKIP][38] ([i915#3742])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium@common-hpd-after-suspend:
- shard-tglb: NOTRUN -> [SKIP][39] ([fdo#109284] / [fdo#111827]) +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-edid-change-during-suspend:
- shard-kbl: NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl1/igt@kms_chamelium@dp-edid-change-during-suspend.html
- shard-glk: NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-glk3/igt@kms_chamelium@dp-edid-change-during-suspend.html
* igt@kms_chamelium@vga-edid-read:
- shard-apl: NOTRUN -> [SKIP][42] ([fdo#109271] / [fdo#111827]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl8/igt@kms_chamelium@vga-edid-read.html
* igt@kms_chamelium@vga-hpd-for-each-pipe:
- shard-skl: NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +22 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl1/igt@kms_chamelium@vga-hpd-for-each-pipe.html
* igt@kms_color_chamelium@pipe-a-ctm-0-5:
- shard-iclb: NOTRUN -> [SKIP][44] ([fdo#109284] / [fdo#111827]) +2 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb8/igt@kms_color_chamelium@pipe-a-ctm-0-5.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-tglb: NOTRUN -> [SKIP][45] ([i915#3116]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@srm:
- shard-apl: NOTRUN -> [TIMEOUT][46] ([i915#1319])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl3/igt@kms_content_protection@srm.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-apl: NOTRUN -> [DMESG-WARN][47] ([i915#180])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl8/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen:
- shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271]) +49 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl3/igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-512x512-offscreen:
- shard-tglb: NOTRUN -> [SKIP][49] ([fdo#109279] / [i915#3359])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_cursor_crc@pipe-c-cursor-512x512-offscreen.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-rapid-movement:
- shard-iclb: NOTRUN -> [SKIP][50] ([fdo#109278]) +7 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb6/igt@kms_cursor_crc@pipe-d-cursor-256x256-rapid-movement.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-iclb: NOTRUN -> [SKIP][51] ([fdo#109274] / [fdo#109278]) +1 similar issue
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [PASS][52] -> [FAIL][53] ([i915#2346] / [i915#533])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-skl: [PASS][54] -> [FAIL][55] ([i915#2346]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
- shard-skl: [PASS][56] -> [DMESG-WARN][57] ([i915#1982])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl7/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl7/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: [PASS][58] -> [FAIL][59] ([i915#79])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
- shard-iclb: [PASS][60] -> [SKIP][61] ([i915#3701])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
- shard-tglb: NOTRUN -> [SKIP][62] ([fdo#111825]) +9 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-glk: NOTRUN -> [SKIP][63] ([fdo#109271]) +5 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-glk3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-iclb: NOTRUN -> [SKIP][64] ([fdo#109280]) +2 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: [PASS][65] -> [DMESG-WARN][66] ([i915#180]) +8 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl2/igt@kms_hdr@bpc-switch-suspend.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl7/igt@kms_hdr@bpc-switch-suspend.html
- shard-apl: [PASS][67] -> [DMESG-WARN][68] ([i915#180]) +2 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-apl6/igt@kms_hdr@bpc-switch-suspend.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl4/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [PASS][69] -> [FAIL][70] ([fdo#108145] / [i915#265])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-skl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265]) +4 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-skl: NOTRUN -> [FAIL][72] ([i915#265])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_plane_lowres@pipe-d-tiling-y:
- shard-tglb: NOTRUN -> [SKIP][73] ([i915#3536])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_plane_lowres@pipe-d-tiling-y.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1:
- shard-tglb: NOTRUN -> [SKIP][74] ([i915#2920])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
- shard-kbl: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#658])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
- shard-iclb: NOTRUN -> [SKIP][76] ([i915#658])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-skl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#658]) +6 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl1/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-iclb: [PASS][78] -> [SKIP][79] ([fdo#109441]) +1 similar issue
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb3/igt@kms_psr@psr2_cursor_plane_move.html
* igt@kms_psr@psr2_sprite_mmap_cpu:
- shard-tglb: NOTRUN -> [FAIL][80] ([i915#132] / [i915#3467])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@kms_psr@psr2_sprite_mmap_cpu.html
* igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
- shard-tglb: [PASS][81] -> [INCOMPLETE][82] ([i915#456])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-tglb6/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb1/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533]) +4 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl7/igt@kms_vblank@pipe-d-wait-idle.html
* igt@kms_writeback@writeback-check-output:
- shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2437])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl6/igt@kms_writeback@writeback-check-output.html
* igt@nouveau_crc@pipe-c-source-outp-complete:
- shard-tglb: NOTRUN -> [SKIP][85] ([i915#2530])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@nouveau_crc@pipe-c-source-outp-complete.html
* igt@nouveau_crc@pipe-c-source-rg:
- shard-iclb: NOTRUN -> [SKIP][86] ([i915#2530])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb8/igt@nouveau_crc@pipe-c-source-rg.html
* igt@prime_nv_pcopy@test1_macro:
- shard-tglb: NOTRUN -> [SKIP][87] ([fdo#109291])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@prime_nv_pcopy@test1_macro.html
* igt@prime_vgem@basic-userptr:
- shard-tglb: NOTRUN -> [SKIP][88] ([i915#3301])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb2/igt@prime_vgem@basic-userptr.html
* igt@sysfs_clients@busy:
- shard-skl: NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#2994]) +3 similar issues
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl10/igt@sysfs_clients@busy.html
* igt@sysfs_clients@sema-25:
- shard-tglb: NOTRUN -> [SKIP][90] ([i915#2994])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb8/igt@sysfs_clients@sema-25.html
* igt@sysfs_clients@sema-50:
- shard-iclb: NOTRUN -> [SKIP][91] ([i915#2994])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb2/igt@sysfs_clients@sema-50.html
- shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2994]) +1 similar issue
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl6/igt@sysfs_clients@sema-50.html
#### Possible fixes ####
* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][93] ([i915#658]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb7/igt@feature_discovery@psr2.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb2/igt@feature_discovery@psr2.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [TIMEOUT][95] ([i915#3063] / [i915#3648]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-tglb2/igt@gem_eio@unwedge-stress.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-tglb3/igt@gem_eio@unwedge-stress.html
- shard-iclb: [TIMEOUT][97] ([i915#2481] / [i915#3070]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb4/igt@gem_eio@unwedge-stress.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb1/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [FAIL][99] ([i915#2842]) -> [PASS][100] +1 similar issue
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb5/igt@gem_exec_fair@basic-none-share@rcs0.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb4/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-apl: [FAIL][101] ([i915#2842]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-apl2/igt@gem_exec_fair@basic-none@vecs0.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl3/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][103] ([i915#2842]) -> [PASS][104] +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_whisper@basic-fds-all:
- shard-glk: [DMESG-WARN][105] ([i915#118]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-glk8/igt@gem_exec_whisper@basic-fds-all.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-glk4/igt@gem_exec_whisper@basic-fds-all.html
* igt@gem_exec_whisper@basic-queues-forked-all:
- shard-iclb: [INCOMPLETE][107] ([i915#1895]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb7/igt@gem_exec_whisper@basic-queues-forked-all.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb2/igt@gem_exec_whisper@basic-queues-forked-all.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [DMESG-WARN][109] ([i915#180]) -> [PASS][110] +4 similar issues
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-skl: [FAIL][111] ([i915#2346]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [INCOMPLETE][113] ([i915#180] / [i915#636]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl6/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [FAIL][115] ([i915#1188]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl1/igt@kms_hdr@bpc-switch-suspend.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl9/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-kbl: [DMESG-WARN][117] ([i915#180]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][119] ([fdo#108145] / [i915#265]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_setmode@basic:
- shard-glk: [FAIL][121] ([i915#31]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-glk8/igt@kms_setmode@basic.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-glk4/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-c-accuracy-idle:
- shard-glk: [FAIL][123] ([i915#43]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-glk7/igt@kms_vblank@pipe-c-accuracy-idle.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-glk7/igt@kms_vblank@pipe-c-accuracy-idle.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][125] ([i915#1804] / [i915#2684]) -> [WARN][126] ([i915#2684])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb6/igt@i915_pm_rc6_residency@rc6-fence.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb1/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: [SKIP][127] ([i915#658]) -> [SKIP][128] ([i915#2920]) +2 similar issues
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb6/igt@kms_psr2_sf@cursor-plane-update-sf.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb2/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
- shard-iclb: [SKIP][129] ([i915#2920]) -> [SKIP][130] ([i915#658])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-iclb5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134], [FAIL][135], [FAIL][136], [FAIL][137]) ([i915#180] / [i915#1814] / [i915#2426] / [i915#3002] / [i915#3363] / [i915#4312] / [i915#92]) -> ([FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#2426] / [i915#3002] / [i915#3363] / [i915#4312] / [i915#602])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl6/igt@runner@aborted.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl7/igt@runner@aborted.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl3/igt@runner@aborted.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl6/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl7/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl7/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10957/shard-kbl6/igt@runner@aborted.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl1/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/shard-kbl1/igt@runner@aborted.html
[140]: https://intel-gf
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21735/index.html
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^ permalink raw reply [flat|nested] 23+ messages in thread* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Assorted fixes/tweaks to GuC support (rev3)
2021-12-03 0:06 ` John.C.Harrison
` (8 preceding siblings ...)
(?)
@ 2021-12-04 1:23 ` Patchwork
-1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-12-04 1:23 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
== Series Details ==
Series: Assorted fixes/tweaks to GuC support (rev3)
URL : https://patchwork.freedesktop.org/series/97514/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
251e5012b67c drm/i915/uc: Allow platforms to have GuC but not HuC
-:36: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#36: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:51:
+#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
+ fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3)) \
+ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(DG1, 0, guc_def(dg1, 62, 0, 0)) \
+ fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0)) \
+ fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0)) \
+ fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0))
-:36: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'fw_def' - possible side-effects?
#36: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:51:
+#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
+ fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3)) \
+ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(DG1, 0, guc_def(dg1, 62, 0, 0)) \
+ fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0)) \
+ fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0)) \
+ fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0))
-:36: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'guc_def' - possible side-effects?
#36: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:51:
+#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
+ fw_def(ALDERLAKE_P, 0, guc_def(adlp, 62, 0, 3)) \
+ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(DG1, 0, guc_def(dg1, 62, 0, 0)) \
+ fw_def(ROCKETLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(TIGERLAKE, 0, guc_def(tgl, 62, 0, 0)) \
+ fw_def(JASPERLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, guc_def(ehl, 62, 0, 0)) \
+ fw_def(ICELAKE, 0, guc_def(icl, 62, 0, 0)) \
+ fw_def(COMETLAKE, 5, guc_def(cml, 62, 0, 0)) \
+ fw_def(COMETLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(COFFEELAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(GEMINILAKE, 0, guc_def(glk, 62, 0, 0)) \
+ fw_def(KABYLAKE, 0, guc_def(kbl, 62, 0, 0)) \
+ fw_def(BROXTON, 0, guc_def(bxt, 62, 0, 0)) \
+ fw_def(SKYLAKE, 0, guc_def(skl, 62, 0, 0))
-:53: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#53: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:68:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
+ fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(ALDERLAKE_S, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(DG1, 0, huc_def(dg1, 7, 9, 3)) \
+ fw_def(ROCKETLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(TIGERLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(JASPERLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, huc_def(icl, 9, 0, 0)) \
+ fw_def(COMETLAKE, 5, huc_def(cml, 4, 0, 0)) \
+ fw_def(COMETLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, huc_def(skl, 2, 0, 0))
-:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'fw_def' - possible side-effects?
#53: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:68:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
+ fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(ALDERLAKE_S, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(DG1, 0, huc_def(dg1, 7, 9, 3)) \
+ fw_def(ROCKETLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(TIGERLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(JASPERLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, huc_def(icl, 9, 0, 0)) \
+ fw_def(COMETLAKE, 5, huc_def(cml, 4, 0, 0)) \
+ fw_def(COMETLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, huc_def(skl, 2, 0, 0))
-:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'huc_def' - possible side-effects?
#53: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:68:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_def) \
+ fw_def(ALDERLAKE_P, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(ALDERLAKE_S, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(DG1, 0, huc_def(dg1, 7, 9, 3)) \
+ fw_def(ROCKETLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(TIGERLAKE, 0, huc_def(tgl, 7, 9, 3)) \
+ fw_def(JASPERLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ELKHARTLAKE, 0, huc_def(ehl, 9, 0, 0)) \
+ fw_def(ICELAKE, 0, huc_def(icl, 9, 0, 0)) \
+ fw_def(COMETLAKE, 5, huc_def(cml, 4, 0, 0)) \
+ fw_def(COMETLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(COFFEELAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(GEMINILAKE, 0, huc_def(glk, 4, 0, 0)) \
+ fw_def(KABYLAKE, 0, huc_def(kbl, 4, 0, 0)) \
+ fw_def(BROXTON, 0, huc_def(bxt, 2, 0, 0)) \
+ fw_def(SKYLAKE, 0, huc_def(skl, 2, 0, 0))
-:79: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#79: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:99:
+#define INTEL_UC_MODULE_FW(platform_, revid_, uc_) \
+ MODULE_FIRMWARE(uc_);
total: 2 errors, 1 warnings, 4 checks, 134 lines checked
a23ce00ab4a5 drm/i915/guc: Request RP0 before loading firmware
fbe70a3641ec drm/i915/guc: Increase GuC log size for CONFIG_DEBUG_GEM
aa67036839ee drm/i915/guc: Don't go bang in GuC log if no GuC
^ permalink raw reply [flat|nested] 23+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Assorted fixes/tweaks to GuC support (rev3)
2021-12-03 0:06 ` John.C.Harrison
` (9 preceding siblings ...)
(?)
@ 2021-12-04 1:24 ` Patchwork
-1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-12-04 1:24 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
== Series Details ==
Series: Assorted fixes/tweaks to GuC support (rev3)
URL : https://patchwork.freedesktop.org/series/97514/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 23+ messages in thread* [Intel-gfx] ✗ Fi.CI.BAT: failure for Assorted fixes/tweaks to GuC support (rev3)
2021-12-03 0:06 ` John.C.Harrison
` (10 preceding siblings ...)
(?)
@ 2021-12-04 2:03 ` Patchwork
-1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-12-04 2:03 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6736 bytes --]
== Series Details ==
Series: Assorted fixes/tweaks to GuC support (rev3)
URL : https://patchwork.freedesktop.org/series/97514/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10963 -> Patchwork_21757
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_21757 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21757, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/index.html
Participating hosts (45 -> 33)
------------------------------
Missing (12): fi-ilk-m540 bat-dg1-6 bat-dg1-5 fi-hsw-4200u fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-ctg-p8600 fi-pnv-d510 fi-bdw-samus bat-jsl-2 bat-jsl-1
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_21757:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@mman:
- fi-ivb-3770: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10963/fi-ivb-3770/igt@i915_selftest@live@mman.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-ivb-3770/igt@i915_selftest@live@mman.html
* igt@i915_selftest@live@workarounds:
- fi-rkl-guc: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10963/fi-rkl-guc/igt@i915_selftest@live@workarounds.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-rkl-guc/igt@i915_selftest@live@workarounds.html
Known issues
------------
Here are the changes found in Patchwork_21757 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u: NOTRUN -> [SKIP][5] ([fdo#109271]) +31 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html
* igt@gem_flink_basic@bad-flink:
- fi-skl-6600u: [PASS][6] -> [INCOMPLETE][7] ([i915#198] / [i915#4547])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10963/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-bdw-5557u: NOTRUN -> [DMESG-FAIL][8] ([i915#541])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-bdw-5557u/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][9] -> [DMESG-FAIL][10] ([i915#4528])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10963/fi-blb-e6850/igt@i915_selftest@live@requests.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u: NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +8 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [PASS][12] -> [DMESG-WARN][13] ([i915#4269])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10963/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
* igt@runner@aborted:
- fi-skl-6600u: NOTRUN -> [FAIL][14] ([i915#2722] / [i915#3363] / [i915#4312])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-skl-6600u/igt@runner@aborted.html
- fi-rkl-guc: NOTRUN -> [FAIL][15] ([i915#2426] / [i915#3928] / [i915#4312])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-rkl-guc/igt@runner@aborted.html
- fi-ivb-3770: NOTRUN -> [FAIL][16] ([fdo#109271] / [i915#2426] / [i915#4312])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-ivb-3770/igt@runner@aborted.html
- fi-blb-e6850: NOTRUN -> [FAIL][17] ([fdo#109271] / [i915#2403] / [i915#4312])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-blb-e6850/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-bdw-5557u: [INCOMPLETE][18] ([i915#146]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10963/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3928]: https://gitlab.freedesktop.org/drm/intel/issues/3928
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4449]: https://gitlab.freedesktop.org/drm/intel/issues/4449
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Build changes
-------------
* Linux: CI_DRM_10963 -> Patchwork_21757
CI-20190529: 20190529
CI_DRM_10963: 2b63a468d3e3c264a3d1a4773edfe8785d45d4ec @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6300: f69bd65fa9f72b7d5e5a5a22981f16d034334761 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21757: aa67036839eea3c523a99d3929e95be20435e07f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
aa67036839ee drm/i915/guc: Don't go bang in GuC log if no GuC
fbe70a3641ec drm/i915/guc: Increase GuC log size for CONFIG_DEBUG_GEM
a23ce00ab4a5 drm/i915/guc: Request RP0 before loading firmware
251e5012b67c drm/i915/uc: Allow platforms to have GuC but not HuC
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21757/index.html
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^ permalink raw reply [flat|nested] 23+ messages in thread