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From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: "Kandpal, Suraj" <suraj.kandpal@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Cc: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"Murthy,  Arun R" <arun.r.murthy@intel.com>,
	"jani.nikula@linux.intel.com" <jani.nikula@linux.intel.com>
Subject: Re: [PATCH v4 09/12] drm/i915/dp: Store SDP transmission lines in crtc_state
Date: Tue, 8 Sep 2026 11:55:51 +0530	[thread overview]
Message-ID: <d3515e34-839d-4f9d-96df-40018afdc09d@intel.com> (raw)
In-Reply-To: <DS4PPFE901A304FF139C3FC58351950B2DBE3A82@DS4PPFE901A304F.namprd11.prod.outlook.com>


On 9/1/2026 9:00 AM, Kandpal, Suraj wrote:
>> Subject: [PATCH v4 09/12] drm/i915/dp: Store SDP transmission lines in
>> crtc_state
> This needs to be either drm/i915/dip or drm/i915/display
>
>> Currently the driver only programs the transmission line for the Adaptive-Sync
>> SDP, while the hardware controls the transmission lines for other SDPs.
>>
>> Starting with Xe3p_lpd, the hardware allows the driver to program transmission
>> lines for additional DP SDPs. Prepare for this by adding fields to struct
>> intel_crtc_state to store SDP transmission lines, and include them in pipe config
>> comparison.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dip.h     | 6 ++++++
>>   drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
>>   2 files changed, 11 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dip.h
>> b/drivers/gpu/drm/i915/display/intel_dip.h
>> index e9959356226e..03ef749a79ca 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dip.h
>> +++ b/drivers/gpu/drm/i915/display/intel_dip.h
>> @@ -51,6 +51,12 @@ struct intel_dip {
>>   	 * The programmed transmit line is (Vtotal - value)
>>   	 */
>>   	u16 emp_as_sdp_tl;
>> +	u16 gmp_sdp_tl;
>> +	u16 pps_sdp_tl;
>> +	u16 vsc_sdp_tl;
>> +	u16 vsc_ext_sdp_tl;
>> +	/* Common SDP Base transmission line (Xe3p_lpd+) */
>> +	u16 cmn_sdp_tl;
>>   };
>>
>>   void intel_dip_sdp_tl_compute_config_late(struct intel_crtc_state *crtc_state);
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index c84ee0e865ee..8807897538a4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -5508,6 +5508,11 @@ intel_pipe_config_compare(const struct
>> intel_crtc_state *current_config,
>>   	PIPE_CONF_CHECK_I(set_context_latency);
>>
>>   	PIPE_CONF_CHECK_I(dip.emp_as_sdp_tl);
>> +	PIPE_CONF_CHECK_I(dip.gmp_sdp_tl);
>> +	PIPE_CONF_CHECK_I(dip.pps_sdp_tl);
>> +	PIPE_CONF_CHECK_I(dip.vsc_sdp_tl);
>> +	PIPE_CONF_CHECK_I(dip.vsc_ext_sdp_tl);
>> +	PIPE_CONF_CHECK_I(dip.cmn_sdp_tl);
> If you doing a compare in this patch itself should maybe assigning all these variables some values in comute config too in this patch too.


If we assign the values in compute config without readout, it will 
result is mismatches.

So I have introduced the new members and added them to PIPE_CONF_CHECK 
without compute config part or readout part here. Both of these are 
added together in Patch#11.

Regards,

Ankit

>
> Regards,
> Suraj Kandpal
>
>>   #undef PIPE_CONF_CHECK_X
>>   #undef PIPE_CONF_CHECK_I
>> --
>> 2.45.2

  reply	other threads:[~2026-09-08  6:26 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-11  7:33 [PATCH v4 00/12] Add support for Common SDP Transmission Line Ankit Nautiyal
2026-06-11  7:33 ` [PATCH v4 01/12] drm/i915/dip: Add new file to handle Data Island Packet hardware Ankit Nautiyal
2026-08-27  6:46   ` Kandpal, Suraj
2026-06-11  7:33 ` [PATCH v4 02/12] drm/i915/vrr: Use the helper to write EMP_AS_SDP_TL register Ankit Nautiyal
2026-08-27  6:49   ` Kandpal, Suraj
2026-06-11  7:33 ` [PATCH v4 03/12] drm/i915/intel_dip: Add check for DP encoder Ankit Nautiyal
2026-08-27  8:29   ` Kandpal, Suraj
2026-06-11  7:33 ` [PATCH v4 04/12] drm/i915/dp: Add helper to get AS SDP Transmission Line Ankit Nautiyal
2026-09-01  2:55   ` Kandpal, Suraj
2026-06-11  7:33 ` [PATCH v4 05/12] drm/i915/display: Add crtc state for DIP transmission lines Ankit Nautiyal
2026-09-01  2:56   ` Kandpal, Suraj
2026-09-08 15:35   ` Jani Nikula
2026-09-10  2:44     ` Nautiyal, Ankit K
2026-06-11  7:33 ` [PATCH v4 06/12] drm/i915/dip: Store and use AS SDP transmission line from crtc state Ankit Nautiyal
2026-09-01  3:03   ` Kandpal, Suraj
2026-09-08  6:14     ` Nautiyal, Ankit K
2026-06-11  7:33 ` [PATCH v4 07/12] drm/i915/nvl: Add register definitions for common SDP Transmission Line Ankit Nautiyal
2026-06-11  7:33 ` [PATCH v4 08/12] drm/i915/display: Add HAS_COMMON_SDP_TL macro Ankit Nautiyal
2026-09-01  3:26   ` Kandpal, Suraj
2026-06-11  7:33 ` [PATCH v4 09/12] drm/i915/dp: Store SDP transmission lines in crtc_state Ankit Nautiyal
2026-09-01  3:30   ` Kandpal, Suraj
2026-09-08  6:25     ` Nautiyal, Ankit K [this message]
2026-06-11  7:33 ` [PATCH v4 10/12] drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission line Ankit Nautiyal
2026-06-11  7:33 ` [PATCH v4 11/12] drm/i915/dip: Enable Common " Ankit Nautiyal
2026-06-11  7:33 ` [PATCH v4 12/12] drm/i915/display: Dump DIP Transmission lines Ankit Nautiyal
2026-06-11  8:37 ` ✗ CI.checkpatch: warning for Add support for Common SDP Transmission Line (rev4) Patchwork
2026-06-11  8:40 ` ✓ CI.KUnit: success " Patchwork
2026-06-11  9:02 ` ✓ i915.CI.BAT: " Patchwork
2026-06-11 10:01 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-11 19:07 ` ✓ Xe.CI.FULL: " Patchwork
2026-06-12  4:59 ` ✗ i915.CI.Full: failure " Patchwork

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