Re: [PATCH V11 3/4] arm64: dts: qcom: Add support for ipq9574 SoC and RDP433 variant

From: Marc Zyngier <maz@kernel.org>
To: Devi Priya <quic_devipriy@quicinc.com>
Cc: agross@kernel.org, andersson@kernel.org,
	konrad.dybcio@linaro.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com,
	sboyd@kernel.org, linus.walleij@linaro.org,
	catalin.marinas@arm.com, will@kernel.org, p.zabel@pengutronix.de,
	shawnguo@kernel.org, arnd@arndb.de, marcel.ziswiler@toradex.com,
	dmitry.baryshkov@linaro.org, geert+renesas@glider.be,
	rafal@milecki.pl, nfraprado@collabora.com, broonie@kernel.org,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	quic_srichara@quicinc.com, quic_gokulsri@quicinc.com,
	quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com,
	quic_arajkuma@quicinc.com, quic_anusha@quicinc.com,
	quic_poovendh@quicinc.com
Subject: Re: [PATCH V11 3/4] arm64: dts: qcom: Add support for ipq9574 SoC and RDP433 variant
Date: Tue, 04 Apr 2023 12:03:09 +0100	[thread overview]
Message-ID: <d410c51ee4beeb4dfee80e13d54d598b@kernel.org> (raw)
In-Reply-To: <20230404101622.5394-4-quic_devipriy@quicinc.com>

On 2023-04-04 11:16, Devi Priya wrote:
> Add initial device tree support for Qualcomm IPQ9574 SoC and
> Reference Design Platform(RDP) 433 which is based on IPQ9574
> family of SoCs
> 
> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
> Co-developed-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
> Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
> ---
>  Changes in V11:
> 	- Dropped the unused backup clock source bias_pll_ubi_nc_clk
> 
>  arch/arm64/boot/dts/qcom/Makefile           |   1 +
>  arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts |  84 +++++++
>  arch/arm64/boot/dts/qcom/ipq9574.dtsi       | 263 ++++++++++++++++++++
>  3 files changed, 348 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
>  create mode 100644 arch/arm64/boot/dts/qcom/ipq9574.dtsi
> 

[...]

> +		intc: interrupt-controller@b000000 {
> +			compatible = "qcom,msm-qgic2";
> +			reg = <0x0b000000 0x1000>,  /* GICD */
> +			      <0x0b002000 0x1000>,  /* GICC */

This is definitely wrong. The GICC region cannot be less than
8kB, as the GICC_DIR register is in the second 4kB region.

I'm pretty sure the kernel shouts at you when booting at EL2.

> +			      <0x0b001000 0x1000>,  /* GICH */
> +			      <0x0b004000 0x1000>;  /* GICV */

Same thing here.

> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			interrupt-controller;
> +			#interrupt-cells = <3>;
> +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

Missing target CPU encoding.

         M.
-- 
Jazz is not dead. It just smells funny...