From: Andrew Cooper <Andrew.Cooper3@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Wei Liu" <wl@xen.org>, "Roger Pau Monne" <roger.pau@citrix.com>,
"Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH] x86/CPUID: surface suitable value in EBX of XSTATE subleaf 1
Date: Tue, 23 Aug 2022 10:48:43 +0000 [thread overview]
Message-ID: <d5188b0d-43d9-44f1-2aae-e8ca0350a911@citrix.com> (raw)
In-Reply-To: <b3873ba1-f2f5-2f64-9bf6-d819f614019d@suse.com>
On 23/08/2022 10:27, Jan Beulich wrote:
> On 23.08.2022 10:59, Andrew Cooper wrote:
>> On 23/08/2022 07:42, Jan Beulich wrote:
>>> exposed to PV domains.
>>>
>>> Considering that the size reported is that of the compacted save area,
>>> I view Linux'es assumption as appropriate (short of the SDM properly
>>> considering the case). Therefore we need to populate the field also when
>>> only XSAVEC is supported for a guest.
>> This is a mess. The SDM is fairly clear (but only in Vol1) that this
>> leaf is specific to XSAVES.
> The way it's written my assumption is that they simply didn't care about
> XSAVEC when writing this, or they were assuming that both features would
> always be supported together (yet even if they are in Intel's hardware,
> the architecture should spell out things as if both were entirely
> independent, or it should specify that one takes the other as a prereq).
Real hardware has XSAVEC == XSAVES on Intel (Skylake) and AMD (Zen1).
Despite an attempt to separate the parts of the ISA, they are
inextricably linked.
It is only under virt that we get XSAVEC without XSAVES.
>>> Fixes: 460b9a4b3630 ("x86/xsaves: enable xsaves/xrstors for hvm guest")
>>> Fixes: 8d050ed1097c ("x86: don't expose XSAVES capability to PV guests")
>>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>> CC Marek. Looks like Jan has found the issue you reported on IRC.
>>
>> Jan: Be aware that I submitted
>> https://lore.kernel.org/lkml/20220810221909.12768-1-andrew.cooper3@citrix.com/
>> to Linux to correct some of the diagnostics.
>>> --- a/xen/arch/x86/cpuid.c
>>> +++ b/xen/arch/x86/cpuid.c
>>> @@ -1142,7 +1142,7 @@ void guest_cpuid(const struct vcpu *v, u
>>> switch ( subleaf )
>>> {
>>> case 1:
>>> - if ( p->xstate.xsaves )
>>> + if ( p->xstate.xsavec || p->xstate.xsaves )
>> If we're doing this, then it wants to be xsavec only, with the comment
>> being extended to explain why.
> Why would that be? Both insns use compacted format, and neither is
> dependent upon the other in terms of being supported. IOW XSAVES alone
> and XSAVEC alone enabled for a domain should still lead through this
> path.
Hmm. Because my fixes to compaction handling haven't been committed
yet, and in particular one the one which makes XSAVES strictly depend on
XSAVEC.
In which case this hunk is correct for Xen as it currently is, and will
be need to be adjusted when I rebase the compaction series.
>> But this is going to further complicate my several-year-old series
>> trying to get Xen's XSTATE handling into a position where we can start
>> to offer supervisor states.
> Where do you see further complication? The necessary fiddling with XSS
> here would of course be dependent upon p->xstate.xsaves alone (or,
> maybe better, on the set of enabled features in XSS being non-empty),
> but that's simply another (inner) if().
>
> As an aside, I actually wonder what use the supplied size is to user
> mode code when any XSS-controlled feature is enabled: They'd allocate
> a needlessly large block of memory, as they would only be able to use
> XSAVEC.
This field is an already known kernel=>user infoleak. There are threads
about it on LKML.
But it does highlight another problem. This change does not fix Linux
on AMD Zen3 hardware, where the kernel will find the CPUID value larger
than it can calculate the size to be, because Xen's use of CET-SS will
show up in the CPUID value.
Linux needs an adjustment from != to <= for this check.
~Andrew
next prev parent reply other threads:[~2022-08-23 10:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-23 6:42 [PATCH] x86/CPUID: surface suitable value in EBX of XSTATE subleaf 1 Jan Beulich
2022-08-23 8:59 ` Andrew Cooper
2022-08-23 9:27 ` Jan Beulich
2022-08-23 10:48 ` Andrew Cooper [this message]
2022-08-23 12:01 ` Jan Beulich
2022-08-24 12:02 ` Andrew Cooper
2022-08-24 12:11 ` Andrew Cooper
2022-08-24 6:00 ` Jan Beulich
2022-08-24 12:19 ` Andrew Cooper
2022-08-24 12:36 ` Jan Beulich
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