From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: "Mukunda,Vijendar" <vijendar.mukunda@amd.com>,
broonie@kernel.org, vkoul@kernel.org,
alsa-devel@alsa-project.org
Cc: Mastan.Katragadda@amd.com, Sunil-kumar.Dommati@amd.com,
Basavaraj.Hiregoudar@amd.com,
open list <linux-kernel@vger.kernel.org>,
Mario.Limonciello@amd.com, arungopal.kondaveeti@amd.com,
Sanyog Kale <sanyog.r.kale@intel.com>,
Bard Liao <yung-chuan.liao@linux.intel.com>
Subject: Re: [PATCH 02/19] soundwire: amd: Add support for AMD Master driver
Date: Mon, 16 Jan 2023 08:57:13 -0600 [thread overview]
Message-ID: <d5638ec8-3fa4-4643-9740-ef87a4ba5833@linux.intel.com> (raw)
In-Reply-To: <dbf20726-3900-9bff-7a72-14608702f636@amd.com>
On 1/16/23 01:53, Mukunda,Vijendar wrote:
> On 14/01/23 00:11, Pierre-Louis Bossart wrote:
>>>>> + for (index = 0; index < 2; index++) {
>>>>> + if (response_buf[index] == -ETIMEDOUT) {
>>>>> + dev_err(ctrl->dev, "Program SCP cmd timeout\n");
>>>>> + timeout = 1;
>>>>> + } else if (!(response_buf[index] & AMD_SDW_MCP_RESP_ACK)) {
>>>>> + no_ack = 1;
>>>>> + if (response_buf[index] & AMD_SDW_MCP_RESP_NACK) {
>>>>> + nack = 1;
>>>>> + dev_err(ctrl->dev, "Program SCP NACK received\n");
>>>>> + }
>>>> this is a copy of the cadence_master.c code... With the error added that
>>>> this is not for a controller but for a master...
>>> Its manager instance only. Our immediate command and response
>>> mechanism allows sending commands over the link and get the
>>> response for every command immediately, unlike as mentioned in
>>> candence_master.c.
>> I don't get the reply. The Cadence IP also has the ability to get the
>> response immediately. There's limited scope for creativity, the commands
>> are defined in the spec and the responses as well.
> As per our understanding in Intel code, responses are processed
> after sending all commands.
> In our case, we send the command and process the response
> immediately before invoking the next command.
The Cadence IP can queue a number of commands, I think 8 off the top of
my head. But the response is provided immediately after each command.
Maybe the disconnect is that there's an ability to define a watermark on
the response buffer, so that the software can decide to process the
command responses in one shot.
>>>>> + }
>>>>> + }
>>>>> +
>>>>> + if (timeout) {
>>>>> + dev_err_ratelimited(ctrl->dev,
>>>>> + "SCP_addrpage command timeout for Slave %d\n", msg->dev_num);
>>>>> + return SDW_CMD_TIMEOUT;
>>>>> + }
>>>>> +
>>>>> + if (nack) {
>>>>> + dev_err_ratelimited(ctrl->dev,
>>>>> + "SCP_addrpage NACKed for Slave %d\n", msg->dev_num);
>>>>> + return SDW_CMD_FAIL;
>>>>> + }
>>>>> +
>>>>> + if (no_ack) {
>>>>> + dev_dbg_ratelimited(ctrl->dev,
>>>>> + "SCP_addrpage ignored for Slave %d\n", msg->dev_num);
>>>>> + return SDW_CMD_IGNORED;
>>>>> + }
>>>>> + return SDW_CMD_OK;
>>>> this should probably become a helper since the response is really the
>>>> same as in cadence_master.c
>>>>
>>>> There's really room for optimization and reuse here.
>>> not really needed. Please refer above comment as command/response
>>> mechanism differs from Intel's implementation.
>> how? there's a buffer of responses in both cases. please clarify.
> Ours implementation is not interrupt driven like Intel.
> When we send command over the link, we will wait for command's
> response in polling method and process the response immediately
> before issuing the new command.
On the Intel side we use an interrupt to avoid polling, and in case of N
commands the watermark will be set to N to reduce the overhead. That
said, most users only use 1 command at a time, it's only recently that
Cirrus Logic experimented with multiple commands to speed-up transfers.
Even if there are differences in the way the responses are processed,
whether one-at-a-time or in a batch, the point remains that each command
response can be individually analyzed and that could be using a helper -
moving code from cadence_master.c into the bus layer.
WARNING: multiple messages have this Message-ID (diff)
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: "Mukunda,Vijendar" <vijendar.mukunda@amd.com>,
broonie@kernel.org, vkoul@kernel.org,
alsa-devel@alsa-project.org
Cc: Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com,
Mario.Limonciello@amd.com, Mastan.Katragadda@amd.com,
arungopal.kondaveeti@amd.com,
Bard Liao <yung-chuan.liao@linux.intel.com>,
Sanyog Kale <sanyog.r.kale@intel.com>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 02/19] soundwire: amd: Add support for AMD Master driver
Date: Mon, 16 Jan 2023 08:57:13 -0600 [thread overview]
Message-ID: <d5638ec8-3fa4-4643-9740-ef87a4ba5833@linux.intel.com> (raw)
In-Reply-To: <dbf20726-3900-9bff-7a72-14608702f636@amd.com>
On 1/16/23 01:53, Mukunda,Vijendar wrote:
> On 14/01/23 00:11, Pierre-Louis Bossart wrote:
>>>>> + for (index = 0; index < 2; index++) {
>>>>> + if (response_buf[index] == -ETIMEDOUT) {
>>>>> + dev_err(ctrl->dev, "Program SCP cmd timeout\n");
>>>>> + timeout = 1;
>>>>> + } else if (!(response_buf[index] & AMD_SDW_MCP_RESP_ACK)) {
>>>>> + no_ack = 1;
>>>>> + if (response_buf[index] & AMD_SDW_MCP_RESP_NACK) {
>>>>> + nack = 1;
>>>>> + dev_err(ctrl->dev, "Program SCP NACK received\n");
>>>>> + }
>>>> this is a copy of the cadence_master.c code... With the error added that
>>>> this is not for a controller but for a master...
>>> Its manager instance only. Our immediate command and response
>>> mechanism allows sending commands over the link and get the
>>> response for every command immediately, unlike as mentioned in
>>> candence_master.c.
>> I don't get the reply. The Cadence IP also has the ability to get the
>> response immediately. There's limited scope for creativity, the commands
>> are defined in the spec and the responses as well.
> As per our understanding in Intel code, responses are processed
> after sending all commands.
> In our case, we send the command and process the response
> immediately before invoking the next command.
The Cadence IP can queue a number of commands, I think 8 off the top of
my head. But the response is provided immediately after each command.
Maybe the disconnect is that there's an ability to define a watermark on
the response buffer, so that the software can decide to process the
command responses in one shot.
>>>>> + }
>>>>> + }
>>>>> +
>>>>> + if (timeout) {
>>>>> + dev_err_ratelimited(ctrl->dev,
>>>>> + "SCP_addrpage command timeout for Slave %d\n", msg->dev_num);
>>>>> + return SDW_CMD_TIMEOUT;
>>>>> + }
>>>>> +
>>>>> + if (nack) {
>>>>> + dev_err_ratelimited(ctrl->dev,
>>>>> + "SCP_addrpage NACKed for Slave %d\n", msg->dev_num);
>>>>> + return SDW_CMD_FAIL;
>>>>> + }
>>>>> +
>>>>> + if (no_ack) {
>>>>> + dev_dbg_ratelimited(ctrl->dev,
>>>>> + "SCP_addrpage ignored for Slave %d\n", msg->dev_num);
>>>>> + return SDW_CMD_IGNORED;
>>>>> + }
>>>>> + return SDW_CMD_OK;
>>>> this should probably become a helper since the response is really the
>>>> same as in cadence_master.c
>>>>
>>>> There's really room for optimization and reuse here.
>>> not really needed. Please refer above comment as command/response
>>> mechanism differs from Intel's implementation.
>> how? there's a buffer of responses in both cases. please clarify.
> Ours implementation is not interrupt driven like Intel.
> When we send command over the link, we will wait for command's
> response in polling method and process the response immediately
> before issuing the new command.
On the Intel side we use an interrupt to avoid polling, and in case of N
commands the watermark will be set to N to reduce the overhead. That
said, most users only use 1 command at a time, it's only recently that
Cirrus Logic experimented with multiple commands to speed-up transfers.
Even if there are differences in the way the responses are processed,
whether one-at-a-time or in a batch, the point remains that each command
response can be individually analyzed and that could be using a helper -
moving code from cadence_master.c into the bus layer.
next prev parent reply other threads:[~2023-01-16 18:07 UTC|newest]
Thread overview: 170+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 9:02 [PATCH 00/19] Add soundwire support for Pink Sardine platform Vijendar Mukunda
2023-01-11 9:02 ` [PATCH 01/19] ASoC: amd: ps: create platform devices based on acp config Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 13:27 ` Amadeusz Sławiński
2023-01-11 13:27 ` Amadeusz Sławiński
2023-01-11 14:13 ` Mukunda,Vijendar
2023-01-11 14:13 ` Mukunda,Vijendar
2023-01-11 13:32 ` Pierre-Louis Bossart
2023-01-11 13:32 ` Pierre-Louis Bossart
2023-01-13 12:36 ` Mukunda,Vijendar
2023-01-13 12:36 ` Mukunda,Vijendar
2023-01-13 17:11 ` Pierre-Louis Bossart
2023-01-13 17:11 ` Pierre-Louis Bossart
2023-01-16 8:02 ` Mukunda,Vijendar
2023-01-16 8:02 ` Mukunda,Vijendar
2023-01-31 13:09 ` Mukunda,Vijendar
2023-01-31 13:09 ` Mukunda,Vijendar
2023-01-31 13:24 ` Mario Limonciello
2023-01-31 13:24 ` Mario Limonciello
2023-01-31 16:00 ` Pierre-Louis Bossart
2023-01-31 16:00 ` Pierre-Louis Bossart
2023-01-31 22:57 ` Limonciello, Mario
2023-01-31 22:57 ` Limonciello, Mario
2023-02-01 0:51 ` Pierre-Louis Bossart
2023-02-01 0:51 ` Pierre-Louis Bossart
2023-02-01 1:45 ` Mukunda,Vijendar
2023-02-01 1:45 ` Mukunda,Vijendar
2023-02-01 2:03 ` Pierre-Louis Bossart
2023-02-01 2:03 ` Pierre-Louis Bossart
2023-02-01 2:10 ` Mukunda,Vijendar
2023-02-01 2:10 ` Mukunda,Vijendar
2023-02-01 3:52 ` Pierre-Louis Bossart
2023-02-01 6:01 ` Mukunda,Vijendar
2023-02-01 23:08 ` Pierre-Louis Bossart
2023-02-06 6:30 ` Mukunda,Vijendar
2023-02-06 14:50 ` Pierre-Louis Bossart
2023-02-06 16:38 ` Mukunda,Vijendar
2023-01-11 9:02 ` [PATCH 02/19] soundwire: amd: Add support for AMD Master driver Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 13:59 ` Amadeusz Sławiński
2023-01-11 13:59 ` Amadeusz Sławiński
2023-01-11 14:16 ` Mukunda,Vijendar
2023-01-11 14:16 ` Mukunda,Vijendar
2023-01-11 14:37 ` Pierre-Louis Bossart
2023-01-11 14:37 ` Pierre-Louis Bossart
2023-01-13 18:21 ` Mukunda,Vijendar
2023-01-13 18:21 ` Mukunda,Vijendar
2023-01-13 18:41 ` Pierre-Louis Bossart
2023-01-13 18:41 ` Pierre-Louis Bossart
2023-01-16 7:53 ` Mukunda,Vijendar
2023-01-16 7:53 ` Mukunda,Vijendar
2023-01-16 14:57 ` Pierre-Louis Bossart [this message]
2023-01-16 14:57 ` Pierre-Louis Bossart
2023-01-17 11:37 ` Mukunda,Vijendar
2023-01-17 11:37 ` Mukunda,Vijendar
2023-01-11 9:02 ` [PATCH 03/19] soundwire: amd: register sdw controller dai ops Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 14:58 ` Pierre-Louis Bossart
2023-01-11 14:58 ` Pierre-Louis Bossart
2023-01-13 11:31 ` Mukunda,Vijendar
2023-01-13 11:31 ` Mukunda,Vijendar
2023-01-13 17:13 ` Pierre-Louis Bossart
2023-01-13 17:13 ` Pierre-Louis Bossart
2023-01-11 14:59 ` Amadeusz Sławiński
2023-01-11 14:59 ` Amadeusz Sławiński
2023-01-11 9:02 ` [PATCH 04/19] soundwire: amd: enable build for AMD soundwire master driver Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-19 18:35 ` kernel test robot
2023-01-19 18:35 ` kernel test robot
2023-01-11 9:02 ` [PATCH 05/19] soundwire: amd: add soundwire interrupt handling Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 15:19 ` Pierre-Louis Bossart
2023-01-11 15:19 ` Pierre-Louis Bossart
2023-01-19 22:00 ` kernel test robot
2023-01-19 22:00 ` kernel test robot
2023-01-11 9:02 ` [PATCH 06/19] ASoC: amd: ps: add support for soundwire interrupts in acp pci driver Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 9:02 ` [PATCH 07/19] ASoC: amd: ps: add soundwire dma driver for pink sardine platform Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 15:22 ` Pierre-Louis Bossart
2023-01-11 15:22 ` Pierre-Louis Bossart
2023-01-12 9:10 ` Mukunda,Vijendar
2023-01-12 9:10 ` Mukunda,Vijendar
2023-01-11 9:02 ` [PATCH 08/19] ASoC: amd: ps: add soundwire dma driver dma ops Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 13:04 ` Mark Brown
2023-01-11 13:04 ` Mark Brown
2023-01-11 14:08 ` Mukunda,Vijendar
2023-01-11 14:08 ` Mukunda,Vijendar
2023-01-11 15:34 ` Pierre-Louis Bossart
2023-01-11 15:34 ` Pierre-Louis Bossart
2023-01-13 11:16 ` Mukunda,Vijendar
2023-01-13 11:16 ` Mukunda,Vijendar
2023-01-13 17:05 ` Pierre-Louis Bossart
2023-01-13 17:05 ` Pierre-Louis Bossart
2023-01-16 6:59 ` Mukunda,Vijendar
2023-01-16 6:59 ` Mukunda,Vijendar
2023-01-11 9:02 ` [PATCH 09/19] ASoC: amd: ps: add support for Soundwire DMA interrupts Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 15:38 ` Pierre-Louis Bossart
2023-01-11 15:38 ` Pierre-Louis Bossart
2023-01-12 10:55 ` Mukunda,Vijendar
2023-01-12 10:55 ` Mukunda,Vijendar
2023-01-11 9:02 ` [PATCH 10/19] ASoC: amd: ps: enable Soundwire DMA driver build Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 9:02 ` [PATCH 11/19] ASoC: amd: update comments in Kconfig file Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 9:02 ` [PATCH 12/19] ASoC: amd: ps: Add soundwire specific checks in pci driver in pm ops Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 9:02 ` [PATCH 13/19] ASoC: amd: ps: add support for runtime pm ops for soundwire dma driver Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 9:02 ` [PATCH 14/19] soundwire: amd: add runtime pm ops for AMD master driver Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 15:47 ` Pierre-Louis Bossart
2023-01-11 15:47 ` Pierre-Louis Bossart
2023-01-12 10:35 ` Mukunda,Vijendar
2023-01-12 10:35 ` Mukunda,Vijendar
2023-01-12 14:47 ` Pierre-Louis Bossart
2023-01-12 14:47 ` Pierre-Louis Bossart
2023-01-11 9:02 ` [PATCH 15/19] soundwire: amd: add startup and shutdown dai ops Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 15:49 ` Pierre-Louis Bossart
2023-01-11 15:49 ` Pierre-Louis Bossart
2023-01-12 10:22 ` Mukunda,Vijendar
2023-01-12 10:22 ` Mukunda,Vijendar
2023-01-11 9:02 ` [PATCH 16/19] soundwire: amd: handle wake enable interrupt Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 15:54 ` Pierre-Louis Bossart
2023-01-11 15:54 ` Pierre-Louis Bossart
2023-01-12 10:21 ` Mukunda,Vijendar
2023-01-12 10:21 ` Mukunda,Vijendar
2023-01-11 9:02 ` [PATCH 17/19] soundwire: amd: add pm_prepare callback and pm ops support Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 15:58 ` Pierre-Louis Bossart
2023-01-11 15:58 ` Pierre-Louis Bossart
2023-01-12 10:14 ` Mukunda,Vijendar
2023-01-12 10:14 ` Mukunda,Vijendar
2023-01-12 14:50 ` Pierre-Louis Bossart
2023-01-12 14:50 ` Pierre-Louis Bossart
2023-01-11 9:02 ` [PATCH 18/19] ASoC: amd: ps: implement system level pm ops for soundwire dma driver Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 9:02 ` [PATCH 19/19] ASoC: amd: ps: increase runtime suspend delay Vijendar Mukunda
2023-01-11 9:02 ` Vijendar Mukunda
2023-01-11 16:02 ` Pierre-Louis Bossart
2023-01-11 16:02 ` Pierre-Louis Bossart
2023-01-12 11:02 ` Mukunda,Vijendar
2023-01-12 11:02 ` Mukunda,Vijendar
2023-01-12 14:54 ` Pierre-Louis Bossart
2023-01-12 14:54 ` Pierre-Louis Bossart
2023-01-12 15:29 ` Limonciello, Mario
2023-01-12 15:29 ` Limonciello, Mario
2023-01-12 16:05 ` Pierre-Louis Bossart
2023-01-13 10:58 ` Mukunda,Vijendar
2023-01-13 17:33 ` Pierre-Louis Bossart
2023-01-13 19:57 ` Mark Brown
2023-01-13 19:57 ` Mark Brown
2023-01-16 8:35 ` Mukunda,Vijendar
2023-01-16 8:35 ` Mukunda,Vijendar
2023-01-16 15:02 ` Pierre-Louis Bossart
2023-01-16 15:02 ` Pierre-Louis Bossart
2023-01-17 11:33 ` Mukunda,Vijendar
2023-01-17 11:33 ` Mukunda,Vijendar
2023-01-17 11:51 ` Pierre-Louis Bossart
2023-01-17 11:51 ` Pierre-Louis Bossart
2023-01-17 12:16 ` Mark Brown
2023-01-17 12:16 ` Mark Brown
2023-01-17 12:36 ` Pierre-Louis Bossart
2023-01-17 12:36 ` Pierre-Louis Bossart
2023-01-11 13:36 ` [PATCH 00/19] Add soundwire support for Pink Sardine platform Pierre-Louis Bossart
2023-01-12 9:08 ` Mukunda,Vijendar
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