From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
"Vinod Koul" <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chen-Yu Tsai <wenst@chromium.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-phy@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <rex-bc.chen@mediatek.com>,
<randy.wu@mediatek.com>, <jieyy.yang@mediatek.com>,
<chuanjia.liu@mediatek.com>, <qizhong.cheng@mediatek.com>,
<jian.yang@mediatek.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
Date: Fri, 18 Mar 2022 22:45:23 +0800 [thread overview]
Message-ID: <da5eec2a0f96c882f79d124ecefcd357fe0d6b63.camel@mediatek.com> (raw)
In-Reply-To: <d48c0023-231c-4011-5548-4b260b3fe172@kernel.org>
Hi Krzysztof,
On Fri, 2022-03-18 at 14:55 +0100, Krzysztof Kozlowski wrote:
> On 18/03/2022 10:54, Jianjun Wang wrote:
> > Add YAML schema documentation for PCIe PHY on MediaTek chipsets.
> >
> > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> > ---
> > .../bindings/phy/mediatek,pcie-phy.yaml | 75
> > +++++++++++++++++++
> > 1 file changed, 75 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,pcie-
> > phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,pcie-
> > phy.yaml
> > new file mode 100644
> > index 000000000000..868bf976568b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
> > @@ -0,0 +1,75 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek PCIe PHY
> > +
> > +maintainers:
> > + - Jianjun Wang <jianjun.wang@mediatek.com>
> > +
> > +description: |
> > + The PCIe PHY supports physical layer functionality for PCIe Gen3
> > port.
> > +
> > +properties:
> > + compatible:
> > + const: mediatek,mt8195-pcie-phy
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + reg-names:
> > + items:
> > + - const: sif
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > + nvmem-cells:
> > + description:
> > + Phandles to nvmem cell that contains the efuse data, if
> > unspecified,
> > + default value is used.
>
> maxItems: 7
Thanks for your review, I'll fix it in the next version.
>
> Best regards,
> Krzysztof
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
"Vinod Koul" <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chen-Yu Tsai <wenst@chromium.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-phy@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <rex-bc.chen@mediatek.com>,
<randy.wu@mediatek.com>, <jieyy.yang@mediatek.com>,
<chuanjia.liu@mediatek.com>, <qizhong.cheng@mediatek.com>,
<jian.yang@mediatek.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
Date: Fri, 18 Mar 2022 22:45:23 +0800 [thread overview]
Message-ID: <da5eec2a0f96c882f79d124ecefcd357fe0d6b63.camel@mediatek.com> (raw)
In-Reply-To: <d48c0023-231c-4011-5548-4b260b3fe172@kernel.org>
Hi Krzysztof,
On Fri, 2022-03-18 at 14:55 +0100, Krzysztof Kozlowski wrote:
> On 18/03/2022 10:54, Jianjun Wang wrote:
> > Add YAML schema documentation for PCIe PHY on MediaTek chipsets.
> >
> > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> > ---
> > .../bindings/phy/mediatek,pcie-phy.yaml | 75
> > +++++++++++++++++++
> > 1 file changed, 75 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,pcie-
> > phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,pcie-
> > phy.yaml
> > new file mode 100644
> > index 000000000000..868bf976568b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
> > @@ -0,0 +1,75 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek PCIe PHY
> > +
> > +maintainers:
> > + - Jianjun Wang <jianjun.wang@mediatek.com>
> > +
> > +description: |
> > + The PCIe PHY supports physical layer functionality for PCIe Gen3
> > port.
> > +
> > +properties:
> > + compatible:
> > + const: mediatek,mt8195-pcie-phy
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + reg-names:
> > + items:
> > + - const: sif
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > + nvmem-cells:
> > + description:
> > + Phandles to nvmem cell that contains the efuse data, if
> > unspecified,
> > + default value is used.
>
> maxItems: 7
Thanks for your review, I'll fix it in the next version.
>
> Best regards,
> Krzysztof
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
"Vinod Koul" <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chen-Yu Tsai <wenst@chromium.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-phy@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <rex-bc.chen@mediatek.com>,
<randy.wu@mediatek.com>, <jieyy.yang@mediatek.com>,
<chuanjia.liu@mediatek.com>, <qizhong.cheng@mediatek.com>,
<jian.yang@mediatek.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
Date: Fri, 18 Mar 2022 22:45:23 +0800 [thread overview]
Message-ID: <da5eec2a0f96c882f79d124ecefcd357fe0d6b63.camel@mediatek.com> (raw)
In-Reply-To: <d48c0023-231c-4011-5548-4b260b3fe172@kernel.org>
Hi Krzysztof,
On Fri, 2022-03-18 at 14:55 +0100, Krzysztof Kozlowski wrote:
> On 18/03/2022 10:54, Jianjun Wang wrote:
> > Add YAML schema documentation for PCIe PHY on MediaTek chipsets.
> >
> > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> > ---
> > .../bindings/phy/mediatek,pcie-phy.yaml | 75
> > +++++++++++++++++++
> > 1 file changed, 75 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,pcie-
> > phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,pcie-
> > phy.yaml
> > new file mode 100644
> > index 000000000000..868bf976568b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
> > @@ -0,0 +1,75 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek PCIe PHY
> > +
> > +maintainers:
> > + - Jianjun Wang <jianjun.wang@mediatek.com>
> > +
> > +description: |
> > + The PCIe PHY supports physical layer functionality for PCIe Gen3
> > port.
> > +
> > +properties:
> > + compatible:
> > + const: mediatek,mt8195-pcie-phy
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + reg-names:
> > + items:
> > + - const: sif
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > + nvmem-cells:
> > + description:
> > + Phandles to nvmem cell that contains the efuse data, if
> > unspecified,
> > + default value is used.
>
> maxItems: 7
Thanks for your review, I'll fix it in the next version.
>
> Best regards,
> Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
"Vinod Koul" <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chen-Yu Tsai <wenst@chromium.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-phy@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <rex-bc.chen@mediatek.com>,
<randy.wu@mediatek.com>, <jieyy.yang@mediatek.com>,
<chuanjia.liu@mediatek.com>, <qizhong.cheng@mediatek.com>,
<jian.yang@mediatek.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
Date: Fri, 18 Mar 2022 22:45:23 +0800 [thread overview]
Message-ID: <da5eec2a0f96c882f79d124ecefcd357fe0d6b63.camel@mediatek.com> (raw)
In-Reply-To: <d48c0023-231c-4011-5548-4b260b3fe172@kernel.org>
Hi Krzysztof,
On Fri, 2022-03-18 at 14:55 +0100, Krzysztof Kozlowski wrote:
> On 18/03/2022 10:54, Jianjun Wang wrote:
> > Add YAML schema documentation for PCIe PHY on MediaTek chipsets.
> >
> > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> > ---
> > .../bindings/phy/mediatek,pcie-phy.yaml | 75
> > +++++++++++++++++++
> > 1 file changed, 75 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,pcie-
> > phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,pcie-
> > phy.yaml
> > new file mode 100644
> > index 000000000000..868bf976568b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
> > @@ -0,0 +1,75 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek PCIe PHY
> > +
> > +maintainers:
> > + - Jianjun Wang <jianjun.wang@mediatek.com>
> > +
> > +description: |
> > + The PCIe PHY supports physical layer functionality for PCIe Gen3
> > port.
> > +
> > +properties:
> > + compatible:
> > + const: mediatek,mt8195-pcie-phy
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + reg-names:
> > + items:
> > + - const: sif
> > +
> > + "#phy-cells":
> > + const: 0
> > +
> > + nvmem-cells:
> > + description:
> > + Phandles to nvmem cell that contains the efuse data, if
> > unspecified,
> > + default value is used.
>
> maxItems: 7
Thanks for your review, I'll fix it in the next version.
>
> Best regards,
> Krzysztof
next prev parent reply other threads:[~2022-03-18 14:45 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-18 9:54 [PATCH v2 0/2] phy: mediatek: Add PCIe PHY driver Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 9:54 ` [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 11:12 ` AngeloGioacchino Del Regno
2022-03-18 11:12 ` AngeloGioacchino Del Regno
2022-03-18 11:12 ` AngeloGioacchino Del Regno
2022-03-18 11:12 ` AngeloGioacchino Del Regno
2022-03-18 13:51 ` Krzysztof Kozlowski
2022-03-18 13:51 ` Krzysztof Kozlowski
2022-03-18 13:51 ` Krzysztof Kozlowski
2022-03-18 13:51 ` Krzysztof Kozlowski
2022-03-18 13:56 ` AngeloGioacchino Del Regno
2022-03-18 13:56 ` AngeloGioacchino Del Regno
2022-03-18 13:56 ` AngeloGioacchino Del Regno
2022-03-18 13:56 ` AngeloGioacchino Del Regno
2022-03-18 14:43 ` Jianjun Wang
2022-03-18 14:43 ` Jianjun Wang
2022-03-18 14:43 ` Jianjun Wang
2022-03-18 14:43 ` Jianjun Wang
2022-03-21 4:24 ` Chen-Yu Tsai
2022-03-21 4:24 ` Chen-Yu Tsai
2022-03-21 4:24 ` Chen-Yu Tsai
2022-03-21 4:24 ` Chen-Yu Tsai
2022-03-18 13:55 ` Krzysztof Kozlowski
2022-03-18 13:55 ` Krzysztof Kozlowski
2022-03-18 13:55 ` Krzysztof Kozlowski
2022-03-18 13:55 ` Krzysztof Kozlowski
2022-03-18 14:45 ` Jianjun Wang [this message]
2022-03-18 14:45 ` Jianjun Wang
2022-03-18 14:45 ` Jianjun Wang
2022-03-18 14:45 ` Jianjun Wang
2022-03-18 9:54 ` [PATCH v2 2/2] phy: mediatek: Add PCIe PHY driver Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 9:54 ` Jianjun Wang
2022-03-18 9:59 ` Chen-Yu Tsai
2022-03-18 9:59 ` Chen-Yu Tsai
2022-03-18 9:59 ` Chen-Yu Tsai
2022-03-18 9:59 ` Chen-Yu Tsai
2022-03-18 10:57 ` AngeloGioacchino Del Regno
2022-03-18 10:57 ` AngeloGioacchino Del Regno
2022-03-18 10:57 ` AngeloGioacchino Del Regno
2022-03-18 10:57 ` AngeloGioacchino Del Regno
2022-03-18 11:48 ` Jianjun Wang
2022-03-18 11:48 ` Jianjun Wang
2022-03-18 11:48 ` Jianjun Wang
2022-03-18 11:48 ` Jianjun Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=da5eec2a0f96c882f79d124ecefcd357fe0d6b63.camel@mediatek.com \
--to=jianjun.wang@mediatek.com \
--cc=chuanjia.liu@mediatek.com \
--cc=chunfeng.yun@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=jian.yang@mediatek.com \
--cc=jieyy.yang@mediatek.com \
--cc=kishon@ti.com \
--cc=krzk@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-phy@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=qizhong.cheng@mediatek.com \
--cc=randy.wu@mediatek.com \
--cc=rex-bc.chen@mediatek.com \
--cc=robh+dt@kernel.org \
--cc=vkoul@kernel.org \
--cc=wenst@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.