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From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: Cezary Rojewski <cezary.rojewski@intel.com>, alsa-devel@alsa-project.org
Cc: upstream@semihalf.com, harshapriya.n@intel.com, rad@semihalf.com,
	tiwai@suse.com, hdegoede@redhat.com, broonie@kernel.org,
	amadeuszx.slawinski@linux.intel.com, cujomalainey@chromium.org,
	lma@semihalf.com
Subject: Re: [PATCH 08/17] ASoC: Intel: avs: Add power management requests
Date: Fri, 25 Feb 2022 14:46:52 -0600	[thread overview]
Message-ID: <da68f26b-fb7b-a8d6-ea91-b05ce3a41701@linux.intel.com> (raw)
In-Reply-To: <b24a4d37-6eac-0cae-b1e1-cf26a8fff5ec@intel.com>


> 
>>> +    msg.ext.set_d0ix.wake = enable_pg;
>>
>> simplify the argument? Not sure anyone could understand what wake and
>> enable_pg mean.
> 
> 
> Well, CG and PG are popular shortcuts among Intel audio team and stand
> for clock gating and power gating respectively. 'wake' is firmware
> specific. I can provide a comment, but not all question are going to be
> answered by it. Firmware specification is the place to find the answer
> for most of these.

again please do not assume that anyone reviewing this code has access to
the firmware specification.

> 
>> int avs_ipc_set_d0ix(struct avs_dev *adev, bool wake, bool streaming)
>>
>>> +    msg.ext.set_d0ix.streaming = streaming;
>>> +
>>> +    request.header = msg.val;
>>> +
>>> +    ret = avs_dsp_send_pm_msg(adev, &request, NULL, false);
>>> +    if (ret)
>>> +        avs_ipc_err(adev, &request, "set d0ix", ret);
>>> +
>>> +    return ret;
>>> +}
>>> diff --git a/sound/soc/intel/avs/messages.h
>>> b/sound/soc/intel/avs/messages.h
>>> index 1dabd1005327..bbdba4631b1f 100644
>>> --- a/sound/soc/intel/avs/messages.h
>>> +++ b/sound/soc/intel/avs/messages.h
>>> @@ -101,6 +101,8 @@ enum avs_module_msg_type {
>>>       AVS_MOD_LARGE_CONFIG_SET = 4,
>>>       AVS_MOD_BIND = 5,
>>>       AVS_MOD_UNBIND = 6,
>>> +    AVS_MOD_SET_DX = 7,
>>> +    AVS_MOD_SET_D0IX = 8,
>>>       AVS_MOD_DELETE_INSTANCE = 11,
>>>   };
>>>   @@ -137,6 +139,11 @@ union avs_module_msg {
>>>                   u32 dst_queue:3;
>>>                   u32 src_queue:3;
>>>               } bind_unbind;
>>> +            struct {
>>> +                /* cAVS < 2.0 */
>>> +                u32 wake:1;
>>> +                u32 streaming:1;
>>
>> you probably want to explain how a 'streaming' flag is set at the module
>> level? One would think all modules connected in a pipeline would need to
>> use the same flag value.
> 
> 
> Some of the fields are confusing and I agree, but driver has to adhere
> to FW expectations if it wants to be a working one. I would like to
> avoid judging the firmware architecture here, regardless of how
> confusing we think it is.

it's not about judging, just explaining what is expected on the firmware
side and what the driver needs to do.

> 
> 'wake' and 'streaming' fields are part of SET_D0ix message is which part
> of MODULE-type message interface. Base firmware is, from architecture
> point of view, a module of type=0 (module_id) and instance id=0
> (instance_id).
> 
>>> +            } set_d0ix;
>>>           } ext;
>>>       };
>>>   } __packed;
>>> @@ -298,4 +305,13 @@ int avs_ipc_get_large_config(struct avs_dev
>>> *adev, u16 module_id, u8 instance_id
>>>                    u8 param_id, u8 *request_data, size_t request_size,
>>>                    u8 **reply_data, size_t *reply_size);
>>>   +/* DSP cores and domains power management messages */
>>> +struct avs_dxstate_info {
>>> +    u32 core_mask;
>>> +    u32 dx_mask;
>>
>> what is the convention for D0 and D3 in the mask ? which one is 0 or 1?
>>
>> Is this also handled in a hierarchical way where only the bits set in
>> core_mask matter?
> 
> 
> Can provide a short kernel-doc for these two, sure.

  reply	other threads:[~2022-02-25 20:57 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-07 12:20 [PATCH 00/17] ASoC: Intel: AVS - Audio DSP for cAVS Cezary Rojewski
2022-02-07 12:20 ` [PATCH 01/17] ALSA: hda: Add helper macros for DSP capable devices Cezary Rojewski
2022-02-07 12:20 ` [PATCH 02/17] ASoC: Export DAI register and widget ctor and dctor functions Cezary Rojewski
2022-02-07 12:20 ` [PATCH 03/17] ASoC: Intel: Introduce AVS driver Cezary Rojewski
2022-02-24 23:55   ` Pierre-Louis Bossart
2022-02-25 16:56     ` Cezary Rojewski
2022-02-25 20:23       ` Pierre-Louis Bossart
2022-02-28 14:52         ` Cezary Rojewski
2022-02-07 12:20 ` [PATCH 04/17] ASoC: Intel: avs: Inter process communication Cezary Rojewski
2022-02-25  0:56   ` Pierre-Louis Bossart
2022-02-25 18:06     ` Cezary Rojewski
2022-02-25 20:37       ` Pierre-Louis Bossart
2022-02-28 15:19         ` Cezary Rojewski
2022-02-28 15:39           ` Cezary Rojewski
2022-02-07 12:20 ` [PATCH 05/17] ASoC: Intel: avs: Add code loading requests Cezary Rojewski
2022-02-25  1:02   ` Pierre-Louis Bossart
2022-02-25 18:08     ` Cezary Rojewski
2022-02-07 12:20 ` [PATCH 06/17] ASoC: Intel: avs: Add pipeline management requests Cezary Rojewski
2022-02-25  1:11   ` Pierre-Louis Bossart
2022-02-25 18:31     ` Cezary Rojewski
2022-02-25 20:42       ` Pierre-Louis Bossart
2022-02-28 15:25         ` Cezary Rojewski
2022-02-07 12:20 ` [PATCH 07/17] ASoC: Intel: avs: Add module " Cezary Rojewski
2022-02-25  1:27   ` Pierre-Louis Bossart
2022-02-25 18:50     ` Cezary Rojewski
2022-02-25 20:44       ` Pierre-Louis Bossart
2022-02-28 15:26         ` Cezary Rojewski
2022-02-07 12:20 ` [PATCH 08/17] ASoC: Intel: avs: Add power " Cezary Rojewski
2022-02-25  1:37   ` Pierre-Louis Bossart
2022-02-25 19:08     ` Cezary Rojewski
2022-02-25 20:46       ` Pierre-Louis Bossart [this message]
2022-02-28 15:28         ` Cezary Rojewski
2022-02-07 12:21 ` [PATCH 09/17] ASoC: Intel: avs: Add ROM requests Cezary Rojewski
2022-02-25  1:42   ` Pierre-Louis Bossart
2022-02-25 19:19     ` Cezary Rojewski
2022-02-07 12:21 ` [PATCH 10/17] ASoC: Intel: avs: Add basefw runtime-parameter requests Cezary Rojewski
2022-02-07 12:21 ` [PATCH 11/17] ASoC: Intel: avs: Firmware resources management utilities Cezary Rojewski
2022-02-25  1:53   ` Pierre-Louis Bossart
2022-02-25 19:20     ` Cezary Rojewski
2022-02-07 12:21 ` [PATCH 12/17] ASoC: Intel: avs: Declare module configuration types Cezary Rojewski
2022-02-07 12:21 ` [PATCH 13/17] ASoC: Intel: avs: Dynamic firmware resources management Cezary Rojewski
2022-02-25  2:02   ` Pierre-Louis Bossart
2022-02-25 19:27     ` Cezary Rojewski
2022-02-25 20:21       ` Pierre-Louis Bossart
2022-02-28 15:30         ` Cezary Rojewski
2022-02-28 17:20           ` Pierre-Louis Bossart
2022-02-07 12:21 ` [PATCH 14/17] ASoC: Intel: avs: General code loading flow Cezary Rojewski
2022-02-25  2:15   ` Pierre-Louis Bossart
2022-02-25 19:37     ` Cezary Rojewski
2022-02-07 12:21 ` [PATCH 15/17] ASoC: Intel: avs: Implement CLDMA transfer Cezary Rojewski
2022-02-25  2:18   ` Pierre-Louis Bossart
2022-02-25 19:38     ` Cezary Rojewski
2022-02-07 12:21 ` [PATCH 16/17] ASoC: Intel: avs: Code loading over CLDMA Cezary Rojewski
2022-02-25  2:21   ` Pierre-Louis Bossart
2022-02-25 19:38     ` Cezary Rojewski
2022-02-07 12:21 ` [PATCH 17/17] ASoC: Intel: avs: Code loading over HDA Cezary Rojewski
2022-02-21 11:51 ` [PATCH 00/17] ASoC: Intel: AVS - Audio DSP for cAVS Cezary Rojewski
2022-02-25  2:35 ` Pierre-Louis Bossart
2022-02-25 15:44   ` Cezary Rojewski
2022-02-25 16:33     ` Pierre-Louis Bossart
2022-02-25 18:07   ` Mark Brown

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