* [PATCH v7 1/7] drm/xe: add page size allocation control state to xe_device
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
@ 2026-07-14 10:55 ` Himal Prasad Ghimiray
2026-07-16 10:31 ` Ghimiray, Himal Prasad
2026-07-14 10:55 ` [PATCH v7 2/7] drm/xe/debugfs: add page-size allocation mode knob Himal Prasad Ghimiray
` (9 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Himal Prasad Ghimiray @ 2026-07-14 10:55 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti, Himal Prasad Ghimiray
From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Introduce xe_page_size_alloc_ctrl_mode and add page_size_alloc_ctrl
state to struct xe_device along with mutex lock.
The new control supports forcing user BO allocations to 2M pages,
forcing them to 1G pages, or using a mixed round-robin mode across
4K, 64K, 2M, and 1G page sizes. Track the current mixed-mode index
in xe_device so allocation policy can be applied consistently.
v2
- make cur_index to atomic as update need in later patch to
avoid race/concurency (sashiko)
v3
- reworded comments
- protect mode/index updates with a mutex for proper concurrency handling
v4(sashiko)
- move xe_debug_page_size_alloc_ctrl_init() before drm_dev_register(),
so mutex and control states are initialized
before any userspace visibility
v5(Himal)
- Guard all the debug page size policy code under CONFIG
- Squash Kconfig patch to have Kconfig entry for DEBUG_PAGE_SIZE
- Add inline to check debug page size support and exact mode
configured if it is supported.
v6 (fix CI build)
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
---
drivers/gpu/drm/xe/Kconfig.debug | 16 ++++++++++++++
drivers/gpu/drm/xe/xe_device.c | 13 +++++++++++-
drivers/gpu/drm/xe/xe_device.h | 30 +++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_device_types.h | 31 ++++++++++++++++++++++++++++
4 files changed, 89 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/Kconfig.debug b/drivers/gpu/drm/xe/Kconfig.debug
index 01227c77f6d7..79118d9efd93 100644
--- a/drivers/gpu/drm/xe/Kconfig.debug
+++ b/drivers/gpu/drm/xe/Kconfig.debug
@@ -86,6 +86,22 @@ config DRM_XE_KUNIT_TEST
If in doubt, say "N".
+config DRM_XE_DEBUG_PAGE_SIZE
+ bool "Enable debug control for user BO page-size allocation"
+ depends on DRM_XE_DEBUG && DEBUG_FS
+ help
+ Expose a debugfs knob to override user BO page-size allocation
+ handling for validation and debug. Supported modes include forced
+ 2M, forced 1G, and a mixed mode that exercises 4K, 64K, 2M, and
+ 1G page-size paths on platforms that support them.
+
+ This is an unstable debugfs interface intended for development and
+ validation only. Its layout, contents, and existence may change or
+ be removed at any time with no regression warranty.
+
+ Recommended for driver developers only.
+ If in doubt, say "N".
+
config DRM_XE_DEBUG_GUC
bool "Enable extra GuC related debug options"
depends on DRM_XE_DEBUG
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index c9fa4bfed2b9..78dab9ae4f1b 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -923,6 +923,15 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
xe_pm_runtime_put(xe);
}
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static void xe_debug_page_size_alloc_ctrl_init(struct xe_device *xe)
+{
+ mutex_init(&xe->page_size_alloc_ctrl.lock);
+ xe->page_size_alloc_ctrl.mode = XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE;
+ xe->page_size_alloc_ctrl.cur_index = 0;
+}
+#endif
+
int xe_device_probe(struct xe_device *xe)
{
struct xe_tile *tile;
@@ -1074,7 +1083,9 @@ int xe_device_probe(struct xe_device *xe)
err = xe_psmi_init(xe);
if (err)
return err;
-
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+ xe_debug_page_size_alloc_ctrl_init(xe);
+#endif
err = drm_dev_register(&xe->drm, 0);
if (err)
return err;
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index a03760d0ce38..df574738e3f5 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -212,6 +212,36 @@ static inline bool xe_device_wedged(struct xe_device *xe)
return atomic_read(&xe->wedged.flag);
}
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static inline bool xe_debug_page_size_supported(struct xe_device *xe)
+{
+ return IS_DGFX(xe);
+}
+
+static inline bool xe_debug_exact_page_size_mode(struct xe_device *xe)
+{
+ enum xe_page_size_alloc_ctrl_mode mode;
+
+ if (!xe_debug_page_size_supported(xe))
+ return false;
+
+ mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
+
+ return mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M ||
+ mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G;
+}
+#else
+static inline bool xe_debug_page_size_supported(struct xe_device *xe)
+{
+ return false;
+}
+
+static inline bool xe_debug_exact_page_size_mode(struct xe_device *xe)
+{
+ return false;
+}
+#endif
+
void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
void xe_device_declare_wedged(struct xe_device *xe);
int xe_device_validate_wedged_mode(struct xe_device *xe, unsigned int mode);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 022e08205897..16f0cfe43ab0 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -61,6 +61,23 @@ enum xe_wedged_mode {
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET = 2,
};
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+/**
+ * enum xe_page_size_alloc_ctrl_mode - User BO page-size allocation control modes
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE: Use the normal allocation policy
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M: Force user BO allocations to 2M pages
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G: Force user BO allocations to 1G pages
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED: Select page sizes in round-robin order
+ * (4K, 64K, 2M, 1G)
+ */
+enum xe_page_size_alloc_ctrl_mode {
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE = 0,
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M,
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G,
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED
+};
+#endif
+
#define XE_BO_INVALID_OFFSET LONG_MAX
#define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100)
@@ -474,6 +491,20 @@ struct xe_device {
/** @late_bind: xe mei late bind interface */
struct xe_late_bind late_bind;
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+ /**
+ * @page_size_alloc_ctrl: User BO page-size allocation
+ * debug control state
+ */
+ struct {
+ /** @page_size_alloc_ctrl.mode: xe page size allocation control mode */
+ enum xe_page_size_alloc_ctrl_mode mode;
+ /** @page_size_alloc_ctrl.cur_index: Round-robin index used by mixed mode */
+ u32 cur_index;
+ /** @page_size_alloc_ctrl.lock: Protects @mode and @cur_index */
+ struct mutex lock;
+ } page_size_alloc_ctrl;
+#endif
/** @oa: oa observation subsystem */
struct xe_oa oa;
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v7 1/7] drm/xe: add page size allocation control state to xe_device
2026-07-14 10:55 ` [PATCH v7 1/7] drm/xe: add page size allocation control state to xe_device Himal Prasad Ghimiray
@ 2026-07-16 10:31 ` Ghimiray, Himal Prasad
0 siblings, 0 replies; 17+ messages in thread
From: Ghimiray, Himal Prasad @ 2026-07-16 10:31 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
On 14-07-2026 16:25, Himal Prasad Ghimiray wrote:
> From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
>
> Introduce xe_page_size_alloc_ctrl_mode and add page_size_alloc_ctrl
> state to struct xe_device along with mutex lock.
>
> The new control supports forcing user BO allocations to 2M pages,
> forcing them to 1G pages, or using a mixed round-robin mode across
> 4K, 64K, 2M, and 1G page sizes. Track the current mixed-mode index
> in xe_device so allocation policy can be applied consistently.
>
> v2
> - make cur_index to atomic as update need in later patch to
> avoid race/concurency (sashiko)
> v3
> - reworded comments
> - protect mode/index updates with a mutex for proper concurrency handling
>
> v4(sashiko)
> - move xe_debug_page_size_alloc_ctrl_init() before drm_dev_register(),
> so mutex and control states are initialized
> before any userspace visibility
>
> v5(Himal)
> - Guard all the debug page size policy code under CONFIG
> - Squash Kconfig patch to have Kconfig entry for DEBUG_PAGE_SIZE
> - Add inline to check debug page size support and exact mode
> configured if it is supported.
>
> v6 (fix CI build)
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> ---
> drivers/gpu/drm/xe/Kconfig.debug | 16 ++++++++++++++
> drivers/gpu/drm/xe/xe_device.c | 13 +++++++++++-
> drivers/gpu/drm/xe/xe_device.h | 30 +++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_device_types.h | 31 ++++++++++++++++++++++++++++
> 4 files changed, 89 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/Kconfig.debug b/drivers/gpu/drm/xe/Kconfig.debug
> index 01227c77f6d7..79118d9efd93 100644
> --- a/drivers/gpu/drm/xe/Kconfig.debug
> +++ b/drivers/gpu/drm/xe/Kconfig.debug
> @@ -86,6 +86,22 @@ config DRM_XE_KUNIT_TEST
>
> If in doubt, say "N".
>
> +config DRM_XE_DEBUG_PAGE_SIZE
> + bool "Enable debug control for user BO page-size allocation"
> + depends on DRM_XE_DEBUG && DEBUG_FS
> + help
> + Expose a debugfs knob to override user BO page-size allocation
> + handling for validation and debug. Supported modes include forced
> + 2M, forced 1G, and a mixed mode that exercises 4K, 64K, 2M, and
> + 1G page-size paths on platforms that support them.
> +
> + This is an unstable debugfs interface intended for development and
> + validation only. Its layout, contents, and existence may change or
> + be removed at any time with no regression warranty.
> +
> + Recommended for driver developers only.
> + If in doubt, say "N".
> +
> config DRM_XE_DEBUG_GUC
> bool "Enable extra GuC related debug options"
> depends on DRM_XE_DEBUG
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index c9fa4bfed2b9..78dab9ae4f1b 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -923,6 +923,15 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
> xe_pm_runtime_put(xe);
> }
>
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +static void xe_debug_page_size_alloc_ctrl_init(struct xe_device *xe)
> +{
> + mutex_init(&xe->page_size_alloc_ctrl.lock);
Leaking mutex. drmm_mutex_init ?
> + xe->page_size_alloc_ctrl.mode = XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE;
> + xe->page_size_alloc_ctrl.cur_index = 0;
> +}
> +#endif
> +
> int xe_device_probe(struct xe_device *xe)
> {
> struct xe_tile *tile;
> @@ -1074,7 +1083,9 @@ int xe_device_probe(struct xe_device *xe)
> err = xe_psmi_init(xe);
> if (err)
> return err;
> -
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> + xe_debug_page_size_alloc_ctrl_init(xe);
> +#endif
Nit. How about calling function unconditionally, and is no-op stub when
Config is not enabled.
> err = drm_dev_register(&xe->drm, 0);
> if (err)
> return err;
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index a03760d0ce38..df574738e3f5 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -212,6 +212,36 @@ static inline bool xe_device_wedged(struct xe_device *xe)
> return atomic_read(&xe->wedged.flag);
> }
>
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +static inline bool xe_debug_page_size_supported(struct xe_device *xe)
> +{
> + return IS_DGFX(xe);
> +}
> +
> +static inline bool xe_debug_exact_page_size_mode(struct xe_device *xe)
> +{
> + enum xe_page_size_alloc_ctrl_mode mode;
> +
> + if (!xe_debug_page_size_supported(xe))
> + return false;
> +
> + mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
> +
> + return mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M ||
> + mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G;
why mixed is left out ?
> +}
> +#else
> +static inline bool xe_debug_page_size_supported(struct xe_device *xe)
> +{
> + return false;
> +}
> +
> +static inline bool xe_debug_exact_page_size_mode(struct xe_device *xe)
> +{
> + return false;
> +}
> +#endif
> +
> void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
> void xe_device_declare_wedged(struct xe_device *xe);
> int xe_device_validate_wedged_mode(struct xe_device *xe, unsigned int mode);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 022e08205897..16f0cfe43ab0 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -61,6 +61,23 @@ enum xe_wedged_mode {
> XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET = 2,
> };
>
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +/**
> + * enum xe_page_size_alloc_ctrl_mode - User BO page-size allocation control modes
> + * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE: Use the normal allocation policy
> + * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M: Force user BO allocations to 2M pages
> + * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G: Force user BO allocations to 1G pages
> + * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED: Select page sizes in round-robin order
> + * (4K, 64K, 2M, 1G)
> + */
> +enum xe_page_size_alloc_ctrl_mode {
> + XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE = 0,
> + XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M,
> + XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G,
> + XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED
> +};
> +#endif
> +
> #define XE_BO_INVALID_OFFSET LONG_MAX
>
> #define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100)
> @@ -474,6 +491,20 @@ struct xe_device {
> /** @late_bind: xe mei late bind interface */
> struct xe_late_bind late_bind;
>
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> + /**
> + * @page_size_alloc_ctrl: User BO page-size allocation
> + * debug control state
> + */
> + struct {
> + /** @page_size_alloc_ctrl.mode: xe page size allocation control mode */
> + enum xe_page_size_alloc_ctrl_mode mode;
> + /** @page_size_alloc_ctrl.cur_index: Round-robin index used by mixed mode */
> + u32 cur_index;
> + /** @page_size_alloc_ctrl.lock: Protects @mode and @cur_index */
> + struct mutex lock;
> + } page_size_alloc_ctrl;
> +#endif
> /** @oa: oa observation subsystem */
> struct xe_oa oa;
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v7 2/7] drm/xe/debugfs: add page-size allocation mode knob
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
2026-07-14 10:55 ` [PATCH v7 1/7] drm/xe: add page size allocation control state to xe_device Himal Prasad Ghimiray
@ 2026-07-14 10:55 ` Himal Prasad Ghimiray
2026-07-16 11:11 ` Ghimiray, Himal Prasad
2026-07-14 10:55 ` [PATCH v7 3/7] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing Himal Prasad Ghimiray
` (8 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Himal Prasad Ghimiray @ 2026-07-14 10:55 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Expose a debugfs control to override the page-size allocation mode used
for user BOs.
The interface allows switching between the default allocation policy,
forced 2M, forced 1G, and mixed allocation modes at runtime. This
provides a simple way to validate behavior and debug page-size-dependent
allocation flows.
The debugfs entry is built only when CONFIG_DRM_XE_DEBUG_PAGE_SIZE is
enabled.
v2
- update changelog to match mutex-based cur_index handling
- reset cur_index when switching to mixed mode (sashiko)
v3
- add CONFIG guard for page-size allocation debugfs support (Himal)
- create debugfs entry under CONFIG_DRM_XE_DEBUG_PAGE_SIZE
v4
- reorderd this patch with kconfig patch to ensure patch builds
- Gurding this debug knob for only discrete graphics
v5(Himal)
- Guard all page size calls with CONFIG_DRM_XE_DEBUG_PAGE_SIZE
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 62 +++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 8c391c7b017a..dcc01336538d 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -564,6 +564,56 @@ static const struct file_operations disable_late_binding_fops = {
.write = disable_late_binding_set,
};
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static ssize_t page_size_alloc_mode_show(struct file *f, char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ char buf[32];
+ int len;
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+
+ len = scnprintf(buf, sizeof(buf), "%u\n",
+ xe->page_size_alloc_ctrl.mode);
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t page_size_alloc_mode_set(struct file *f, const char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ unsigned int val;
+ int ret;
+
+ ret = kstrtouint_from_user(ubuf, size, 0, &val);
+ if (ret)
+ return ret;
+
+ if (val > XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+ return -EINVAL;
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+
+ if (val == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+ xe->page_size_alloc_ctrl.cur_index = 0;
+
+ xe->page_size_alloc_ctrl.mode = (enum xe_page_size_alloc_ctrl_mode)val;
+
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ return size;
+}
+
+static const struct file_operations page_size_alloc_mode_fops = {
+ .owner = THIS_MODULE,
+ .read = page_size_alloc_mode_show,
+ .write = page_size_alloc_mode_set,
+};
+#endif
+
void xe_debugfs_register(struct xe_device *xe)
{
struct ttm_device *bdev = &xe->ttm;
@@ -616,6 +666,18 @@ void xe_debugfs_register(struct xe_device *xe)
debugfs_create_file("disable_late_binding", 0600, root, xe,
&disable_late_binding_fops);
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+ /*
+ * Expose a debugfs knob to control user BO page-size allocation:
+ * 0 - default behavior
+ * 1 - force 2M page allocations
+ * 2 - force 1G page allocations
+ * 3 - mixed mode: select 4K, 64K, 2M, and 1G in round-robin order
+ */
+ if (IS_DGFX(xe))
+ debugfs_create_file("page_size_alloc_mode", 0600, root, xe,
+ &page_size_alloc_mode_fops);
+#endif
/*
* Don't expose page reclaim configuration file if not supported by the
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v7 2/7] drm/xe/debugfs: add page-size allocation mode knob
2026-07-14 10:55 ` [PATCH v7 2/7] drm/xe/debugfs: add page-size allocation mode knob Himal Prasad Ghimiray
@ 2026-07-16 11:11 ` Ghimiray, Himal Prasad
0 siblings, 0 replies; 17+ messages in thread
From: Ghimiray, Himal Prasad @ 2026-07-16 11:11 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
On 14-07-2026 16:25, Himal Prasad Ghimiray wrote:
> From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
>
> Expose a debugfs control to override the page-size allocation mode used
> for user BOs.
>
> The interface allows switching between the default allocation policy,
> forced 2M, forced 1G, and mixed allocation modes at runtime. This
> provides a simple way to validate behavior and debug page-size-dependent
> allocation flows.
>
> The debugfs entry is built only when CONFIG_DRM_XE_DEBUG_PAGE_SIZE is
> enabled.
>
> v2
> - update changelog to match mutex-based cur_index handling
> - reset cur_index when switching to mixed mode (sashiko)
>
> v3
> - add CONFIG guard for page-size allocation debugfs support (Himal)
> - create debugfs entry under CONFIG_DRM_XE_DEBUG_PAGE_SIZE
>
> v4
> - reorderd this patch with kconfig patch to ensure patch builds
> - Gurding this debug knob for only discrete graphics
>
> v5(Himal)
> - Guard all page size calls with CONFIG_DRM_XE_DEBUG_PAGE_SIZE
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
> drivers/gpu/drm/xe/xe_debugfs.c | 62 +++++++++++++++++++++++++++++++++
> 1 file changed, 62 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
> index 8c391c7b017a..dcc01336538d 100644
> --- a/drivers/gpu/drm/xe/xe_debugfs.c
> +++ b/drivers/gpu/drm/xe/xe_debugfs.c
> @@ -564,6 +564,56 @@ static const struct file_operations disable_late_binding_fops = {
> .write = disable_late_binding_set,
> };
>
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +static ssize_t page_size_alloc_mode_show(struct file *f, char __user *ubuf,
> + size_t size, loff_t *pos)
> +{
> + struct xe_device *xe = file_inode(f)->i_private;
> + char buf[32];
> + int len;
> +
> + mutex_lock(&xe->page_size_alloc_ctrl.lock);
> +
> + len = scnprintf(buf, sizeof(buf), "%u\n",
> + xe->page_size_alloc_ctrl.mode);
shouldn't READ_ONCE be enough like other caller sites reading mode ?
Dont think lock is needed here.
> + mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> +
> + return simple_read_from_buffer(ubuf, size, pos, buf, len);
> +}
> +
> +static ssize_t page_size_alloc_mode_set(struct file *f, const char __user *ubuf,
> + size_t size, loff_t *pos)
> +{
> + struct xe_device *xe = file_inode(f)->i_private;
> + unsigned int val;
> + int ret;
> +
> + ret = kstrtouint_from_user(ubuf, size, 0, &val);
> + if (ret)
> + return ret;
> +
> + if (val > XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
> + return -EINVAL;
> +
> + mutex_lock(&xe->page_size_alloc_ctrl.lock);
> +
> + if (val == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
> + xe->page_size_alloc_ctrl.cur_index = 0;
> +
> + xe->page_size_alloc_ctrl.mode = (enum xe_page_size_alloc_ctrl_mode)val;
WRITE_ONCE to match with READ_ONCE ?
> +
> + mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> +
> + return size;
> +}
> +
> +static const struct file_operations page_size_alloc_mode_fops = {
> + .owner = THIS_MODULE,
> + .read = page_size_alloc_mode_show,
> + .write = page_size_alloc_mode_set,
> +};
> +#endif
> +
> void xe_debugfs_register(struct xe_device *xe)
> {
> struct ttm_device *bdev = &xe->ttm;
> @@ -616,6 +666,18 @@ void xe_debugfs_register(struct xe_device *xe)
>
> debugfs_create_file("disable_late_binding", 0600, root, xe,
> &disable_late_binding_fops);
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> + /*
> + * Expose a debugfs knob to control user BO page-size allocation:
> + * 0 - default behavior
> + * 1 - force 2M page allocations
> + * 2 - force 1G page allocations
> + * 3 - mixed mode: select 4K, 64K, 2M, and 1G in round-robin order
> + */
if (xe_debug_page_size_supported(xe))
wont it be better to use string names instead of values for debugfs
read/write ?
something like none, 2M_pages, 1G_pages, mixed_pages
> + if (IS_DGFX(xe))
> + debugfs_create_file("page_size_alloc_mode", 0600, root, xe,
> + &page_size_alloc_mode_fops);
> +#endif
>
> /*
> * Don't expose page reclaim configuration file if not supported by the
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v7 3/7] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
2026-07-14 10:55 ` [PATCH v7 1/7] drm/xe: add page size allocation control state to xe_device Himal Prasad Ghimiray
2026-07-14 10:55 ` [PATCH v7 2/7] drm/xe/debugfs: add page-size allocation mode knob Himal Prasad Ghimiray
@ 2026-07-14 10:55 ` Himal Prasad Ghimiray
2026-07-16 11:38 ` Ghimiray, Himal Prasad
2026-07-14 10:55 ` [PATCH v7 4/7] drm/xe: apply debug page-size allocation policy to user BOs Himal Prasad Ghimiray
` (7 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Himal Prasad Ghimiray @ 2026-07-14 10:55 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Add XE_BO_FLAG_NEEDS_1G to mark BOs that require 1G minimum page-size
sizing.
Update xe_bo_init_locked() to honor the new flag in the existing
VRAM/stolen-memory minimum page-size sizing path. When
XE_BO_FLAG_NEEDS_1G is set, the BO size is rounded up to 1G. Otherwise,
the existing 2M and 64K sizing behavior is preserved.
If multiple minimum page-size flags are set, the largest requirement
takes precedence: 1G over 2M over 64K.
v3
- commit message reworded
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 12 ++++++++++--
drivers/gpu/drm/xe/xe_bo.h | 1 +
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 4c80bac67622..9dbf59fad421 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2323,8 +2323,16 @@ struct xe_bo *xe_bo_init_locked(struct xe_device *xe, struct xe_bo *bo,
if (flags & (XE_BO_FLAG_VRAM_MASK | XE_BO_FLAG_STOLEN) &&
!(flags & XE_BO_FLAG_IGNORE_MIN_PAGE_SIZE) &&
((xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) ||
- (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M)))) {
- size_t align = flags & XE_BO_FLAG_NEEDS_2M ? SZ_2M : SZ_64K;
+ (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M |
+ XE_BO_FLAG_NEEDS_1G)))) {
+ size_t align;
+
+ if (flags & XE_BO_FLAG_NEEDS_1G)
+ align = SZ_1G;
+ else if (flags & XE_BO_FLAG_NEEDS_2M)
+ align = SZ_2M;
+ else
+ align = SZ_64K;
aligned_size = ALIGN(size, align);
if (type != ttm_bo_type_device)
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 6340317f7d2e..d5d023cac367 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -52,6 +52,7 @@
#define XE_BO_FLAG_CPU_ADDR_MIRROR BIT(24)
#define XE_BO_FLAG_FORCE_USER_VRAM BIT(25)
#define XE_BO_FLAG_NO_COMPRESSION BIT(26)
+#define XE_BO_FLAG_NEEDS_1G BIT(27)
/* this one is trigger internally only */
#define XE_BO_FLAG_INTERNAL_TEST BIT(30)
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v7 3/7] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing
2026-07-14 10:55 ` [PATCH v7 3/7] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing Himal Prasad Ghimiray
@ 2026-07-16 11:38 ` Ghimiray, Himal Prasad
0 siblings, 0 replies; 17+ messages in thread
From: Ghimiray, Himal Prasad @ 2026-07-16 11:38 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
On 14-07-2026 16:25, Himal Prasad Ghimiray wrote:
> From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
>
> Add XE_BO_FLAG_NEEDS_1G to mark BOs that require 1G minimum page-size
> sizing.
>
> Update xe_bo_init_locked() to honor the new flag in the existing
> VRAM/stolen-memory minimum page-size sizing path. When
> XE_BO_FLAG_NEEDS_1G is set, the BO size is rounded up to 1G. Otherwise,
> the existing 2M and 64K sizing behavior is preserved.
>
> If multiple minimum page-size flags are set, the largest requirement
> takes precedence: 1G over 2M over 64K.
>
> v3
> - commit message reworded
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
> drivers/gpu/drm/xe/xe_bo.c | 12 ++++++++++--
> drivers/gpu/drm/xe/xe_bo.h | 1 +
> 2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 4c80bac67622..9dbf59fad421 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -2323,8 +2323,16 @@ struct xe_bo *xe_bo_init_locked(struct xe_device *xe, struct xe_bo *bo,
> if (flags & (XE_BO_FLAG_VRAM_MASK | XE_BO_FLAG_STOLEN) &&
> !(flags & XE_BO_FLAG_IGNORE_MIN_PAGE_SIZE) &&
> ((xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) ||
> - (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M)))) {
> - size_t align = flags & XE_BO_FLAG_NEEDS_2M ? SZ_2M : SZ_64K;
> + (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M |
> + XE_BO_FLAG_NEEDS_1G)))) {
> + size_t align;
> +
> + if (flags & XE_BO_FLAG_NEEDS_1G)
> + align = SZ_1G;
> + else if (flags & XE_BO_FLAG_NEEDS_2M)
> + align = SZ_2M;
> + else
> + align = SZ_64K;
LGTM
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>
> aligned_size = ALIGN(size, align);
> if (type != ttm_bo_type_device)
> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> index 6340317f7d2e..d5d023cac367 100644
> --- a/drivers/gpu/drm/xe/xe_bo.h
> +++ b/drivers/gpu/drm/xe/xe_bo.h
> @@ -52,6 +52,7 @@
> #define XE_BO_FLAG_CPU_ADDR_MIRROR BIT(24)
> #define XE_BO_FLAG_FORCE_USER_VRAM BIT(25)
> #define XE_BO_FLAG_NO_COMPRESSION BIT(26)
> +#define XE_BO_FLAG_NEEDS_1G BIT(27)
>
> /* this one is trigger internally only */
> #define XE_BO_FLAG_INTERNAL_TEST BIT(30)
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v7 4/7] drm/xe: apply debug page-size allocation policy to user BOs
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
` (2 preceding siblings ...)
2026-07-14 10:55 ` [PATCH v7 3/7] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing Himal Prasad Ghimiray
@ 2026-07-14 10:55 ` Himal Prasad Ghimiray
2026-07-16 12:02 ` Ghimiray, Himal Prasad
2026-07-14 10:55 ` [PATCH v7 5/7] drm/xe/vm: propagate BO page-size requirements to VMA map flags Himal Prasad Ghimiray
` (6 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Himal Prasad Ghimiray @ 2026-07-14 10:55 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Apply the debug page-size allocation policy during user BO creation.
When page-size allocation control is enabled, override the user BO
page-size selection flags based on the selected debug mode and round the
requested size up to the corresponding granularity:
- 2M mode selects 2M handling
- 1G mode selects 1G handling
- mixed mode selects the page size from the current mixed-mode index
This is intended for internal debug and validation flows. When the
control mode is left at the default setting, the normal user BO creation
path is unchanged.
v2
- ensure debug page-size allocation does not
affect the default path (sashiko)
- rework synchronization for concurrent access (sashiko)
- refactor commit message for readability
v3
- update user BO size alignment based on debug policy mode
- reword commit message
- ensure normal user flow is unchanged when debug policy is disabled
v4(sashiko)
- limit debug page-size policy application to VRAM BOs
- do not override preexisting page-size requirement flags
- advance mixed-mode index only after successful
BO create ioctl completion
- add overflow checks before ALIGN() in debug page-size handling
- ensure CONFIG_DRM_XE_DEBUG_PAGE_SIZE enabled and it is dgfx
v5(Himal)
v5:
- Guard debug page-size policy paths with CONFIG_DRM_XE_DEBUG_PAGE_SIZE
- Leave the normal BO creation path unchanged
when no debug mode is selected
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 154 +++++++++++++++++++++++++++++++++++++
1 file changed, 154 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 9dbf59fad421..bccc3611dca3 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2612,6 +2612,148 @@ static struct xe_bo *xe_bo_create_novm(struct xe_device *xe, struct xe_tile *til
return ret ? ERR_PTR(ret) : bo;
}
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static void xe_bo_debug_mixed_mode_cur_index_advance(struct xe_device *xe)
+{
+ if (!IS_DGFX(xe) ||
+ READ_ONCE(xe->page_size_alloc_ctrl.mode) !=
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+ return;
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ if (xe->page_size_alloc_ctrl.mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+ xe->page_size_alloc_ctrl.cur_index++;
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+}
+
+static bool xe_size_align_overflows(size_t size, size_t align)
+{
+ return size > SIZE_MAX - (align - 1);
+}
+
+static u32 get_flag_from_cur_index_in_mixed_mode(struct xe_device *xe, size_t *align_size,
+ int *err)
+{
+ static const u32 map[4] = {
+ 0, /* default mode 4K */
+ XE_BO_FLAG_NEEDS_64K,
+ XE_BO_FLAG_NEEDS_2M,
+ XE_BO_FLAG_NEEDS_1G,
+ };
+ u32 idx;
+
+ lockdep_assert_held(&xe->page_size_alloc_ctrl.lock);
+
+ *err = 0;
+ idx = xe->page_size_alloc_ctrl.cur_index % ARRAY_SIZE(map);
+
+ if (!map[idx])
+ return 0;
+
+ if (map[idx] == XE_BO_FLAG_NEEDS_64K) {
+ if (xe_size_align_overflows(*align_size, SZ_64K)) {
+ *err = -EINVAL;
+ return 0;
+ }
+ *align_size = ALIGN(*align_size, SZ_64K);
+ return map[idx];
+ }
+
+ if (map[idx] == XE_BO_FLAG_NEEDS_2M) {
+ if (xe_size_align_overflows(*align_size, SZ_2M)) {
+ *err = -EINVAL;
+ return 0;
+ }
+ *align_size = ALIGN(*align_size, SZ_2M);
+ return map[idx];
+ }
+
+ if (map[idx] == XE_BO_FLAG_NEEDS_1G) {
+ if (xe_size_align_overflows(*align_size, SZ_1G)) {
+ *err = -EINVAL;
+ return 0;
+ }
+ *align_size = ALIGN(*align_size, SZ_1G);
+ return map[idx];
+ }
+
+ return 0;
+}
+
+static int xe_bo_apply_debug_page_size_policy(struct xe_device *xe,
+ u32 *bo_flags,
+ size_t *size)
+{
+ enum xe_page_size_alloc_ctrl_mode mode;
+ u32 want = 0;
+ size_t align_size = *size;
+ int err = 0;
+
+ if (!IS_DGFX(xe))
+ return 0;
+ /*
+ * The debug page-size policy is only meaningful for BOs placed in
+ * VRAM, where the downstream BO init path can
+ * actually honor the corresponding minimum page-size requirement.
+ */
+ if (!(*bo_flags & XE_BO_FLAG_VRAM_MASK))
+ return 0;
+
+ /*
+ * Do not override existing page-size requirement flags, since they
+ * may reflect functional requirements for specific BO types.
+ */
+ if (*bo_flags & (XE_BO_FLAG_NEEDS_64K |
+ XE_BO_FLAG_NEEDS_2M |
+ XE_BO_FLAG_NEEDS_1G))
+ return 0;
+
+ if (!READ_ONCE(xe->page_size_alloc_ctrl.mode))
+ return 0;
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+
+ mode = xe->page_size_alloc_ctrl.mode;
+ if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE) {
+ goto out_unlock;
+ } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M) {
+ if (xe_size_align_overflows(align_size, SZ_2M)) {
+ err = -EINVAL;
+ goto out_unlock;
+ }
+ want = XE_BO_FLAG_NEEDS_2M;
+ align_size = ALIGN(align_size, SZ_2M);
+ } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G) {
+ if (xe_size_align_overflows(align_size, SZ_1G)) {
+ err = -EINVAL;
+ goto out_unlock;
+ }
+ want = XE_BO_FLAG_NEEDS_1G;
+ align_size = ALIGN(align_size, SZ_1G);
+ } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED) {
+ want = get_flag_from_cur_index_in_mixed_mode(xe, &align_size, &err);
+ if (err)
+ goto out_unlock;
+ } else {
+ goto out_unlock;
+ }
+
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ *bo_flags |= want;
+ /*
+ * Apply the debug page-size policy by rounding the user BO size up to
+ * the selected granularity.
+ */
+ *size = align_size;
+ return err;
+
+out_unlock:
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+ return err;
+}
+#endif
+
/**
* xe_bo_create_user() - Create a user BO
* @xe: The xe device.
@@ -2632,9 +2774,18 @@ struct xe_bo *xe_bo_create_user(struct xe_device *xe,
u32 flags, struct drm_exec *exec)
{
struct xe_bo *bo;
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+ int err;
+#endif
flags |= XE_BO_FLAG_USER;
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+
+ err = xe_bo_apply_debug_page_size_policy(xe, &flags, &size);
+ if (err)
+ return ERR_PTR(err);
+#endif
if (vm || exec) {
xe_assert(xe, exec);
bo = __xe_bo_create_locked(xe, NULL, vm, size, 0, ~0ULL,
@@ -3449,6 +3600,9 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
if (err)
goto out_bulk;
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+ xe_bo_debug_mixed_mode_cur_index_advance(xe);
+#endif
args->handle = handle;
goto out_put;
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v7 4/7] drm/xe: apply debug page-size allocation policy to user BOs
2026-07-14 10:55 ` [PATCH v7 4/7] drm/xe: apply debug page-size allocation policy to user BOs Himal Prasad Ghimiray
@ 2026-07-16 12:02 ` Ghimiray, Himal Prasad
0 siblings, 0 replies; 17+ messages in thread
From: Ghimiray, Himal Prasad @ 2026-07-16 12:02 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
On 14-07-2026 16:25, Himal Prasad Ghimiray wrote:
> From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
>
> Apply the debug page-size allocation policy during user BO creation.
>
> When page-size allocation control is enabled, override the user BO
> page-size selection flags based on the selected debug mode and round the
> requested size up to the corresponding granularity:
> - 2M mode selects 2M handling
> - 1G mode selects 1G handling
> - mixed mode selects the page size from the current mixed-mode index
>
> This is intended for internal debug and validation flows. When the
> control mode is left at the default setting, the normal user BO creation
> path is unchanged.
>
> v2
> - ensure debug page-size allocation does not
> affect the default path (sashiko)
> - rework synchronization for concurrent access (sashiko)
> - refactor commit message for readability
>
> v3
> - update user BO size alignment based on debug policy mode
> - reword commit message
> - ensure normal user flow is unchanged when debug policy is disabled
>
> v4(sashiko)
> - limit debug page-size policy application to VRAM BOs
> - do not override preexisting page-size requirement flags
> - advance mixed-mode index only after successful
> BO create ioctl completion
> - add overflow checks before ALIGN() in debug page-size handling
> - ensure CONFIG_DRM_XE_DEBUG_PAGE_SIZE enabled and it is dgfx
>
> v5(Himal)
> v5:
> - Guard debug page-size policy paths with CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> - Leave the normal BO creation path unchanged
> when no debug mode is selected
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
> drivers/gpu/drm/xe/xe_bo.c | 154 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 154 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 9dbf59fad421..bccc3611dca3 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -2612,6 +2612,148 @@ static struct xe_bo *xe_bo_create_novm(struct xe_device *xe, struct xe_tile *til
> return ret ? ERR_PTR(ret) : bo;
> }
>
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +static void xe_bo_debug_mixed_mode_cur_index_advance(struct xe_device *xe)
> +{
> + if (!IS_DGFX(xe) ||
> + READ_ONCE(xe->page_size_alloc_ctrl.mode) !=
> + XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
> + return;
> +
wont we need bo->flags for vram check here like in
xe_bo_apply_debug_page_size_policy ? I dont think we want to update
curr_indx for system bo's.
> + mutex_lock(&xe->page_size_alloc_ctrl.lock);
> + if (xe->page_size_alloc_ctrl.mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
> + xe->page_size_alloc_ctrl.cur_index++;
> + mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> +}
> +
> +static bool xe_size_align_overflows(size_t size, size_t align)
> +{
> + return size > SIZE_MAX - (align - 1);
> +}
> +
> +static u32 get_flag_from_cur_index_in_mixed_mode(struct xe_device *xe, size_t *align_size,
> + int *err)
> +{
> + static const u32 map[4] = {
> + 0, /* default mode 4K */
> + XE_BO_FLAG_NEEDS_64K,
> + XE_BO_FLAG_NEEDS_2M,
> + XE_BO_FLAG_NEEDS_1G,
> + };
> + u32 idx;
static const struct {
u32 flag;
size_t align;
} map[] = {
{ 0, SZ_4K }, /* default: 4K, no flag */
{ XE_BO_FLAG_NEEDS_64K, SZ_64K },
{ XE_BO_FLAG_NEEDS_2M, SZ_2M },
{ XE_BO_FLAG_NEEDS_1G, SZ_1G },
};
will make below repetitive logic leaner.
> +
> + lockdep_assert_held(&xe->page_size_alloc_ctrl.lock);
> +
> + *err = 0;
> + idx = xe->page_size_alloc_ctrl.cur_index % ARRAY_SIZE(map);
> +
> + if (!map[idx])
> + return 0;
> +
> + if (map[idx] == XE_BO_FLAG_NEEDS_64K) {
> + if (xe_size_align_overflows(*align_size, SZ_64K)) {
> + *err = -EINVAL;
> + return 0;
> + }
> + *align_size = ALIGN(*align_size, SZ_64K);
> + return map[idx];
> + }
> +
> + if (map[idx] == XE_BO_FLAG_NEEDS_2M) {
> + if (xe_size_align_overflows(*align_size, SZ_2M)) {
> + *err = -EINVAL;
> + return 0;
> + }
> + *align_size = ALIGN(*align_size, SZ_2M);
> + return map[idx];
> + }
> +
> + if (map[idx] == XE_BO_FLAG_NEEDS_1G) {
> + if (xe_size_align_overflows(*align_size, SZ_1G)) {
> + *err = -EINVAL;
> + return 0;
> + }
> + *align_size = ALIGN(*align_size, SZ_1G);
> + return map[idx];
> + }
> +
> + return 0;
> +}
> +
> +static int xe_bo_apply_debug_page_size_policy(struct xe_device *xe,
> + u32 *bo_flags,
> + size_t *size)
> +{
> + enum xe_page_size_alloc_ctrl_mode mode;
> + u32 want = 0;
> + size_t align_size = *size;
> + int err = 0;
> +
> + if (!IS_DGFX(xe))
> + return 0;
> + /*
> + * The debug page-size policy is only meaningful for BOs placed in
> + * VRAM, where the downstream BO init path can
> + * actually honor the corresponding minimum page-size requirement.
> + */
> + if (!(*bo_flags & XE_BO_FLAG_VRAM_MASK))
> + return 0;
> +
> + /*
> + * Do not override existing page-size requirement flags, since they
> + * may reflect functional requirements for specific BO types.
> + */
> + if (*bo_flags & (XE_BO_FLAG_NEEDS_64K |
> + XE_BO_FLAG_NEEDS_2M |
> + XE_BO_FLAG_NEEDS_1G))
> + return 0;
> +
> + if (!READ_ONCE(xe->page_size_alloc_ctrl.mode))
> + return 0;
> +
> + mutex_lock(&xe->page_size_alloc_ctrl.lock);
> +
> + mode = xe->page_size_alloc_ctrl.mode;
> + if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE) {
> + goto out_unlock;
> + } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M) {
> + if (xe_size_align_overflows(align_size, SZ_2M)) {
> + err = -EINVAL;
> + goto out_unlock;
> + }
> + want = XE_BO_FLAG_NEEDS_2M;
> + align_size = ALIGN(align_size, SZ_2M);
> + } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G) {
> + if (xe_size_align_overflows(align_size, SZ_1G)) {
> + err = -EINVAL;
> + goto out_unlock;
> + }
> + want = XE_BO_FLAG_NEEDS_1G;
> + align_size = ALIGN(align_size, SZ_1G);
> + } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED) {
> + want = get_flag_from_cur_index_in_mixed_mode(xe, &align_size, &err);
> + if (err)
> + goto out_unlock;
> + } else {
> + goto out_unlock;
> + }
> +
> + mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> +
> + *bo_flags |= want;
> + /*
> + * Apply the debug page-size policy by rounding the user BO size up to
> + * the selected granularity.
> + */
> + *size = align_size;
> + return err;
> +
> +out_unlock:
> + mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> + return err;
> +}
> +#endif
> +
> /**
> * xe_bo_create_user() - Create a user BO
> * @xe: The xe device.
> @@ -2632,9 +2774,18 @@ struct xe_bo *xe_bo_create_user(struct xe_device *xe,
> u32 flags, struct drm_exec *exec)
> {
> struct xe_bo *bo;
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> + int err;
> +#endif
int err = 0;
>
> flags |= XE_BO_FLAG_USER;
>
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +
> + err = xe_bo_apply_debug_page_size_policy(xe, &flags, &size);
> + if (err)
> + return ERR_PTR(err);
> +#endif
Rename xe_debug_exact_page_size_mode as
xe_debug_apply_page_size_mode_not_none in patch [1].
if (xe_debug_apply_page_size_mode_not_none) {
err = xe_bo_apply_debug_page_size_policy(xe, &flags, &size);
err check
}
> if (vm || exec) {
> xe_assert(xe, exec);
> bo = __xe_bo_create_locked(xe, NULL, vm, size, 0, ~0ULL,
> @@ -3449,6 +3600,9 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
> if (err)
> goto out_bulk;
>
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> + xe_bo_debug_mixed_mode_cur_index_advance(xe);
> +#endif
lets have no-op stub if config not enabled. no config check in code
please.> args->handle = handle;
> goto out_put;
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v7 5/7] drm/xe/vm: propagate BO page-size requirements to VMA map flags
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
` (3 preceding siblings ...)
2026-07-14 10:55 ` [PATCH v7 4/7] drm/xe: apply debug page-size allocation policy to user BOs Himal Prasad Ghimiray
@ 2026-07-14 10:55 ` Himal Prasad Ghimiray
2026-07-16 12:28 ` Ghimiray, Himal Prasad
2026-07-14 10:55 ` [PATCH v7 6/7] drm/xe/pt: allow selecting the bind leaf PTE level Himal Prasad Ghimiray
` (5 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Himal Prasad Ghimiray @ 2026-07-14 10:55 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Propagate user BO page-size requirement flags into VM bind map
operations.
When a user BO carries a page-size requirement flag, set the
corresponding VMA PTE flag during bind-op construction. This covers
64K, 2M, and 1G page sizes and allows the debug page-size allocation
policy selected at BO creation time to be reflected in page-table
mapping behavior.
v3
- BO page-size requirement overrides prior map-state flags
- reword commit message
v4
- address review feedback on XE_VMA_CREATE_MASK dependency
- carry 2M/1G request state in target_leaf_level instead of vma_flags
- propagate target_leaf_level from bind op to VMA state
- avoid using accumulated gpuva.flags as future bind policy input
v5
- v5:
- Reword the commit message to match the target_leaf_level-based
implementation
- Clarify that BO page-size requirements are propagated through
bind-op and VMA state
v6
- target_leaf_level is propagated to MAP of
vm_bind_ioctl_ops_parse
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_vm.c | 30 ++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_vm_types.h | 9 +++++++++
2 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 23f4a9fb9a49..729f68a20cf7 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2406,6 +2406,23 @@ static void xe_svm_prefetch_gpuva_ops_fini(struct drm_gpuva_ops *ops)
}
}
+static void xe_vma_apply_debug_page_size_flag(struct xe_vma_op *op,
+ struct xe_bo *bo)
+{
+ if (!bo)
+ return;
+
+ if (!(bo->flags & XE_BO_FLAG_USER))
+ return;
+
+ op->map.target_leaf_level = 0;
+
+ if (bo->flags & XE_BO_FLAG_NEEDS_1G)
+ op->map.target_leaf_level = 2;
+ else if (bo->flags & XE_BO_FLAG_NEEDS_2M)
+ op->map.target_leaf_level = 1;
+}
+
/*
* Create operations list from IOCTL arguments, setup operations fields so parse
* and commit steps are decoupled from IOCTL arguments. This step can fail.
@@ -2501,6 +2518,12 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
op->map.pat_index = pat_index;
op->map.invalidate_on_bind =
__xe_vm_needs_clear_scratch_pages(vm, flags);
+ /*
+ * Propagate debug BO page-size requirement into the VMA bind operation
+ * for user BO binds.
+ */
+ if (xe_debug_page_size_supported(vm->xe))
+ xe_vma_apply_debug_page_size_flag(op, bo);
} else if (__op->op == DRM_GPUVA_OP_PREFETCH) {
struct xe_vma *vma = gpuva_to_vma(op->base.prefetch.va);
struct xe_tile *tile;
@@ -2823,6 +2846,7 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
return PTR_ERR(vma);
op->map.vma = vma;
+ vma->target_leaf_level = op->map.target_leaf_level;
if (((op->map.immediate || !xe_vm_in_fault_mode(vm)) &&
!(op->map.vma_flags & XE_VMA_SYSTEM_ALLOCATOR)) ||
op->map.invalidate_on_bind)
@@ -2864,6 +2888,8 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
if (IS_ERR(vma))
return PTR_ERR(vma);
+ vma->target_leaf_level = old->target_leaf_level;
+
op->remap.prev = vma;
/*
@@ -2894,6 +2920,8 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
if (IS_ERR(vma))
return PTR_ERR(vma);
+ vma->target_leaf_level = old->target_leaf_level;
+
op->remap.next = vma;
/*
@@ -4778,6 +4806,7 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
* unmapping.
*/
op->map.vma_flags |= vma_flags & XE_VMA_CREATE_MASK;
+ op->map.target_leaf_level = vma->target_leaf_level;
}
}
print_op(vm->xe, __op);
@@ -4824,6 +4853,7 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
*/
if (is_madvise)
xe_vma_mem_attr_copy(&vma->attr, &tmp_attr);
+ vma->target_leaf_level = op->map.target_leaf_level;
}
}
diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
index 635ed29b9a69..c94328662dfc 100644
--- a/drivers/gpu/drm/xe/xe_vm_types.h
+++ b/drivers/gpu/drm/xe/xe_vm_types.h
@@ -174,6 +174,13 @@ struct xe_vma {
* and encoding of the PTEs for this vma.
*/
struct xe_vma_mem_attr attr;
+ /**
+ * @target_leaf_level: requested PT leaf level for this VMA
+ *
+ * 0 for normal 4K/64K mappings, 1 for 2M huge-page mappings,
+ * and 2 for 1G huge-page mappings.
+ */
+ u8 target_leaf_level;
};
/**
@@ -422,6 +429,8 @@ struct xe_vma_op_map {
bool request_decompress;
/** @pat_index: The pat index to use for this operation. */
u16 pat_index;
+ /** @target_leaf_level: requested PT leaf level for this operation */
+ u8 target_leaf_level;
};
/** struct xe_vma_op_remap - VMA remap operation */
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v7 5/7] drm/xe/vm: propagate BO page-size requirements to VMA map flags
2026-07-14 10:55 ` [PATCH v7 5/7] drm/xe/vm: propagate BO page-size requirements to VMA map flags Himal Prasad Ghimiray
@ 2026-07-16 12:28 ` Ghimiray, Himal Prasad
0 siblings, 0 replies; 17+ messages in thread
From: Ghimiray, Himal Prasad @ 2026-07-16 12:28 UTC (permalink / raw)
To: intel-xe
On 14-07-2026 16:25, Himal Prasad Ghimiray wrote:
> From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
>
> Propagate user BO page-size requirement flags into VM bind map
> operations.
>
> When a user BO carries a page-size requirement flag, set the
> corresponding VMA PTE flag during bind-op construction. This covers
> 64K, 2M, and 1G page sizes and allows the debug page-size allocation
> policy selected at BO creation time to be reflected in page-table
> mapping behavior.
>
> v3
> - BO page-size requirement overrides prior map-state flags
> - reword commit message
> v4
> - address review feedback on XE_VMA_CREATE_MASK dependency
> - carry 2M/1G request state in target_leaf_level instead of vma_flags
> - propagate target_leaf_level from bind op to VMA state
> - avoid using accumulated gpuva.flags as future bind policy input
> v5
> - v5:
> - Reword the commit message to match the target_leaf_level-based
> implementation
> - Clarify that BO page-size requirements are propagated through
> bind-op and VMA state
> v6
> - target_leaf_level is propagated to MAP of
> vm_bind_ioctl_ops_parse
IMO, the patch is not needed, we should be able to use bo->flags
directly in pte layer.
>
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
> drivers/gpu/drm/xe/xe_vm.c | 30 ++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_vm_types.h | 9 +++++++++
> 2 files changed, 39 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 23f4a9fb9a49..729f68a20cf7 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -2406,6 +2406,23 @@ static void xe_svm_prefetch_gpuva_ops_fini(struct drm_gpuva_ops *ops)
> }
> }
>
> +static void xe_vma_apply_debug_page_size_flag(struct xe_vma_op *op,
> + struct xe_bo *bo)
> +{
> + if (!bo)
> + return;
> +
> + if (!(bo->flags & XE_BO_FLAG_USER))
> + return;
> +
> + op->map.target_leaf_level = 0;
> +
> + if (bo->flags & XE_BO_FLAG_NEEDS_1G)
> + op->map.target_leaf_level = 2;
> + else if (bo->flags & XE_BO_FLAG_NEEDS_2M)
> + op->map.target_leaf_level = 1;
> +}
> +
> /*
> * Create operations list from IOCTL arguments, setup operations fields so parse
> * and commit steps are decoupled from IOCTL arguments. This step can fail.
> @@ -2501,6 +2518,12 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
> op->map.pat_index = pat_index;
> op->map.invalidate_on_bind =
> __xe_vm_needs_clear_scratch_pages(vm, flags);
> + /*
> + * Propagate debug BO page-size requirement into the VMA bind operation
> + * for user BO binds.
> + */
> + if (xe_debug_page_size_supported(vm->xe))
> + xe_vma_apply_debug_page_size_flag(op, bo);
> } else if (__op->op == DRM_GPUVA_OP_PREFETCH) {
> struct xe_vma *vma = gpuva_to_vma(op->base.prefetch.va);
> struct xe_tile *tile;
> @@ -2823,6 +2846,7 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
> return PTR_ERR(vma);
>
> op->map.vma = vma;
> + vma->target_leaf_level = op->map.target_leaf_level;
> if (((op->map.immediate || !xe_vm_in_fault_mode(vm)) &&
> !(op->map.vma_flags & XE_VMA_SYSTEM_ALLOCATOR)) ||
> op->map.invalidate_on_bind)
> @@ -2864,6 +2888,8 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
> if (IS_ERR(vma))
> return PTR_ERR(vma);
>
> + vma->target_leaf_level = old->target_leaf_level;
> +
> op->remap.prev = vma;
>
> /*
> @@ -2894,6 +2920,8 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
> if (IS_ERR(vma))
> return PTR_ERR(vma);
>
> + vma->target_leaf_level = old->target_leaf_level;
> +
> op->remap.next = vma;
>
> /*
> @@ -4778,6 +4806,7 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
> * unmapping.
> */
> op->map.vma_flags |= vma_flags & XE_VMA_CREATE_MASK;
> + op->map.target_leaf_level = vma->target_leaf_level;
> }
> }
> print_op(vm->xe, __op);
> @@ -4824,6 +4853,7 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
> */
> if (is_madvise)
> xe_vma_mem_attr_copy(&vma->attr, &tmp_attr);
> + vma->target_leaf_level = op->map.target_leaf_level;
> }
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
> index 635ed29b9a69..c94328662dfc 100644
> --- a/drivers/gpu/drm/xe/xe_vm_types.h
> +++ b/drivers/gpu/drm/xe/xe_vm_types.h
> @@ -174,6 +174,13 @@ struct xe_vma {
> * and encoding of the PTEs for this vma.
> */
> struct xe_vma_mem_attr attr;
> + /**
> + * @target_leaf_level: requested PT leaf level for this VMA
> + *
> + * 0 for normal 4K/64K mappings, 1 for 2M huge-page mappings,
> + * and 2 for 1G huge-page mappings.
> + */
> + u8 target_leaf_level;
> };
>
> /**
> @@ -422,6 +429,8 @@ struct xe_vma_op_map {
> bool request_decompress;
> /** @pat_index: The pat index to use for this operation. */
> u16 pat_index;
> + /** @target_leaf_level: requested PT leaf level for this operation */
> + u8 target_leaf_level;
> };
>
> /** struct xe_vma_op_remap - VMA remap operation */
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v7 6/7] drm/xe/pt: allow selecting the bind leaf PTE level
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
` (4 preceding siblings ...)
2026-07-14 10:55 ` [PATCH v7 5/7] drm/xe/vm: propagate BO page-size requirements to VMA map flags Himal Prasad Ghimiray
@ 2026-07-14 10:55 ` Himal Prasad Ghimiray
2026-07-14 10:55 ` [PATCH v7 7/7] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes Himal Prasad Ghimiray
` (4 subsequent siblings)
10 siblings, 0 replies; 17+ messages in thread
From: Himal Prasad Ghimiray @ 2026-07-14 10:55 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Add a target_leaf_level field to the page-table bind walk and use it to
control the level at which leaf entries are emitted.
By default, the bind walk emits level-0 leaf PTEs and relies on
xe_pt_hugepte_possible() to select huge mappings when possible. Add an
explicit target leaf level so the walk can stop earlier when the VMA
requests a larger mapping size.
Use level 1 for 2M PDE mappings and level 2 for 1G PDP mappings, while
keeping level 0 for normal mappings. The existing huge-page heuristic
is preserved for the default level-0 path.
This allows the bind path to emit 2M and 1G leaf entries when requested
by the VMA, while still validating alignment and size requirements.
v2
- avoid using max_level to control walk depth
- use target_leaf_level to preserve the normal walk behavior
- keep the default huge-page heuristic only for the level-0 path
- refine commit message
v3
- reword commit message
v4
- allow fallback to smaller huge-page levels for non-zero
target_leaf_level
- avoid constraining clear_pt walks by target_leaf_level
v5(Himal)
- Restrict only intended level in debug page size policy mode
- Allow the normal path to proceed smoothly when
no debug page-size mode is selected.
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_pt.c | 53 ++++++++++++++++++++++++++++++++++++--
1 file changed, 51 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index e466f714bf86..a476e9a3860f 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -302,6 +302,13 @@ struct xe_pt_stage_bind_walk {
bool needs_64K;
/** @clear_pt: clear page table entries during the bind walk */
bool clear_pt;
+ /** @target_leaf_level: Page-table level at which to emit leaf PTEs
+ * 0 for normal 4K/64K mappings, 1 for 2M huge pages, and 2 for 1G huge
+ * pages. The walk still traverses from the root down; this field tells
+ * xe_pt_stage_bind_entry() to treat the selected level as a leaf instead
+ * of descending further.
+ */
+ u32 target_leaf_level;
/**
* @vma: VMA being mapped
*/
@@ -514,6 +521,37 @@ xe_pt_is_pte_ps64K(u64 addr, u64 next, struct xe_pt_stage_bind_walk *xe_walk)
return xe_walk->found_64K;
}
+static bool xe_pt_huge_leaf_allowed(u64 addr, u64 next, unsigned int level,
+ struct xe_pt_stage_bind_walk *xe_walk)
+{
+ if (xe_walk->clear_pt)
+ return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+ if (!xe_debug_page_size_supported(xe_walk->vm->xe))
+ return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+ if (!xe_walk->target_leaf_level)
+ return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+ if (level == xe_walk->target_leaf_level)
+ return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+ return false;
+}
+
+static bool xe_pt_exact_leaf_required_but_invalid(u64 addr, u64 next,
+ unsigned int level,
+ struct xe_pt_stage_bind_walk *xe_walk)
+{
+ struct xe_device *xe = xe_walk->vm->xe;
+
+ return !xe_walk->clear_pt &&
+ xe_debug_exact_page_size_mode(xe) &&
+ xe_walk->target_leaf_level &&
+ level == xe_walk->target_leaf_level &&
+ !xe_pt_hugepte_possible(addr, next, level, xe_walk);
+}
+
static int
xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
unsigned int level, u64 addr, u64 next,
@@ -531,8 +569,18 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
int ret = 0;
u64 pte;
- /* Is this a leaf entry ?*/
- if (level == 0 || xe_pt_hugepte_possible(addr, next, level, xe_walk)) {
+ if (xe_pt_exact_leaf_required_but_invalid(addr, next, level, xe_walk))
+ return -EINVAL;
+
+ /*
+ * Is this a leaf entry?
+ * Always create a 4K leaf at level 0. For huge pages (level > 0),
+ * validate alignment and size with xe_pt_hugepte_possible().
+ * When target_leaf_level is non-zero, only that huge-page level is
+ * accepted for normal bind walks. Clear walks remain unconstrained so
+ * existing huge leaves can be cleared without descending further.
+ */
+ if (level == 0 || xe_pt_huge_leaf_allowed(addr, next, level, xe_walk)) {
struct xe_res_cursor *curs = xe_walk->curs;
struct xe_bo *bo = xe_vma_bo(xe_walk->vma);
bool is_null_or_purged = xe_vma_is_null(xe_walk->vma) ||
@@ -774,6 +822,7 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
xe_svm_notifier_unlock(vm);
}
+ xe_walk.target_leaf_level = vma->target_leaf_level;
xe_walk.needs_64K = (vm->flags & XE_VM_FLAG_64K);
if (clear_pt)
goto walk_pt;
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v7 7/7] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
` (5 preceding siblings ...)
2026-07-14 10:55 ` [PATCH v7 6/7] drm/xe/pt: allow selecting the bind leaf PTE level Himal Prasad Ghimiray
@ 2026-07-14 10:55 ` Himal Prasad Ghimiray
2026-07-14 11:32 ` ✓ CI.KUnit: success for drm/xe: add page size allocation mode control and coverage (rev5) Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 17+ messages in thread
From: Himal Prasad Ghimiray @ 2026-07-14 10:55 UTC (permalink / raw)
To: intel-xe; +Cc: Nareshkumar Gollakoti
From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Add live KUnit coverage for the debug-controlled BO
page-size allocation modes.
The new tests cover forced 2M mode, forced 1G mode,
and mixed mode. They verify that user BO creation applies
the expected NEEDS_* flags, that no unexpected page-size flags are
added in the forced modes, that BO size is rounded as expected, and
that page_alignment matches the selected leaf size.
The mixed-mode test does not assume a strict per-allocation rotation
sequence, since the device-global mixed-mode index may be perturbed by
concurrent BO creation on a live system. Instead,
it validates that each allocation results in
one valid mixed-mode page-size outcome.
Treat transient VRAM allocation failures as skipped test cases so the
tests can run in varying live environments without producing false
failures.
v3
- address review comments
- rework mixed-mode test to avoid assuming strict rotation order
- reword commit message
v4
- skip VRAM-targeted live tests on non-dGFX devices
v5
- advance the mixed-mode index in the test
v6
- Gaurd kunit tests under CONFIG_DRM_XE_DEBUG_PAGE_SIZE
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/tests/xe_bo.c | 240 ++++++++++++++++++++
drivers/gpu/drm/xe/tests/xe_live_test_mod.c | 6 +
2 files changed, 246 insertions(+)
diff --git a/drivers/gpu/drm/xe/tests/xe_bo.c b/drivers/gpu/drm/xe/tests/xe_bo.c
index 49c95ed67d7e..d28a12e981e3 100644
--- a/drivers/gpu/drm/xe/tests/xe_bo.c
+++ b/drivers/gpu/drm/xe/tests/xe_bo.c
@@ -22,6 +22,229 @@
#include "xe_pci.h"
#include "xe_pm.h"
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+struct page_size_alloc_saved {
+ enum xe_page_size_alloc_ctrl_mode mode;
+ u32 cur_index;
+};
+
+/* Caller must hold xe->page_size_alloc_ctrl.lock. */
+static void page_size_alloc_save(struct xe_device *xe,
+ struct page_size_alloc_saved *s)
+{
+ s->mode = xe->page_size_alloc_ctrl.mode;
+ s->cur_index = xe->page_size_alloc_ctrl.cur_index;
+}
+
+static void page_size_alloc_restore(struct xe_device *xe,
+ const struct page_size_alloc_saved *s)
+{
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ xe->page_size_alloc_ctrl.mode = s->mode;
+ xe->page_size_alloc_ctrl.cur_index = s->cur_index;
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+}
+
+/* Expected properties for a forced page-size allocation mode. */
+struct leaf_info {
+ u64 leaf;
+ u64 alloc_size;
+ u32 flag;
+ const char *name;
+};
+
+static const struct leaf_info leaf_2m = {
+ .leaf = SZ_2M,
+ .alloc_size = SZ_2M - PAGE_SIZE,
+ .flag = XE_BO_FLAG_NEEDS_2M,
+ .name = "2M",
+};
+
+static const struct leaf_info leaf_1g = {
+ .leaf = SZ_1G,
+ .alloc_size = SZ_1G - PAGE_SIZE,
+ .flag = XE_BO_FLAG_NEEDS_1G,
+ .name = "1G",
+};
+
+static void run_only_leaf(struct kunit *test,
+ enum xe_page_size_alloc_ctrl_mode mode,
+ const struct leaf_info *li)
+{
+ struct xe_device *xe = test->priv;
+ struct page_size_alloc_saved saved;
+ struct xe_bo *bo;
+ struct ttm_buffer_object *ttm_bo;
+ u32 other_flags;
+
+ if (!IS_DGFX(xe)) {
+ kunit_skip(test, "requires dGFX VRAM");
+ return;
+ }
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ page_size_alloc_save(xe, &saved);
+ xe->page_size_alloc_ctrl.mode = mode;
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ bo = xe_bo_create_user(xe, NULL, li->alloc_size,
+ DRM_XE_GEM_CPU_CACHING_WC,
+ XE_BO_FLAG_VRAM0, NULL);
+ if (IS_ERR(bo)) {
+ page_size_alloc_restore(xe, &saved);
+ if (PTR_ERR(bo) == -ENOSPC) {
+ kunit_skip(test,
+ "no contiguous %s VRAM available right now",
+ li->name);
+ return;
+ }
+
+ KUNIT_FAIL(test, "%s BO alloc failed: %pe", li->name, bo);
+ return;
+ }
+
+ ttm_bo = &bo->ttm;
+
+ /* 1) The mode added the right NEEDS_* flag. */
+ KUNIT_EXPECT_TRUE_MSG(test, bo->flags & li->flag,
+ "%s: flag missing, flags=0x%x",
+ li->name, bo->flags);
+
+ /* 2) No other NEEDS_* flags accidentally tagged on. */
+ other_flags = (XE_BO_FLAG_NEEDS_64K |
+ XE_BO_FLAG_NEEDS_2M |
+ XE_BO_FLAG_NEEDS_1G) & ~li->flag;
+ KUNIT_EXPECT_FALSE_MSG(test, bo->flags & other_flags,
+ "%s: stray flags=0x%x",
+ li->name, bo->flags);
+ /* 3) BO size was rounded up to the expected leaf size. */
+ KUNIT_EXPECT_EQ_MSG(test, xe_bo_size(bo), li->leaf,
+ "%s: bo size=%llu expected=%llu",
+ li->name,
+ (u64)xe_bo_size(bo),
+ (u64)li->leaf);
+ /*
+ * 4) Allocator honored the requested alignment.
+ * ttm_bo->page_alignment is stored in PAGE_SIZE units, so compare against
+ * the expected leaf size converted with >> PAGE_SHIFT.
+ */
+ KUNIT_EXPECT_EQ_MSG(test, ttm_bo->page_alignment,
+ li->leaf >> PAGE_SHIFT,
+ "%s: page_alignment=%u pages expected=%llu pages",
+ li->name, ttm_bo->page_alignment,
+ (u64)(li->leaf >> PAGE_SHIFT));
+
+ xe_bo_put(bo);
+ page_size_alloc_restore(xe, &saved);
+}
+
+static void xe_bo_page_size_alloc_only_2m(struct kunit *test)
+{
+ run_only_leaf(test, XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M, &leaf_2m);
+}
+
+static void xe_bo_page_size_alloc_only_1g(struct kunit *test)
+{
+ run_only_leaf(test, XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G, &leaf_1g);
+}
+
+static void xe_bo_page_size_alloc_mixed_bos(struct kunit *test)
+{
+ struct xe_device *xe = test->priv;
+ struct page_size_alloc_saved saved;
+ struct xe_bo *bo;
+ struct ttm_buffer_object *ttm_bo;
+ u32 all_flags = XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M |
+ XE_BO_FLAG_NEEDS_1G;
+ u32 flags;
+ u64 expected_align;
+ int i;
+ const int n = 4;
+
+ if (!IS_DGFX(xe)) {
+ kunit_skip(test, "requires dGFX VRAM");
+ return;
+ }
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ page_size_alloc_save(xe, &saved);
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ for (i = 0; i < n; i++) {
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ xe->page_size_alloc_ctrl.mode = XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED;
+ xe->page_size_alloc_ctrl.cur_index = i;
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+ /*
+ * Request a size valid for any mixed-mode slot. Since cur_index is
+ * device-global and may be perturbed by concurrent allocations on
+ * a live system, do not assume this iteration will see a specific
+ * slot.
+ */
+ bo = xe_bo_create_user(xe, NULL, SZ_1G,
+ DRM_XE_GEM_CPU_CACHING_WC,
+ XE_BO_FLAG_VRAM0, NULL);
+ if (IS_ERR(bo)) {
+ int err = PTR_ERR(bo);
+
+ page_size_alloc_restore(xe, &saved);
+ if (err == -ENOSPC) {
+ kunit_skip(test,
+ "mixed mode BO allocation unavailable: %d",
+ err);
+ return;
+ }
+ KUNIT_FAIL(test, "iter=%d alloc failed: %pe", i, bo);
+ return;
+ }
+
+ ttm_bo = &bo->ttm;
+ flags = bo->flags & all_flags;
+ /*
+ * Mixed mode may result in:
+ * 0-> default/4K
+ * XE_BO_FLAG_NEEDS_64K
+ * XE_BO_FLAG_NEEDS_2M
+ * XE_BO_FLAG_NEEDS_1G
+ * Any other combination is invalid.
+ */
+ if (flags == 0) {
+ expected_align = SZ_4K;
+ } else if (flags == XE_BO_FLAG_NEEDS_64K) {
+ expected_align = SZ_64K;
+ } else if (flags == XE_BO_FLAG_NEEDS_2M) {
+ expected_align = SZ_2M;
+ } else if (flags == XE_BO_FLAG_NEEDS_1G) {
+ expected_align = SZ_1G;
+ } else {
+ KUNIT_FAIL(test,
+ "iter=%d invalid mixed-mode flags: 0x%x",
+ i, flags);
+ xe_bo_put(bo);
+ page_size_alloc_restore(xe, &saved);
+ return;
+ }
+ /*
+ * BO size should remain valid for the selected mode. Since the
+ * request is SZ_1G, it should remain unchanged regardless of the
+ * selected page-size policy.
+ */
+ KUNIT_EXPECT_EQ_MSG(test, xe_bo_size(bo), (u64)SZ_1G,
+ "iter=%d size=%llu expected=%llu",
+ i,
+ (u64)xe_bo_size(bo),
+ (u64)SZ_1G);
+ KUNIT_EXPECT_EQ_MSG(test, ttm_bo->page_alignment,
+ expected_align >> PAGE_SHIFT,
+ "iter=%d flags=0x%x page_alignment=%u pages expected=%llu pages",
+ i, flags, ttm_bo->page_alignment,
+ (u64)(expected_align >> PAGE_SHIFT));
+ xe_bo_put(bo);
+ }
+ page_size_alloc_restore(xe, &saved);
+}
+#endif
+
static int ccs_test_migrate(struct xe_tile *tile, struct xe_bo *bo,
bool clear, u64 get_val, u64 assign_val,
struct kunit *test, struct drm_exec *exec)
@@ -609,6 +832,23 @@ static struct kunit_case xe_bo_tests[] = {
{}
};
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static struct kunit_case xe_bo_page_size_alloc_cases[] = {
+ KUNIT_CASE_PARAM(xe_bo_page_size_alloc_only_2m, xe_pci_live_device_gen_param),
+ KUNIT_CASE_PARAM(xe_bo_page_size_alloc_only_1g, xe_pci_live_device_gen_param),
+ KUNIT_CASE_PARAM(xe_bo_page_size_alloc_mixed_bos, xe_pci_live_device_gen_param),
+ {}
+};
+
+VISIBLE_IF_KUNIT
+struct kunit_suite xe_bo_page_size_alloc_suite = {
+ .name = "xe_bo_page_size_alloc",
+ .test_cases = xe_bo_page_size_alloc_cases,
+ .init = xe_kunit_helper_xe_device_live_test_init,
+};
+EXPORT_SYMBOL_IF_KUNIT(xe_bo_page_size_alloc_suite);
+#endif
+
VISIBLE_IF_KUNIT
struct kunit_suite xe_bo_test_suite = {
.name = "xe_bo",
diff --git a/drivers/gpu/drm/xe/tests/xe_live_test_mod.c b/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
index c55e46f1ae92..87cd7db20e5f 100644
--- a/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
+++ b/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
@@ -11,6 +11,9 @@ extern struct kunit_suite xe_dma_buf_test_suite;
extern struct kunit_suite xe_migrate_test_suite;
extern struct kunit_suite xe_mocs_test_suite;
extern struct kunit_suite xe_guc_g2g_test_suite;
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+extern struct kunit_suite xe_bo_page_size_alloc_suite;
+#endif
kunit_test_suite(xe_bo_test_suite);
kunit_test_suite(xe_bo_shrink_test_suite);
@@ -18,6 +21,9 @@ kunit_test_suite(xe_dma_buf_test_suite);
kunit_test_suite(xe_migrate_test_suite);
kunit_test_suite(xe_mocs_test_suite);
kunit_test_suite(xe_guc_g2g_test_suite);
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+kunit_test_suite(xe_bo_page_size_alloc_suite);
+#endif
MODULE_AUTHOR("Intel Corporation");
MODULE_LICENSE("GPL");
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* ✓ CI.KUnit: success for drm/xe: add page size allocation mode control and coverage (rev5)
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
` (6 preceding siblings ...)
2026-07-14 10:55 ` [PATCH v7 7/7] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes Himal Prasad Ghimiray
@ 2026-07-14 11:32 ` Patchwork
2026-07-14 11:48 ` ✗ CI.checksparse: warning " Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-07-14 11:32 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
== Series Details ==
Series: drm/xe: add page size allocation mode control and coverage (rev5)
URL : https://patchwork.freedesktop.org/series/168905/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:31:41] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:31:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:32:17] Starting KUnit Kernel (1/1)...
[11:32:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:32:17] ================== guc_buf (11 subtests) ===================
[11:32:17] [PASSED] test_smallest
[11:32:17] [PASSED] test_largest
[11:32:17] [PASSED] test_granular
[11:32:17] [PASSED] test_unique
[11:32:17] [PASSED] test_overlap
[11:32:17] [PASSED] test_reusable
[11:32:17] [PASSED] test_too_big
[11:32:17] [PASSED] test_flush
[11:32:17] [PASSED] test_lookup
[11:32:17] [PASSED] test_data
[11:32:17] [PASSED] test_class
[11:32:17] ===================== [PASSED] guc_buf =====================
[11:32:17] =================== guc_dbm (7 subtests) ===================
[11:32:17] [PASSED] test_empty
[11:32:17] [PASSED] test_default
[11:32:17] ======================== test_size ========================
[11:32:17] [PASSED] 4
[11:32:17] [PASSED] 8
[11:32:17] [PASSED] 32
[11:32:17] [PASSED] 256
[11:32:17] ==================== [PASSED] test_size ====================
[11:32:17] ======================= test_reuse ========================
[11:32:17] [PASSED] 4
[11:32:17] [PASSED] 8
[11:32:17] [PASSED] 32
[11:32:17] [PASSED] 256
[11:32:17] =================== [PASSED] test_reuse ====================
[11:32:17] =================== test_range_overlap ====================
[11:32:17] [PASSED] 4
[11:32:17] [PASSED] 8
[11:32:17] [PASSED] 32
[11:32:17] [PASSED] 256
[11:32:17] =============== [PASSED] test_range_overlap ================
[11:32:17] =================== test_range_compact ====================
[11:32:17] [PASSED] 4
[11:32:17] [PASSED] 8
[11:32:17] [PASSED] 32
[11:32:17] [PASSED] 256
[11:32:17] =============== [PASSED] test_range_compact ================
[11:32:17] ==================== test_range_spare =====================
[11:32:17] [PASSED] 4
[11:32:17] [PASSED] 8
[11:32:17] [PASSED] 32
[11:32:17] [PASSED] 256
[11:32:17] ================ [PASSED] test_range_spare =================
[11:32:17] ===================== [PASSED] guc_dbm =====================
[11:32:17] =================== guc_idm (6 subtests) ===================
[11:32:17] [PASSED] bad_init
[11:32:17] [PASSED] no_init
[11:32:17] [PASSED] init_fini
[11:32:17] [PASSED] check_used
[11:32:17] [PASSED] check_quota
[11:32:17] [PASSED] check_all
[11:32:17] ===================== [PASSED] guc_idm =====================
[11:32:17] =============== guc_klv_helpers (9 subtests) ===============
[11:32:17] [PASSED] test_count
[11:32:17] [PASSED] test_encode_u32
[11:32:17] [PASSED] test_encode_u64
[11:32:17] [PASSED] test_encode_string
[11:32:17] [PASSED] test_encode_object_raw
[11:32:17] [PASSED] test_encode_object_klv
[11:32:17] [PASSED] test_encode_object_nested
[11:32:17] [PASSED] test_encode_object_basic
[11:32:17] [PASSED] test_print
[11:32:17] ================= [PASSED] guc_klv_helpers =================
[11:32:17] ================== no_relay (3 subtests) ===================
[11:32:17] [PASSED] xe_drops_guc2pf_if_not_ready
[11:32:17] [PASSED] xe_drops_guc2vf_if_not_ready
[11:32:17] [PASSED] xe_rejects_send_if_not_ready
[11:32:17] ==================== [PASSED] no_relay =====================
[11:32:17] ================== pf_relay (14 subtests) ==================
[11:32:17] [PASSED] pf_rejects_guc2pf_too_short
[11:32:17] [PASSED] pf_rejects_guc2pf_too_long
[11:32:17] [PASSED] pf_rejects_guc2pf_no_payload
[11:32:17] [PASSED] pf_fails_no_payload
[11:32:17] [PASSED] pf_fails_bad_origin
[11:32:17] [PASSED] pf_fails_bad_type
[11:32:17] [PASSED] pf_txn_reports_error
[11:32:17] [PASSED] pf_txn_sends_pf2guc
[11:32:17] [PASSED] pf_sends_pf2guc
[11:32:17] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:17] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:17] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:17] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:17] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:17] ==================== [PASSED] pf_relay =====================
[11:32:17] ================== vf_relay (3 subtests) ===================
[11:32:17] [PASSED] vf_rejects_guc2vf_too_short
[11:32:17] [PASSED] vf_rejects_guc2vf_too_long
[11:32:17] [PASSED] vf_rejects_guc2vf_no_payload
[11:32:17] ==================== [PASSED] vf_relay =====================
[11:32:17] ================ pf_gt_config (9 subtests) =================
[11:32:17] [PASSED] fair_contexts_1vf
[11:32:17] [PASSED] fair_doorbells_1vf
[11:32:17] [PASSED] fair_ggtt_1vf
[11:32:17] ====================== fair_vram_1vf ======================
[11:32:17] [PASSED] 3.50 GiB
[11:32:17] [PASSED] 11.5 GiB
[11:32:17] [PASSED] 15.5 GiB
[11:32:17] [PASSED] 31.5 GiB
[11:32:17] [PASSED] 63.5 GiB
[11:32:17] [PASSED] 1.91 GiB
[11:32:17] ================== [PASSED] fair_vram_1vf ==================
[11:32:17] ================ fair_vram_1vf_admin_only =================
[11:32:17] [PASSED] 3.50 GiB
[11:32:17] [PASSED] 11.5 GiB
[11:32:17] [PASSED] 15.5 GiB
[11:32:17] [PASSED] 31.5 GiB
[11:32:17] [PASSED] 63.5 GiB
[11:32:17] [PASSED] 1.91 GiB
[11:32:17] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:32:17] ====================== fair_contexts ======================
[11:32:17] [PASSED] 1 VF
[11:32:17] [PASSED] 2 VFs
[11:32:17] [PASSED] 3 VFs
[11:32:17] [PASSED] 4 VFs
[11:32:17] [PASSED] 5 VFs
[11:32:17] [PASSED] 6 VFs
[11:32:17] [PASSED] 7 VFs
[11:32:17] [PASSED] 8 VFs
[11:32:17] [PASSED] 9 VFs
[11:32:17] [PASSED] 10 VFs
[11:32:17] [PASSED] 11 VFs
[11:32:17] [PASSED] 12 VFs
[11:32:17] [PASSED] 13 VFs
[11:32:17] [PASSED] 14 VFs
[11:32:17] [PASSED] 15 VFs
[11:32:17] [PASSED] 16 VFs
[11:32:17] [PASSED] 17 VFs
[11:32:17] [PASSED] 18 VFs
[11:32:17] [PASSED] 19 VFs
[11:32:17] [PASSED] 20 VFs
[11:32:17] [PASSED] 21 VFs
[11:32:17] [PASSED] 22 VFs
[11:32:17] [PASSED] 23 VFs
[11:32:17] [PASSED] 24 VFs
[11:32:17] [PASSED] 25 VFs
[11:32:17] [PASSED] 26 VFs
[11:32:17] [PASSED] 27 VFs
[11:32:17] [PASSED] 28 VFs
[11:32:17] [PASSED] 29 VFs
[11:32:17] [PASSED] 30 VFs
[11:32:17] [PASSED] 31 VFs
[11:32:17] [PASSED] 32 VFs
[11:32:17] [PASSED] 33 VFs
[11:32:17] [PASSED] 34 VFs
[11:32:17] [PASSED] 35 VFs
[11:32:17] [PASSED] 36 VFs
[11:32:17] [PASSED] 37 VFs
[11:32:17] [PASSED] 38 VFs
[11:32:17] [PASSED] 39 VFs
[11:32:17] [PASSED] 40 VFs
[11:32:17] [PASSED] 41 VFs
[11:32:17] [PASSED] 42 VFs
[11:32:17] [PASSED] 43 VFs
[11:32:17] [PASSED] 44 VFs
[11:32:17] [PASSED] 45 VFs
[11:32:17] [PASSED] 46 VFs
[11:32:17] [PASSED] 47 VFs
[11:32:17] [PASSED] 48 VFs
[11:32:17] [PASSED] 49 VFs
[11:32:17] [PASSED] 50 VFs
[11:32:17] [PASSED] 51 VFs
[11:32:17] [PASSED] 52 VFs
[11:32:17] [PASSED] 53 VFs
[11:32:17] [PASSED] 54 VFs
[11:32:17] [PASSED] 55 VFs
[11:32:17] [PASSED] 56 VFs
[11:32:17] [PASSED] 57 VFs
[11:32:17] [PASSED] 58 VFs
[11:32:17] [PASSED] 59 VFs
[11:32:17] [PASSED] 60 VFs
[11:32:17] [PASSED] 61 VFs
[11:32:17] [PASSED] 62 VFs
[11:32:17] [PASSED] 63 VFs
[11:32:17] ================== [PASSED] fair_contexts ==================
[11:32:17] ===================== fair_doorbells ======================
[11:32:17] [PASSED] 1 VF
[11:32:17] [PASSED] 2 VFs
[11:32:17] [PASSED] 3 VFs
[11:32:17] [PASSED] 4 VFs
[11:32:17] [PASSED] 5 VFs
[11:32:17] [PASSED] 6 VFs
[11:32:17] [PASSED] 7 VFs
[11:32:17] [PASSED] 8 VFs
[11:32:17] [PASSED] 9 VFs
[11:32:17] [PASSED] 10 VFs
[11:32:17] [PASSED] 11 VFs
[11:32:17] [PASSED] 12 VFs
[11:32:17] [PASSED] 13 VFs
[11:32:17] [PASSED] 14 VFs
[11:32:17] [PASSED] 15 VFs
[11:32:17] [PASSED] 16 VFs
[11:32:17] [PASSED] 17 VFs
[11:32:17] [PASSED] 18 VFs
[11:32:17] [PASSED] 19 VFs
[11:32:17] [PASSED] 20 VFs
[11:32:17] [PASSED] 21 VFs
[11:32:17] [PASSED] 22 VFs
[11:32:17] [PASSED] 23 VFs
[11:32:17] [PASSED] 24 VFs
[11:32:17] [PASSED] 25 VFs
[11:32:17] [PASSED] 26 VFs
[11:32:17] [PASSED] 27 VFs
[11:32:17] [PASSED] 28 VFs
[11:32:17] [PASSED] 29 VFs
[11:32:17] [PASSED] 30 VFs
[11:32:17] [PASSED] 31 VFs
[11:32:17] [PASSED] 32 VFs
[11:32:17] [PASSED] 33 VFs
[11:32:17] [PASSED] 34 VFs
[11:32:17] [PASSED] 35 VFs
[11:32:17] [PASSED] 36 VFs
[11:32:17] [PASSED] 37 VFs
[11:32:17] [PASSED] 38 VFs
[11:32:17] [PASSED] 39 VFs
[11:32:17] [PASSED] 40 VFs
[11:32:17] [PASSED] 41 VFs
[11:32:17] [PASSED] 42 VFs
[11:32:17] [PASSED] 43 VFs
[11:32:17] [PASSED] 44 VFs
[11:32:17] [PASSED] 45 VFs
[11:32:17] [PASSED] 46 VFs
[11:32:17] [PASSED] 47 VFs
[11:32:17] [PASSED] 48 VFs
[11:32:17] [PASSED] 49 VFs
[11:32:17] [PASSED] 50 VFs
[11:32:17] [PASSED] 51 VFs
[11:32:17] [PASSED] 52 VFs
[11:32:17] [PASSED] 53 VFs
[11:32:17] [PASSED] 54 VFs
[11:32:17] [PASSED] 55 VFs
[11:32:17] [PASSED] 56 VFs
[11:32:17] [PASSED] 57 VFs
[11:32:17] [PASSED] 58 VFs
[11:32:17] [PASSED] 59 VFs
[11:32:17] [PASSED] 60 VFs
[11:32:17] [PASSED] 61 VFs
[11:32:17] [PASSED] 62 VFs
[11:32:17] [PASSED] 63 VFs
[11:32:17] ================= [PASSED] fair_doorbells ==================
[11:32:17] ======================== fair_ggtt ========================
[11:32:17] [PASSED] 1 VF
[11:32:17] [PASSED] 2 VFs
[11:32:17] [PASSED] 3 VFs
[11:32:17] [PASSED] 4 VFs
[11:32:17] [PASSED] 5 VFs
[11:32:17] [PASSED] 6 VFs
[11:32:17] [PASSED] 7 VFs
[11:32:17] [PASSED] 8 VFs
[11:32:17] [PASSED] 9 VFs
[11:32:17] [PASSED] 10 VFs
[11:32:17] [PASSED] 11 VFs
[11:32:17] [PASSED] 12 VFs
[11:32:17] [PASSED] 13 VFs
[11:32:17] [PASSED] 14 VFs
[11:32:17] [PASSED] 15 VFs
[11:32:17] [PASSED] 16 VFs
[11:32:17] [PASSED] 17 VFs
[11:32:17] [PASSED] 18 VFs
[11:32:17] [PASSED] 19 VFs
[11:32:17] [PASSED] 20 VFs
[11:32:17] [PASSED] 21 VFs
[11:32:17] [PASSED] 22 VFs
[11:32:17] [PASSED] 23 VFs
[11:32:17] [PASSED] 24 VFs
[11:32:17] [PASSED] 25 VFs
[11:32:17] [PASSED] 26 VFs
[11:32:17] [PASSED] 27 VFs
[11:32:17] [PASSED] 28 VFs
[11:32:17] [PASSED] 29 VFs
[11:32:17] [PASSED] 30 VFs
[11:32:17] [PASSED] 31 VFs
[11:32:17] [PASSED] 32 VFs
[11:32:17] [PASSED] 33 VFs
[11:32:17] [PASSED] 34 VFs
[11:32:17] [PASSED] 35 VFs
[11:32:17] [PASSED] 36 VFs
[11:32:17] [PASSED] 37 VFs
[11:32:17] [PASSED] 38 VFs
[11:32:17] [PASSED] 39 VFs
[11:32:17] [PASSED] 40 VFs
[11:32:17] [PASSED] 41 VFs
[11:32:17] [PASSED] 42 VFs
[11:32:17] [PASSED] 43 VFs
[11:32:17] [PASSED] 44 VFs
[11:32:17] [PASSED] 45 VFs
[11:32:17] [PASSED] 46 VFs
[11:32:17] [PASSED] 47 VFs
[11:32:17] [PASSED] 48 VFs
[11:32:17] [PASSED] 49 VFs
[11:32:17] [PASSED] 50 VFs
[11:32:17] [PASSED] 51 VFs
[11:32:17] [PASSED] 52 VFs
[11:32:17] [PASSED] 53 VFs
[11:32:17] [PASSED] 54 VFs
[11:32:17] [PASSED] 55 VFs
[11:32:17] [PASSED] 56 VFs
[11:32:17] [PASSED] 57 VFs
[11:32:17] [PASSED] 58 VFs
[11:32:17] [PASSED] 59 VFs
[11:32:17] [PASSED] 60 VFs
[11:32:17] [PASSED] 61 VFs
[11:32:17] [PASSED] 62 VFs
[11:32:17] [PASSED] 63 VFs
[11:32:17] ==================== [PASSED] fair_ggtt ====================
[11:32:17] ======================== fair_vram ========================
[11:32:17] [PASSED] 1 VF
[11:32:17] [PASSED] 2 VFs
[11:32:17] [PASSED] 3 VFs
[11:32:17] [PASSED] 4 VFs
[11:32:17] [PASSED] 5 VFs
[11:32:17] [PASSED] 6 VFs
[11:32:17] [PASSED] 7 VFs
[11:32:17] [PASSED] 8 VFs
[11:32:17] [PASSED] 9 VFs
[11:32:17] [PASSED] 10 VFs
[11:32:17] [PASSED] 11 VFs
[11:32:17] [PASSED] 12 VFs
[11:32:17] [PASSED] 13 VFs
[11:32:17] [PASSED] 14 VFs
[11:32:17] [PASSED] 15 VFs
[11:32:17] [PASSED] 16 VFs
[11:32:17] [PASSED] 17 VFs
[11:32:17] [PASSED] 18 VFs
[11:32:17] [PASSED] 19 VFs
[11:32:17] [PASSED] 20 VFs
[11:32:17] [PASSED] 21 VFs
[11:32:17] [PASSED] 22 VFs
[11:32:17] [PASSED] 23 VFs
[11:32:17] [PASSED] 24 VFs
[11:32:17] [PASSED] 25 VFs
[11:32:17] [PASSED] 26 VFs
[11:32:17] [PASSED] 27 VFs
[11:32:17] [PASSED] 28 VFs
[11:32:17] [PASSED] 29 VFs
[11:32:17] [PASSED] 30 VFs
[11:32:17] [PASSED] 31 VFs
[11:32:17] [PASSED] 32 VFs
[11:32:17] [PASSED] 33 VFs
[11:32:17] [PASSED] 34 VFs
[11:32:17] [PASSED] 35 VFs
[11:32:17] [PASSED] 36 VFs
[11:32:17] [PASSED] 37 VFs
[11:32:17] [PASSED] 38 VFs
[11:32:17] [PASSED] 39 VFs
[11:32:17] [PASSED] 40 VFs
[11:32:17] [PASSED] 41 VFs
[11:32:17] [PASSED] 42 VFs
[11:32:17] [PASSED] 43 VFs
[11:32:17] [PASSED] 44 VFs
[11:32:17] [PASSED] 45 VFs
[11:32:17] [PASSED] 46 VFs
[11:32:17] [PASSED] 47 VFs
[11:32:17] [PASSED] 48 VFs
[11:32:17] [PASSED] 49 VFs
[11:32:17] [PASSED] 50 VFs
[11:32:17] [PASSED] 51 VFs
[11:32:17] [PASSED] 52 VFs
[11:32:17] [PASSED] 53 VFs
[11:32:17] [PASSED] 54 VFs
[11:32:17] [PASSED] 55 VFs
[11:32:17] [PASSED] 56 VFs
[11:32:17] [PASSED] 57 VFs
[11:32:17] [PASSED] 58 VFs
[11:32:17] [PASSED] 59 VFs
[11:32:17] [PASSED] 60 VFs
[11:32:17] [PASSED] 61 VFs
[11:32:17] [PASSED] 62 VFs
[11:32:17] [PASSED] 63 VFs
[11:32:17] ==================== [PASSED] fair_vram ====================
[11:32:17] ================== [PASSED] pf_gt_config ===================
[11:32:17] ===================== lmtt (1 subtest) =====================
[11:32:17] ======================== test_ops =========================
[11:32:17] [PASSED] 2-level
[11:32:17] [PASSED] multi-level
[11:32:17] ==================== [PASSED] test_ops =====================
[11:32:17] ====================== [PASSED] lmtt =======================
[11:32:17] ================= sriov_packet (1 subtest) =================
[11:32:17] [PASSED] test_descriptor_init
[11:32:17] ================== [PASSED] sriov_packet ===================
[11:32:17] ================= pf_service (11 subtests) =================
[11:32:17] [PASSED] pf_negotiate_any
[11:32:17] [PASSED] pf_negotiate_base_match
[11:32:17] [PASSED] pf_negotiate_base_newer
[11:32:17] [PASSED] pf_negotiate_base_next
[11:32:17] [SKIPPED] pf_negotiate_base_older (no older minor)
[11:32:17] [PASSED] pf_negotiate_base_prev
[11:32:17] [PASSED] pf_negotiate_latest_match
[11:32:17] [PASSED] pf_negotiate_latest_newer
[11:32:17] [PASSED] pf_negotiate_latest_next
[11:32:17] [SKIPPED] pf_negotiate_latest_older (no older minor)
[11:32:17] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[11:32:17] =================== [PASSED] pf_service ====================
[11:32:17] ================= xe_guc_g2g (2 subtests) ==================
[11:32:17] ============== xe_live_guc_g2g_kunit_default ==============
[11:32:17] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:32:17] ============== xe_live_guc_g2g_kunit_allmem ===============
[11:32:17] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:32:17] =================== [SKIPPED] xe_guc_g2g ===================
[11:32:17] =================== xe_mocs (2 subtests) ===================
[11:32:17] ================ xe_live_mocs_kernel_kunit ================
[11:32:17] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:32:17] ================ xe_live_mocs_reset_kunit =================
[11:32:17] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:32:17] ==================== [SKIPPED] xe_mocs =====================
[11:32:17] ================= xe_migrate (2 subtests) ==================
[11:32:17] ================= xe_migrate_sanity_kunit =================
[11:32:17] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:32:17] ================== xe_validate_ccs_kunit ==================
[11:32:17] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:32:17] =================== [SKIPPED] xe_migrate ===================
[11:32:17] ================== xe_dma_buf (1 subtest) ==================
[11:32:17] ==================== xe_dma_buf_kunit =====================
[11:32:17] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:32:17] =================== [SKIPPED] xe_dma_buf ===================
[11:32:17] ================= xe_bo_shrink (1 subtest) =================
[11:32:17] =================== xe_bo_shrink_kunit ====================
[11:32:17] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:32:17] ================== [SKIPPED] xe_bo_shrink ==================
[11:32:17] ==================== xe_bo (2 subtests) ====================
[11:32:17] ================== xe_ccs_migrate_kunit ===================
[11:32:17] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:32:17] ==================== xe_bo_evict_kunit ====================
[11:32:17] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:32:17] ===================== [SKIPPED] xe_bo ======================
[11:32:17] ==================== args (13 subtests) ====================
[11:32:17] [PASSED] count_args_test
[11:32:17] [PASSED] call_args_example
[11:32:17] [PASSED] call_args_test
[11:32:17] [PASSED] drop_first_arg_example
[11:32:17] [PASSED] drop_first_arg_test
[11:32:17] [PASSED] first_arg_example
[11:32:17] [PASSED] first_arg_test
[11:32:17] [PASSED] last_arg_example
[11:32:17] [PASSED] last_arg_test
[11:32:17] [PASSED] pick_arg_example
[11:32:17] [PASSED] if_args_example
[11:32:17] [PASSED] if_args_test
[11:32:17] [PASSED] sep_comma_example
[11:32:17] ====================== [PASSED] args =======================
[11:32:17] =================== xe_pci (3 subtests) ====================
[11:32:17] ==================== check_graphics_ip ====================
[11:32:17] [PASSED] 12.00 Xe_LP
[11:32:17] [PASSED] 12.10 Xe_LP+
[11:32:17] [PASSED] 12.55 Xe_HPG
[11:32:17] [PASSED] 12.60 Xe_HPC
[11:32:17] [PASSED] 12.70 Xe_LPG
[11:32:17] [PASSED] 12.71 Xe_LPG
[11:32:17] [PASSED] 12.74 Xe_LPG+
[11:32:17] [PASSED] 20.01 Xe2_HPG
[11:32:17] [PASSED] 20.02 Xe2_HPG
[11:32:17] [PASSED] 20.04 Xe2_LPG
[11:32:17] [PASSED] 30.00 Xe3_LPG
[11:32:17] [PASSED] 30.01 Xe3_LPG
[11:32:17] [PASSED] 30.03 Xe3_LPG
[11:32:17] [PASSED] 30.04 Xe3_LPG
[11:32:17] [PASSED] 30.05 Xe3_LPG
[11:32:17] [PASSED] 35.10 Xe3p_LPG
[11:32:17] [PASSED] 35.11 Xe3p_XPC
[11:32:17] ================ [PASSED] check_graphics_ip ================
[11:32:17] ===================== check_media_ip ======================
[11:32:17] [PASSED] 12.00 Xe_M
[11:32:17] [PASSED] 12.55 Xe_HPM
[11:32:17] [PASSED] 13.00 Xe_LPM+
[11:32:17] [PASSED] 13.01 Xe2_HPM
[11:32:17] [PASSED] 20.00 Xe2_LPM
[11:32:17] [PASSED] 30.00 Xe3_LPM
[11:32:17] [PASSED] 30.02 Xe3_LPM
[11:32:17] [PASSED] 35.00 Xe3p_LPM
[11:32:17] [PASSED] 35.03 Xe3p_HPM
[11:32:17] ================= [PASSED] check_media_ip ==================
[11:32:17] =================== check_platform_desc ===================
[11:32:17] [PASSED] 0x9A60 (TIGERLAKE)
[11:32:17] [PASSED] 0x9A68 (TIGERLAKE)
[11:32:17] [PASSED] 0x9A70 (TIGERLAKE)
[11:32:17] [PASSED] 0x9A40 (TIGERLAKE)
[11:32:17] [PASSED] 0x9A49 (TIGERLAKE)
[11:32:17] [PASSED] 0x9A59 (TIGERLAKE)
[11:32:17] [PASSED] 0x9A78 (TIGERLAKE)
[11:32:17] [PASSED] 0x9AC0 (TIGERLAKE)
[11:32:17] [PASSED] 0x9AC9 (TIGERLAKE)
[11:32:17] [PASSED] 0x9AD9 (TIGERLAKE)
[11:32:17] [PASSED] 0x9AF8 (TIGERLAKE)
[11:32:17] [PASSED] 0x4C80 (ROCKETLAKE)
[11:32:17] [PASSED] 0x4C8A (ROCKETLAKE)
[11:32:17] [PASSED] 0x4C8B (ROCKETLAKE)
[11:32:17] [PASSED] 0x4C8C (ROCKETLAKE)
[11:32:17] [PASSED] 0x4C90 (ROCKETLAKE)
[11:32:17] [PASSED] 0x4C9A (ROCKETLAKE)
[11:32:17] [PASSED] 0x4680 (ALDERLAKE_S)
[11:32:17] [PASSED] 0x4682 (ALDERLAKE_S)
[11:32:17] [PASSED] 0x4688 (ALDERLAKE_S)
[11:32:17] [PASSED] 0x468A (ALDERLAKE_S)
[11:32:17] [PASSED] 0x468B (ALDERLAKE_S)
[11:32:17] [PASSED] 0x4690 (ALDERLAKE_S)
[11:32:17] [PASSED] 0x4692 (ALDERLAKE_S)
[11:32:17] [PASSED] 0x4693 (ALDERLAKE_S)
[11:32:17] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46AA (ALDERLAKE_P)
[11:32:17] [PASSED] 0x462A (ALDERLAKE_P)
[11:32:17] [PASSED] 0x4626 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x4628 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:32:17] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:32:17] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:32:17] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:32:17] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:32:17] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:32:17] [PASSED] 0xA721 (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA720 (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:32:17] [PASSED] 0xA780 (ALDERLAKE_S)
[11:32:17] [PASSED] 0xA781 (ALDERLAKE_S)
[11:32:17] [PASSED] 0xA782 (ALDERLAKE_S)
[11:32:17] [PASSED] 0xA783 (ALDERLAKE_S)
[11:32:17] [PASSED] 0xA788 (ALDERLAKE_S)
[11:32:17] [PASSED] 0xA789 (ALDERLAKE_S)
[11:32:17] [PASSED] 0xA78A (ALDERLAKE_S)
[11:32:17] [PASSED] 0xA78B (ALDERLAKE_S)
[11:32:17] [PASSED] 0x4905 (DG1)
[11:32:17] [PASSED] 0x4906 (DG1)
[11:32:17] [PASSED] 0x4907 (DG1)
[11:32:17] [PASSED] 0x4908 (DG1)
[11:32:17] [PASSED] 0x4909 (DG1)
[11:32:17] [PASSED] 0x56C0 (DG2)
[11:32:17] [PASSED] 0x56C2 (DG2)
[11:32:17] [PASSED] 0x56C1 (DG2)
[11:32:17] [PASSED] 0x7D51 (METEORLAKE)
[11:32:17] [PASSED] 0x7DD1 (METEORLAKE)
[11:32:17] [PASSED] 0x7D41 (METEORLAKE)
[11:32:17] [PASSED] 0x7D67 (METEORLAKE)
[11:32:17] [PASSED] 0xB640 (METEORLAKE)
[11:32:17] [PASSED] 0x56A0 (DG2)
[11:32:17] [PASSED] 0x56A1 (DG2)
[11:32:17] [PASSED] 0x56A2 (DG2)
[11:32:17] [PASSED] 0x56BE (DG2)
[11:32:17] [PASSED] 0x56BF (DG2)
[11:32:17] [PASSED] 0x5690 (DG2)
[11:32:17] [PASSED] 0x5691 (DG2)
[11:32:17] [PASSED] 0x5692 (DG2)
[11:32:17] [PASSED] 0x56A5 (DG2)
[11:32:17] [PASSED] 0x56A6 (DG2)
[11:32:17] [PASSED] 0x56B0 (DG2)
[11:32:17] [PASSED] 0x56B1 (DG2)
[11:32:17] [PASSED] 0x56BA (DG2)
[11:32:17] [PASSED] 0x56BB (DG2)
[11:32:17] [PASSED] 0x56BC (DG2)
[11:32:17] [PASSED] 0x56BD (DG2)
[11:32:17] [PASSED] 0x5693 (DG2)
[11:32:17] [PASSED] 0x5694 (DG2)
[11:32:17] [PASSED] 0x5695 (DG2)
[11:32:17] [PASSED] 0x56A3 (DG2)
[11:32:17] [PASSED] 0x56A4 (DG2)
[11:32:17] [PASSED] 0x56B2 (DG2)
[11:32:17] [PASSED] 0x56B3 (DG2)
[11:32:17] [PASSED] 0x5696 (DG2)
[11:32:17] [PASSED] 0x5697 (DG2)
[11:32:17] [PASSED] 0xB69 (PVC)
[11:32:17] [PASSED] 0xB6E (PVC)
[11:32:17] [PASSED] 0xBD4 (PVC)
[11:32:17] [PASSED] 0xBD5 (PVC)
[11:32:17] [PASSED] 0xBD6 (PVC)
[11:32:17] [PASSED] 0xBD7 (PVC)
[11:32:17] [PASSED] 0xBD8 (PVC)
[11:32:17] [PASSED] 0xBD9 (PVC)
[11:32:17] [PASSED] 0xBDA (PVC)
[11:32:17] [PASSED] 0xBDB (PVC)
[11:32:17] [PASSED] 0xBE0 (PVC)
[11:32:17] [PASSED] 0xBE1 (PVC)
[11:32:17] [PASSED] 0xBE5 (PVC)
[11:32:17] [PASSED] 0x7D40 (METEORLAKE)
[11:32:17] [PASSED] 0x7D45 (METEORLAKE)
[11:32:17] [PASSED] 0x7D55 (METEORLAKE)
[11:32:17] [PASSED] 0x7D60 (METEORLAKE)
[11:32:17] [PASSED] 0x7DD5 (METEORLAKE)
[11:32:17] [PASSED] 0x6420 (LUNARLAKE)
[11:32:17] [PASSED] 0x64A0 (LUNARLAKE)
[11:32:17] [PASSED] 0x64B0 (LUNARLAKE)
[11:32:17] [PASSED] 0xE202 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE209 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE20B (BATTLEMAGE)
[11:32:17] [PASSED] 0xE20C (BATTLEMAGE)
[11:32:17] [PASSED] 0xE20D (BATTLEMAGE)
[11:32:17] [PASSED] 0xE210 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE211 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE212 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE216 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE220 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE221 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE222 (BATTLEMAGE)
[11:32:17] [PASSED] 0xE223 (BATTLEMAGE)
[11:32:17] [PASSED] 0xB080 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB081 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB082 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB083 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB084 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB085 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB086 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB087 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB08F (PANTHERLAKE)
[11:32:17] [PASSED] 0xB090 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:32:17] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:32:17] [PASSED] 0xFD80 (PANTHERLAKE)
[11:32:17] [PASSED] 0xFD81 (PANTHERLAKE)
[11:32:17] [PASSED] 0xD740 (NOVALAKE_S)
[11:32:17] [PASSED] 0xD741 (NOVALAKE_S)
[11:32:17] [PASSED] 0xD742 (NOVALAKE_S)
[11:32:17] [PASSED] 0xD743 (NOVALAKE_S)
[11:32:17] [PASSED] 0xD745 (NOVALAKE_S)
[11:32:17] [PASSED] 0xD74A (NOVALAKE_S)
[11:32:17] [PASSED] 0xD74B (NOVALAKE_S)
[11:32:17] [PASSED] 0x674C (CRESCENTISLAND)
[11:32:17] [PASSED] 0x674D (CRESCENTISLAND)
[11:32:17] [PASSED] 0x674E (CRESCENTISLAND)
[11:32:17] [PASSED] 0x674F (CRESCENTISLAND)
[11:32:17] [PASSED] 0x6750 (CRESCENTISLAND)
[11:32:17] [PASSED] 0xD750 (NOVALAKE_P)
[11:32:17] [PASSED] 0xD751 (NOVALAKE_P)
[11:32:17] [PASSED] 0xD752 (NOVALAKE_P)
[11:32:17] [PASSED] 0xD753 (NOVALAKE_P)
[11:32:17] [PASSED] 0xD754 (NOVALAKE_P)
[11:32:17] [PASSED] 0xD755 (NOVALAKE_P)
[11:32:17] [PASSED] 0xD756 (NOVALAKE_P)
[11:32:17] [PASSED] 0xD757 (NOVALAKE_P)
[11:32:17] [PASSED] 0xD75F (NOVALAKE_P)
[11:32:17] =============== [PASSED] check_platform_desc ===============
[11:32:17] ===================== [PASSED] xe_pci ======================
[11:32:17] ============= xe_rtp_tables_test (5 subtests) ==============
[11:32:17] ================== xe_rtp_table_gt_test ===================
[11:32:17] [PASSED] gt_was/14011060649
[11:32:17] [PASSED] gt_was/14011059788
[11:32:17] [PASSED] gt_was/14015795083
[11:32:17] [PASSED] gt_was/16021867713
[11:32:17] [PASSED] gt_was/14019449301
[11:32:17] [PASSED] gt_was/16028005424
[11:32:17] [PASSED] gt_was/14026578760
[11:32:17] [PASSED] gt_was/1409420604
[11:32:17] [PASSED] gt_was/1408615072
[11:32:17] [PASSED] gt_was/22010523718
[11:32:17] [PASSED] gt_was/14011006942
[11:32:17] [PASSED] gt_was/14014830051
[11:32:17] [PASSED] gt_was/18018781329
[11:32:17] [PASSED] gt_was/1509235366
[11:32:17] [PASSED] gt_was/18018781329
[11:32:17] [PASSED] gt_was/16016694945
[11:32:17] [PASSED] gt_was/14018575942
[11:32:17] [PASSED] gt_was/22016670082
[11:32:17] [PASSED] gt_was/22016670082
[11:32:17] [PASSED] gt_was/14017421178
[11:32:17] [PASSED] gt_was/16025250150
[11:32:17] [PASSED] gt_was/14021871409
[11:32:17] [PASSED] gt_was/16021865536
[11:32:17] [PASSED] gt_was/14021486841
[11:32:17] [PASSED] gt_was/14025160223
[11:32:17] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[11:32:17] [PASSED] gt_was/14025635424
[11:32:17] [PASSED] gt_was/16028005424
[11:32:17] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:32:17] ================== xe_rtp_table_gt_test ===================
[11:32:17] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[11:32:17] [PASSED] gt_tunings/Tuning: 32B Access Enable
[11:32:17] [PASSED] gt_tunings/Tuning: L3 cache
[11:32:17] [PASSED] gt_tunings/Tuning: L3 cache - media
[11:32:17] [PASSED] gt_tunings/Tuning: Compression Overfetch
[11:32:17] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[11:32:17] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[11:32:17] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[11:32:17] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[11:32:17] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[11:32:17] [PASSED] gt_tunings/Tuning: Stateless compression control
[11:32:17] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[11:32:17] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[11:32:17] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[11:32:17] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[11:32:17] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:32:17] ================== xe_rtp_table_oob_test ==================
[11:32:17] [PASSED] oob_was/1607983814
[11:32:17] [PASSED] oob_was/16010904313
[11:32:17] [PASSED] oob_was/18022495364
[11:32:17] [PASSED] oob_was/22012773006
[11:32:17] [PASSED] oob_was/14014475959
[11:32:17] [PASSED] oob_was/22011391025
[11:32:17] [PASSED] oob_was/22012727170
[11:32:17] [PASSED] oob_was/22012727685
[11:32:17] [PASSED] oob_was/22016596838
[11:32:17] [PASSED] oob_was/18020744125
[11:32:17] [PASSED] oob_was/1409600907
[11:32:17] [PASSED] oob_was/22014953428
[11:32:17] [PASSED] oob_was/16017236439
[11:32:17] [PASSED] oob_was/14019821291
[11:32:17] [PASSED] oob_was/14015076503
[11:32:17] [PASSED] oob_was/14018913170
[11:32:17] [PASSED] oob_was/14018094691
[11:32:17] [PASSED] oob_was/18024947630
[11:32:17] [PASSED] oob_was/16022287689
[11:32:17] [PASSED] oob_was/13011645652
[11:32:17] [PASSED] oob_was/14022293748
[11:32:17] [PASSED] oob_was/22019794406
[11:32:17] [PASSED] oob_was/22019338487
[11:32:17] [PASSED] oob_was/16023588340
[11:32:17] [PASSED] oob_was/14019789679
[11:32:17] [PASSED] oob_was/14022866841
[11:32:17] [PASSED] oob_was/16021333562
[11:32:17] [PASSED] oob_was/14016712196
[11:32:17] [PASSED] oob_was/14015568240
[11:32:17] [PASSED] oob_was/18013179988
[11:32:17] [PASSED] oob_was/1508761755
[11:32:17] [PASSED] oob_was/16023105232
[11:32:17] [PASSED] oob_was/16026508708
[11:32:17] [PASSED] oob_was/14020001231
[11:32:17] [PASSED] oob_was/16023683509
[11:32:17] [PASSED] oob_was/14025515070
[11:32:17] [PASSED] oob_was/15015404425_disable
[11:32:17] [PASSED] oob_was/16026007364
[11:32:17] [PASSED] oob_was/14020316580
[11:32:17] [PASSED] oob_was/14025883347
[11:32:17] [PASSED] oob_was/16029380221
[11:32:17] [PASSED] oob_was/22022079272
[11:32:17] [PASSED] oob_was/16029897822
[11:32:17] ============== [PASSED] xe_rtp_table_oob_test ==============
[11:32:17] ================ xe_rtp_table_dev_oob_test ================
[11:32:17] [PASSED] device_oob_was/22010954014
[11:32:17] [PASSED] device_oob_was/15015404425
[11:32:17] [PASSED] device_oob_was/22019338487_display
[11:32:17] [PASSED] device_oob_was/14022085890
[11:32:17] [PASSED] device_oob_was/14026539277
[11:32:17] [PASSED] device_oob_was/14026633728
[11:32:17] [PASSED] device_oob_was/14026746987
[11:32:17] [PASSED] device_oob_was/14026779378
[11:32:17] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[11:32:17] ========== xe_rtp_table_missing_upper_bound_test ==========
[11:32:17] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[11:32:17] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[11:32:17] [PASSED] register_whitelist/1806527549
[11:32:17] [PASSED] register_whitelist/allow_read_ctx_timestamp
[11:32:17] [PASSED] register_whitelist/allow_read_queue_timestamp
[11:32:17] [PASSED] register_whitelist/16014440446
[11:32:17] [PASSED] register_whitelist/16017236439
[11:32:17] [PASSED] register_whitelist/16020183090
[11:32:17] [PASSED] register_whitelist/14024997852
[11:32:17] [PASSED] register_whitelist/14024997852
[11:32:17] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[11:32:17] =============== [PASSED] xe_rtp_tables_test ================
[11:32:17] =================== xe_rtp (3 subtests) ====================
[11:32:17] =================== xe_rtp_rules_tests ====================
[11:32:17] [PASSED] no
[11:32:17] [PASSED] yes
[11:32:17] [PASSED] no-and-no
[11:32:17] [PASSED] no-and-yes
[11:32:17] [PASSED] yes-and-no
[11:32:17] [PASSED] yes-and-yes
[11:32:17] [PASSED] no-or-no
[11:32:17] [PASSED] no-or-yes
[11:32:17] [PASSED] yes-or-no
[11:32:17] [PASSED] yes-or-yes
[11:32:17] [PASSED] no-yes-or-yes-no
[11:32:17] [PASSED] no-yes-or-yes-yes
[11:32:17] [PASSED] yes-yes-or-no-yes
[11:32:17] [PASSED] yes-yes-or-yes-yes
[11:32:17] [PASSED] no-no-or-yes-or-no
[11:32:17] [PASSED] or
[11:32:17] [PASSED] or-yes
[11:32:17] [PASSED] or-no
[11:32:17] [PASSED] yes-or
[11:32:17] [PASSED] no-or
[11:32:17] [PASSED] no-or-or-yes
[11:32:17] [PASSED] yes-or-or-no
[11:32:17] [PASSED] no-or-or-no
[11:32:17] [PASSED] missing-context-engine-class
[11:32:17] [PASSED] missing-context-engine-class-or-yes
[11:32:17] [PASSED] missing-context-engine-class-or-or-yes
[11:32:17] =============== [PASSED] xe_rtp_rules_tests ================
[11:32:17] =============== xe_rtp_process_to_sr_tests ================
[11:32:17] [PASSED] coalesce-same-reg
[11:32:17] [PASSED] coalesce-same-reg-literal-and-func
[11:32:17] [PASSED] no-match-no-add
[11:32:17] [PASSED] two-regs-two-entries
[11:32:17] [PASSED] clr-one-set-other
[11:32:17] [PASSED] set-field
[11:32:17] [PASSED] conflict-duplicate
[11:32:17] [PASSED] conflict-not-disjoint
[11:32:17] [PASSED] conflict-not-disjoint-literal-and-func
[11:32:17] [PASSED] conflict-reg-type
[11:32:17] [PASSED] bad-mcr-reg-forced-to-regular
[11:32:17] [PASSED] bad-regular-reg-forced-to-mcr
[11:32:17] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:32:17] ================== xe_rtp_process_tests ===================
[11:32:17] [PASSED] active1
[11:32:17] [PASSED] active2
[11:32:17] [PASSED] active-inactive
[11:32:17] [PASSED] inactive-active
[11:32:17] [PASSED] inactive-active-inactive
[11:32:17] [PASSED] inactive-inactive-inactive
[11:32:17] ============== [PASSED] xe_rtp_process_tests ===============
[11:32:17] ===================== [PASSED] xe_rtp ======================
[11:32:17] ==================== xe_wa (1 subtest) =====================
[11:32:17] ======================== xe_wa_gt =========================
[11:32:17] [PASSED] TIGERLAKE B0
[11:32:17] [PASSED] DG1 A0
[11:32:17] [PASSED] DG1 B0
[11:32:17] [PASSED] ALDERLAKE_S A0
[11:32:17] [PASSED] ALDERLAKE_S B0
[11:32:17] [PASSED] ALDERLAKE_S C0
[11:32:17] [PASSED] ALDERLAKE_S D0
[11:32:17] [PASSED] ALDERLAKE_P A0
[11:32:17] [PASSED] ALDERLAKE_P B0
[11:32:17] [PASSED] ALDERLAKE_P C0
[11:32:17] [PASSED] ALDERLAKE_S RPLS D0
[11:32:17] [PASSED] ALDERLAKE_P RPLU E0
[11:32:17] [PASSED] DG2 G10 C0
[11:32:17] [PASSED] DG2 G11 B1
[11:32:17] [PASSED] DG2 G12 A1
[11:32:17] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:32:17] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:32:17] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:32:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:32:17] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:32:17] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:32:17] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:32:17] ==================== [PASSED] xe_wa_gt =====================
[11:32:17] ====================== [PASSED] xe_wa ======================
[11:32:17] ============================================================
[11:32:17] Testing complete. Ran 741 tests: passed: 723, skipped: 18
[11:32:17] Elapsed time: 36.767s total, 4.374s configuring, 31.724s building, 0.645s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:32:18] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:32:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:32:44] Starting KUnit Kernel (1/1)...
[11:32:44] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:32:44] ============ drm_test_pick_cmdline (2 subtests) ============
[11:32:44] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:32:44] =============== drm_test_pick_cmdline_named ===============
[11:32:44] [PASSED] NTSC
[11:32:44] [PASSED] NTSC-J
[11:32:44] [PASSED] PAL
[11:32:44] [PASSED] PAL-M
[11:32:44] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:32:44] ============== [PASSED] drm_test_pick_cmdline ==============
[11:32:44] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:32:44] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:32:44] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:32:44] =========== drm_validate_clone_mode (2 subtests) ===========
[11:32:44] ============== drm_test_check_in_clone_mode ===============
[11:32:44] [PASSED] in_clone_mode
[11:32:44] [PASSED] not_in_clone_mode
[11:32:44] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:32:44] =============== drm_test_check_valid_clones ===============
[11:32:44] [PASSED] not_in_clone_mode
[11:32:44] [PASSED] valid_clone
[11:32:44] [PASSED] invalid_clone
[11:32:44] =========== [PASSED] drm_test_check_valid_clones ===========
[11:32:44] ============= [PASSED] drm_validate_clone_mode =============
[11:32:44] ============= drm_validate_modeset (1 subtest) =============
[11:32:44] [PASSED] drm_test_check_connector_changed_modeset
[11:32:44] ============== [PASSED] drm_validate_modeset ===============
[11:32:44] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:32:44] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:32:44] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:32:44] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:32:44] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[11:32:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:32:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:32:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:32:44] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[11:32:44] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:32:44] ============== drm_bridge_alloc (2 subtests) ===============
[11:32:44] [PASSED] drm_test_drm_bridge_alloc_basic
[11:32:44] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:32:44] ================ [PASSED] drm_bridge_alloc =================
[11:32:44] ============= drm_bridge_bus_fmt (5 subtests) ==============
[11:32:44] [PASSED] drm_test_bridge_rgb_yuv_rgb
[11:32:44] [PASSED] drm_test_bridge_must_convert_to_yuv444
[11:32:44] [PASSED] drm_test_bridge_hdmi_auto_rgb
[11:32:44] [PASSED] drm_test_bridge_auto_first
[11:32:44] [PASSED] drm_test_bridge_rgb_yuv_no_path
[11:32:44] =============== [PASSED] drm_bridge_bus_fmt ================
[11:32:44] ============= drm_cmdline_parser (40 subtests) =============
[11:32:44] [PASSED] drm_test_cmdline_force_d_only
[11:32:44] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:32:44] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:32:44] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:32:44] [PASSED] drm_test_cmdline_force_e_only
[11:32:44] [PASSED] drm_test_cmdline_res
[11:32:44] [PASSED] drm_test_cmdline_res_vesa
[11:32:44] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:32:44] [PASSED] drm_test_cmdline_res_rblank
[11:32:44] [PASSED] drm_test_cmdline_res_bpp
[11:32:44] [PASSED] drm_test_cmdline_res_refresh
[11:32:44] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:32:44] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:32:44] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:32:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:32:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:32:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:32:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:32:44] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:32:44] [PASSED] drm_test_cmdline_res_margins_force_on
[11:32:44] [PASSED] drm_test_cmdline_res_vesa_margins
[11:32:44] [PASSED] drm_test_cmdline_name
[11:32:44] [PASSED] drm_test_cmdline_name_bpp
[11:32:44] [PASSED] drm_test_cmdline_name_option
[11:32:44] [PASSED] drm_test_cmdline_name_bpp_option
[11:32:44] [PASSED] drm_test_cmdline_rotate_0
[11:32:44] [PASSED] drm_test_cmdline_rotate_90
[11:32:44] [PASSED] drm_test_cmdline_rotate_180
[11:32:44] [PASSED] drm_test_cmdline_rotate_270
[11:32:44] [PASSED] drm_test_cmdline_hmirror
[11:32:44] [PASSED] drm_test_cmdline_vmirror
[11:32:44] [PASSED] drm_test_cmdline_margin_options
[11:32:44] [PASSED] drm_test_cmdline_multiple_options
[11:32:44] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:32:44] [PASSED] drm_test_cmdline_extra_and_option
[11:32:44] [PASSED] drm_test_cmdline_freestanding_options
[11:32:44] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:32:44] [PASSED] drm_test_cmdline_panel_orientation
[11:32:44] ================ drm_test_cmdline_invalid =================
[11:32:44] [PASSED] margin_only
[11:32:44] [PASSED] interlace_only
[11:32:44] [PASSED] res_missing_x
[11:32:44] [PASSED] res_missing_y
[11:32:44] [PASSED] res_bad_y
[11:32:44] [PASSED] res_missing_y_bpp
[11:32:44] [PASSED] res_bad_bpp
[11:32:44] [PASSED] res_bad_refresh
[11:32:44] [PASSED] res_bpp_refresh_force_on_off
[11:32:44] [PASSED] res_invalid_mode
[11:32:44] [PASSED] res_bpp_wrong_place_mode
[11:32:44] [PASSED] name_bpp_refresh
[11:32:44] [PASSED] name_refresh
[11:32:44] [PASSED] name_refresh_wrong_mode
[11:32:44] [PASSED] name_refresh_invalid_mode
[11:32:44] [PASSED] rotate_multiple
[11:32:44] [PASSED] rotate_invalid_val
[11:32:44] [PASSED] rotate_truncated
[11:32:44] [PASSED] invalid_option
[11:32:44] [PASSED] invalid_tv_option
[11:32:44] [PASSED] truncated_tv_option
[11:32:44] ============ [PASSED] drm_test_cmdline_invalid =============
[11:32:44] =============== drm_test_cmdline_tv_options ===============
[11:32:44] [PASSED] NTSC
[11:32:44] [PASSED] NTSC_443
[11:32:44] [PASSED] NTSC_J
[11:32:44] [PASSED] PAL
[11:32:44] [PASSED] PAL_M
[11:32:44] [PASSED] PAL_N
[11:32:44] [PASSED] SECAM
[11:32:44] [PASSED] MONO_525
[11:32:44] [PASSED] MONO_625
[11:32:44] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:32:44] =============== [PASSED] drm_cmdline_parser ================
[11:32:44] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:32:44] [PASSED] drm_test_connector_hdmi_init_valid
[11:32:44] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:32:44] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:32:44] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:32:44] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:32:44] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:32:44] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:32:44] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:32:44] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:32:44] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:32:44] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:32:44] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:32:44] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:32:44] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:32:44] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:32:44] [PASSED] drm_test_connector_hdmi_init_null_product
[11:32:44] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:32:44] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:32:44] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:32:44] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:32:44] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:32:44] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:32:44] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:32:44] ========= drm_test_connector_hdmi_init_type_valid =========
[11:32:44] [PASSED] HDMI-A
[11:32:44] [PASSED] HDMI-B
[11:32:44] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:32:44] ======== drm_test_connector_hdmi_init_type_invalid ========
[11:32:44] [PASSED] Unknown
[11:32:44] [PASSED] VGA
[11:32:44] [PASSED] DVI-I
[11:32:44] [PASSED] DVI-D
[11:32:44] [PASSED] DVI-A
[11:32:44] [PASSED] Composite
[11:32:44] [PASSED] SVIDEO
[11:32:44] [PASSED] LVDS
[11:32:44] [PASSED] Component
[11:32:44] [PASSED] DIN
[11:32:44] [PASSED] DP
[11:32:44] [PASSED] TV
[11:32:44] [PASSED] eDP
[11:32:44] [PASSED] Virtual
[11:32:44] [PASSED] DSI
[11:32:44] [PASSED] DPI
[11:32:44] [PASSED] Writeback
[11:32:44] [PASSED] SPI
[11:32:44] [PASSED] USB
[11:32:44] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:32:44] ============ [PASSED] drmm_connector_hdmi_init =============
[11:32:44] ============= drmm_connector_init (3 subtests) =============
[11:32:44] [PASSED] drm_test_drmm_connector_init
[11:32:44] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:32:44] ========= drm_test_drmm_connector_init_type_valid =========
[11:32:44] [PASSED] Unknown
[11:32:44] [PASSED] VGA
[11:32:44] [PASSED] DVI-I
[11:32:44] [PASSED] DVI-D
[11:32:44] [PASSED] DVI-A
[11:32:44] [PASSED] Composite
[11:32:44] [PASSED] SVIDEO
[11:32:44] [PASSED] LVDS
[11:32:44] [PASSED] Component
[11:32:44] [PASSED] DIN
[11:32:44] [PASSED] DP
[11:32:44] [PASSED] HDMI-A
[11:32:44] [PASSED] HDMI-B
[11:32:44] [PASSED] TV
[11:32:44] [PASSED] eDP
[11:32:44] [PASSED] Virtual
[11:32:44] [PASSED] DSI
[11:32:44] [PASSED] DPI
[11:32:44] [PASSED] Writeback
[11:32:44] [PASSED] SPI
[11:32:44] [PASSED] USB
[11:32:44] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:32:44] =============== [PASSED] drmm_connector_init ===============
[11:32:44] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_init
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:32:44] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[11:32:44] [PASSED] Unknown
[11:32:44] [PASSED] VGA
[11:32:44] [PASSED] DVI-I
[11:32:44] [PASSED] DVI-D
[11:32:44] [PASSED] DVI-A
[11:32:44] [PASSED] Composite
[11:32:44] [PASSED] SVIDEO
[11:32:44] [PASSED] LVDS
[11:32:44] [PASSED] Component
[11:32:44] [PASSED] DIN
[11:32:44] [PASSED] DP
[11:32:44] [PASSED] HDMI-A
[11:32:44] [PASSED] HDMI-B
[11:32:44] [PASSED] TV
[11:32:44] [PASSED] eDP
[11:32:44] [PASSED] Virtual
[11:32:44] [PASSED] DSI
[11:32:44] [PASSED] DPI
[11:32:44] [PASSED] Writeback
[11:32:44] [PASSED] SPI
[11:32:44] [PASSED] USB
[11:32:44] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:32:44] ======== drm_test_drm_connector_dynamic_init_name =========
[11:32:44] [PASSED] Unknown
[11:32:44] [PASSED] VGA
[11:32:44] [PASSED] DVI-I
[11:32:44] [PASSED] DVI-D
[11:32:44] [PASSED] DVI-A
[11:32:44] [PASSED] Composite
[11:32:44] [PASSED] SVIDEO
[11:32:44] [PASSED] LVDS
[11:32:44] [PASSED] Component
[11:32:44] [PASSED] DIN
[11:32:44] [PASSED] DP
[11:32:44] [PASSED] HDMI-A
[11:32:44] [PASSED] HDMI-B
[11:32:44] [PASSED] TV
[11:32:44] [PASSED] eDP
[11:32:44] [PASSED] Virtual
[11:32:44] [PASSED] DSI
[11:32:44] [PASSED] DPI
[11:32:44] [PASSED] Writeback
[11:32:44] [PASSED] SPI
[11:32:44] [PASSED] USB
[11:32:44] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:32:44] =========== [PASSED] drm_connector_dynamic_init ============
[11:32:44] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:32:44] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:32:44] ======= drm_connector_dynamic_register (7 subtests) ========
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:32:44] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:32:44] ========= [PASSED] drm_connector_dynamic_register ==========
[11:32:44] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:32:44] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:32:44] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:32:44] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:32:44] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:32:44] ========== drm_test_get_tv_mode_from_name_valid ===========
[11:32:44] [PASSED] NTSC
[11:32:44] [PASSED] NTSC-443
[11:32:44] [PASSED] NTSC-J
[11:32:44] [PASSED] PAL
[11:32:44] [PASSED] PAL-M
[11:32:44] [PASSED] PAL-N
[11:32:44] [PASSED] SECAM
[11:32:44] [PASSED] Mono
[11:32:44] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:32:44] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:32:44] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:32:44] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:32:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:32:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:32:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:32:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:32:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:32:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:32:44] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[11:32:44] [PASSED] VIC 96
[11:32:44] [PASSED] VIC 97
[11:32:44] [PASSED] VIC 101
[11:32:44] [PASSED] VIC 102
[11:32:44] [PASSED] VIC 106
[11:32:44] [PASSED] VIC 107
[11:32:44] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:32:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:32:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:32:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:32:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:32:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:32:44] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:32:44] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:32:44] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[11:32:44] [PASSED] Automatic
[11:32:44] [PASSED] Full
[11:32:44] [PASSED] Limited 16:235
[11:32:44] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:32:44] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:32:44] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:32:44] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:32:44] === drm_test_drm_hdmi_connector_get_output_format_name ====
[11:32:44] [PASSED] RGB
[11:32:44] [PASSED] YUV 4:2:0
[11:32:44] [PASSED] YUV 4:2:2
[11:32:44] [PASSED] YUV 4:4:4
[11:32:44] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:32:44] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:32:44] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:32:44] ============= drm_damage_helper (21 subtests) ==============
[11:32:44] [PASSED] drm_test_damage_iter_no_damage
[11:32:44] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:32:44] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:32:44] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:32:44] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:32:44] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:32:44] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:32:44] [PASSED] drm_test_damage_iter_simple_damage
[11:32:44] [PASSED] drm_test_damage_iter_single_damage
[11:32:44] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:32:44] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:32:44] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:32:44] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:32:44] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:32:44] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:32:44] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:32:44] [PASSED] drm_test_damage_iter_damage
[11:32:44] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:32:44] [PASSED] drm_test_damage_iter_damage_one_outside
[11:32:44] [PASSED] drm_test_damage_iter_damage_src_moved
[11:32:44] [PASSED] drm_test_damage_iter_damage_not_visible
[11:32:44] ================ [PASSED] drm_damage_helper ================
[11:32:44] ============== drm_dp_mst_helper (3 subtests) ==============
[11:32:44] ============== drm_test_dp_mst_calc_pbn_mode ==============
[11:32:44] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:32:44] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:32:44] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:32:44] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:32:44] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:32:44] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:32:44] ============== drm_test_dp_mst_calc_pbn_div ===============
[11:32:44] [PASSED] Link rate 2000000 lane count 4
[11:32:44] [PASSED] Link rate 2000000 lane count 2
[11:32:44] [PASSED] Link rate 2000000 lane count 1
[11:32:44] [PASSED] Link rate 1350000 lane count 4
[11:32:44] [PASSED] Link rate 1350000 lane count 2
[11:32:44] [PASSED] Link rate 1350000 lane count 1
[11:32:44] [PASSED] Link rate 1000000 lane count 4
[11:32:44] [PASSED] Link rate 1000000 lane count 2
[11:32:44] [PASSED] Link rate 1000000 lane count 1
[11:32:44] [PASSED] Link rate 810000 lane count 4
[11:32:44] [PASSED] Link rate 810000 lane count 2
[11:32:44] [PASSED] Link rate 810000 lane count 1
[11:32:44] [PASSED] Link rate 540000 lane count 4
[11:32:44] [PASSED] Link rate 540000 lane count 2
[11:32:44] [PASSED] Link rate 540000 lane count 1
[11:32:44] [PASSED] Link rate 270000 lane count 4
[11:32:44] [PASSED] Link rate 270000 lane count 2
[11:32:44] [PASSED] Link rate 270000 lane count 1
[11:32:44] [PASSED] Link rate 162000 lane count 4
[11:32:44] [PASSED] Link rate 162000 lane count 2
[11:32:44] [PASSED] Link rate 162000 lane count 1
[11:32:44] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:32:44] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[11:32:44] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:32:44] [PASSED] DP_POWER_UP_PHY with port number
[11:32:44] [PASSED] DP_POWER_DOWN_PHY with port number
[11:32:44] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:32:44] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:32:44] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:32:44] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:32:44] [PASSED] DP_QUERY_PAYLOAD with port number
[11:32:44] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:32:44] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:32:44] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:32:44] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:32:44] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:32:44] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:32:44] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:32:44] [PASSED] DP_REMOTE_I2C_READ with port number
[11:32:44] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:32:44] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:32:44] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:32:44] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:32:44] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:32:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:32:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:32:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:32:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:32:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:32:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:32:44] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:32:44] ================ [PASSED] drm_dp_mst_helper ================
[11:32:44] ================== drm_exec (7 subtests) ===================
[11:32:44] [PASSED] sanitycheck
[11:32:44] [PASSED] test_lock
[11:32:44] [PASSED] test_lock_unlock
[11:32:44] [PASSED] test_duplicates
[11:32:44] [PASSED] test_prepare
[11:32:44] [PASSED] test_prepare_array
[11:32:44] [PASSED] test_multiple_loops
[11:32:44] ==================== [PASSED] drm_exec =====================
[11:32:44] =========== drm_format_helper_test (17 subtests) ===========
[11:32:44] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:32:44] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:32:44] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:32:44] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:32:44] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:32:44] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:32:44] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:32:44] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:32:44] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:32:44] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:32:44] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:32:44] ============== drm_test_fb_xrgb8888_to_mono ===============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:32:44] ==================== drm_test_fb_swab =====================
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ================ [PASSED] drm_test_fb_swab =================
[11:32:44] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:32:44] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[11:32:44] [PASSED] single_pixel_source_buffer
[11:32:44] [PASSED] single_pixel_clip_rectangle
[11:32:44] [PASSED] well_known_colors
[11:32:44] [PASSED] destination_pitch
[11:32:44] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:32:44] ================= drm_test_fb_clip_offset =================
[11:32:44] [PASSED] pass through
[11:32:44] [PASSED] horizontal offset
[11:32:44] [PASSED] vertical offset
[11:32:44] [PASSED] horizontal and vertical offset
[11:32:44] [PASSED] horizontal offset (custom pitch)
[11:32:44] [PASSED] vertical offset (custom pitch)
[11:32:44] [PASSED] horizontal and vertical offset (custom pitch)
[11:32:44] ============= [PASSED] drm_test_fb_clip_offset =============
[11:32:44] =================== drm_test_fb_memcpy ====================
[11:32:44] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:32:44] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:32:44] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:32:44] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:32:44] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:32:44] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:32:44] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:32:44] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:32:44] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:32:44] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:32:44] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:32:44] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:32:44] =============== [PASSED] drm_test_fb_memcpy ================
[11:32:44] ============= [PASSED] drm_format_helper_test ==============
[11:32:44] ================= drm_format (18 subtests) =================
[11:32:44] [PASSED] drm_test_format_block_width_invalid
[11:32:44] [PASSED] drm_test_format_block_width_one_plane
[11:32:44] [PASSED] drm_test_format_block_width_two_plane
[11:32:44] [PASSED] drm_test_format_block_width_three_plane
[11:32:44] [PASSED] drm_test_format_block_width_tiled
[11:32:44] [PASSED] drm_test_format_block_height_invalid
[11:32:44] [PASSED] drm_test_format_block_height_one_plane
[11:32:44] [PASSED] drm_test_format_block_height_two_plane
[11:32:44] [PASSED] drm_test_format_block_height_three_plane
[11:32:44] [PASSED] drm_test_format_block_height_tiled
[11:32:44] [PASSED] drm_test_format_min_pitch_invalid
[11:32:44] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:32:44] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:32:44] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:32:44] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:32:44] [PASSED] drm_test_format_min_pitch_two_plane
[11:32:44] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:32:44] [PASSED] drm_test_format_min_pitch_tiled
[11:32:44] =================== [PASSED] drm_format ====================
[11:32:44] ============== drm_framebuffer (10 subtests) ===============
[11:32:44] ========== drm_test_framebuffer_check_src_coords ==========
[11:32:44] [PASSED] Success: source fits into fb
[11:32:44] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:32:44] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:32:44] [PASSED] Fail: overflowing fb with source width
[11:32:44] [PASSED] Fail: overflowing fb with source height
[11:32:44] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:32:44] [PASSED] drm_test_framebuffer_cleanup
[11:32:44] =============== drm_test_framebuffer_create ===============
[11:32:44] [PASSED] ABGR8888 normal sizes
[11:32:44] [PASSED] ABGR8888 max sizes
[11:32:44] [PASSED] ABGR8888 pitch greater than min required
[11:32:44] [PASSED] ABGR8888 pitch less than min required
[11:32:44] [PASSED] ABGR8888 Invalid width
[11:32:44] [PASSED] ABGR8888 Invalid buffer handle
[11:32:44] [PASSED] No pixel format
[11:32:44] [PASSED] ABGR8888 Width 0
[11:32:44] [PASSED] ABGR8888 Height 0
[11:32:44] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:32:44] [PASSED] ABGR8888 Large buffer offset
[11:32:44] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:32:44] [PASSED] ABGR8888 Invalid flag
[11:32:44] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:32:44] [PASSED] ABGR8888 Valid buffer modifier
[11:32:44] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:32:44] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:32:44] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:32:44] [PASSED] NV12 Normal sizes
[11:32:44] [PASSED] NV12 Max sizes
[11:32:44] [PASSED] NV12 Invalid pitch
[11:32:44] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:32:44] [PASSED] NV12 different modifier per-plane
[11:32:44] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:32:44] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:32:44] [PASSED] NV12 Modifier for inexistent plane
[11:32:44] [PASSED] NV12 Handle for inexistent plane
[11:32:44] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:32:44] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:32:44] [PASSED] YVU420 Normal sizes
[11:32:44] [PASSED] YVU420 Max sizes
[11:32:44] [PASSED] YVU420 Invalid pitch
[11:32:44] [PASSED] YVU420 Different pitches
[11:32:44] [PASSED] YVU420 Different buffer offsets/pitches
[11:32:44] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:32:44] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:32:44] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:32:44] [PASSED] YVU420 Valid modifier
[11:32:44] [PASSED] YVU420 Different modifiers per plane
[11:32:44] [PASSED] YVU420 Modifier for inexistent plane
[11:32:44] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:32:44] [PASSED] X0L2 Normal sizes
[11:32:44] [PASSED] X0L2 Max sizes
[11:32:44] [PASSED] X0L2 Invalid pitch
[11:32:44] [PASSED] X0L2 Pitch greater than minimum required
[11:32:44] [PASSED] X0L2 Handle for inexistent plane
[11:32:44] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:32:44] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:32:44] [PASSED] X0L2 Valid modifier
[11:32:44] [PASSED] X0L2 Modifier for inexistent plane
[11:32:44] =========== [PASSED] drm_test_framebuffer_create ===========
[11:32:44] [PASSED] drm_test_framebuffer_free
[11:32:44] [PASSED] drm_test_framebuffer_init
[11:32:44] [PASSED] drm_test_framebuffer_init_bad_format
[11:32:44] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:32:44] [PASSED] drm_test_framebuffer_lookup
[11:32:44] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:32:44] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:32:44] ================= [PASSED] drm_framebuffer =================
[11:32:44] ================ drm_gem_shmem (8 subtests) ================
[11:32:44] [PASSED] drm_gem_shmem_test_obj_create
[11:32:44] [PASSED] drm_gem_shmem_test_obj_create_private
[11:32:44] [PASSED] drm_gem_shmem_test_pin_pages
[11:32:44] [PASSED] drm_gem_shmem_test_vmap
[11:32:44] [PASSED] drm_gem_shmem_test_get_sg_table
[11:32:44] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:32:44] [PASSED] drm_gem_shmem_test_madvise
[11:32:44] [PASSED] drm_gem_shmem_test_purge
[11:32:44] ================== [PASSED] drm_gem_shmem ==================
[11:32:44] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:32:44] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[11:32:44] [PASSED] Automatic
[11:32:44] [PASSED] Full
[11:32:44] [PASSED] Limited 16:235
[11:32:44] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:32:44] [PASSED] drm_test_check_disable_connector
[11:32:44] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:32:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:32:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:32:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:32:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:32:44] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:32:44] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:32:44] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:32:44] [PASSED] drm_test_check_output_bpc_dvi
[11:32:44] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:32:44] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:32:44] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:32:44] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:32:44] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:32:44] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:32:44] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:32:44] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:32:44] ============ drm_test_check_hdmi_color_format =============
[11:32:44] [PASSED] AUTO -> RGB
[11:32:44] [PASSED] YCBCR422 -> YUV422
[11:32:44] [PASSED] YCBCR420 -> YUV420
[11:32:44] [PASSED] YCBCR444 -> YUV444
[11:32:44] [PASSED] RGB -> RGB
[11:32:44] ======== [PASSED] drm_test_check_hdmi_color_format =========
[11:32:44] ======== drm_test_check_hdmi_color_format_420_only ========
[11:32:44] [PASSED] RGB should fail
[11:32:44] [PASSED] YUV444 should fail
[11:32:44] [PASSED] YUV422 should fail
[11:32:44] [PASSED] YUV420 should work
[11:32:44] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[11:32:44] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:32:44] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:32:44] [PASSED] drm_test_check_broadcast_rgb_value
[11:32:44] [PASSED] drm_test_check_bpc_8_value
[11:32:44] [PASSED] drm_test_check_bpc_10_value
[11:32:44] [PASSED] drm_test_check_bpc_12_value
[11:32:44] [PASSED] drm_test_check_format_value
[11:32:44] [PASSED] drm_test_check_tmds_char_value
[11:32:44] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:32:44] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[11:32:44] [PASSED] drm_test_check_mode_valid
[11:32:44] [PASSED] drm_test_check_mode_valid_reject
[11:32:44] [PASSED] drm_test_check_mode_valid_reject_rate
[11:32:44] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:32:44] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[11:32:44] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[11:32:44] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[11:32:44] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:32:44] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:32:44] [PASSED] drm_test_check_infoframes
[11:32:44] [PASSED] drm_test_check_reject_avi_infoframe
[11:32:44] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:32:44] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:32:44] [PASSED] drm_test_check_reject_audio_infoframe
[11:32:44] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:32:44] ================= drm_managed (2 subtests) =================
[11:32:44] [PASSED] drm_test_managed_release_action
[11:32:44] [PASSED] drm_test_managed_run_action
[11:32:44] =================== [PASSED] drm_managed ===================
[11:32:44] =================== drm_mm (6 subtests) ====================
[11:32:44] [PASSED] drm_test_mm_init
[11:32:44] [PASSED] drm_test_mm_debug
[11:32:44] [PASSED] drm_test_mm_align32
[11:32:44] [PASSED] drm_test_mm_align64
[11:32:44] [PASSED] drm_test_mm_lowest
[11:32:44] [PASSED] drm_test_mm_highest
[11:32:44] ===================== [PASSED] drm_mm ======================
[11:32:44] ============= drm_modes_analog_tv (5 subtests) =============
[11:32:44] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:32:44] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:32:44] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:32:44] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:32:44] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:32:44] =============== [PASSED] drm_modes_analog_tv ===============
[11:32:44] ============== drm_plane_helper (2 subtests) ===============
[11:32:44] =============== drm_test_check_plane_state ================
[11:32:44] [PASSED] clipping_simple
[11:32:44] [PASSED] clipping_rotate_reflect
[11:32:44] [PASSED] positioning_simple
[11:32:44] [PASSED] upscaling
[11:32:44] [PASSED] downscaling
[11:32:44] [PASSED] rounding1
[11:32:44] [PASSED] rounding2
[11:32:44] [PASSED] rounding3
[11:32:44] [PASSED] rounding4
[11:32:44] =========== [PASSED] drm_test_check_plane_state ============
[11:32:44] =========== drm_test_check_invalid_plane_state ============
[11:32:44] [PASSED] positioning_invalid
[11:32:44] [PASSED] upscaling_invalid
[11:32:44] [PASSED] downscaling_invalid
[11:32:44] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:32:44] ================ [PASSED] drm_plane_helper =================
[11:32:44] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:32:44] ====== drm_test_connector_helper_tv_get_modes_check =======
[11:32:44] [PASSED] None
[11:32:44] [PASSED] PAL
[11:32:44] [PASSED] NTSC
[11:32:44] [PASSED] Both, NTSC Default
[11:32:44] [PASSED] Both, PAL Default
[11:32:44] [PASSED] Both, NTSC Default, with PAL on command-line
[11:32:44] [PASSED] Both, PAL Default, with NTSC on command-line
[11:32:44] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:32:44] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:32:44] ================== drm_rect (9 subtests) ===================
[11:32:44] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:32:44] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:32:44] [PASSED] drm_test_rect_clip_scaled_clipped
[11:32:44] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:32:44] ================= drm_test_rect_intersect =================
[11:32:44] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:32:44] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:32:44] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:32:44] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:32:44] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:32:44] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:32:44] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:32:44] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:32:44] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:32:44] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:32:44] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:32:44] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:32:44] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:32:44] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:32:44] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:32:44] ============= [PASSED] drm_test_rect_intersect =============
[11:32:44] ================ drm_test_rect_calc_hscale ================
[11:32:44] [PASSED] normal use
[11:32:44] [PASSED] out of max range
[11:32:44] [PASSED] out of min range
[11:32:44] [PASSED] zero dst
[11:32:44] [PASSED] negative src
[11:32:44] [PASSED] negative dst
[11:32:44] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:32:44] ================ drm_test_rect_calc_vscale ================
[11:32:44] [PASSED] normal use
[11:32:44] [PASSED] out of max range
[11:32:44] [PASSED] out of min range
[11:32:44] [PASSED] zero dst
[11:32:44] [PASSED] negative src
[11:32:44] [PASSED] negative dst
[11:32:44] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:32:44] ================== drm_test_rect_rotate ===================
[11:32:44] [PASSED] reflect-x
[11:32:44] [PASSED] reflect-y
[11:32:44] [PASSED] rotate-0
[11:32:44] [PASSED] rotate-90
[11:32:44] [PASSED] rotate-180
[11:32:44] [PASSED] rotate-270
[11:32:44] ============== [PASSED] drm_test_rect_rotate ===============
[11:32:44] ================ drm_test_rect_rotate_inv =================
[11:32:44] [PASSED] reflect-x
[11:32:44] [PASSED] reflect-y
[11:32:44] [PASSED] rotate-0
[11:32:44] [PASSED] rotate-90
[11:32:44] [PASSED] rotate-180
[11:32:44] [PASSED] rotate-270
[11:32:44] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:32:44] ==================== [PASSED] drm_rect =====================
[11:32:44] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:32:44] ============ drm_test_sysfb_build_fourcc_list =============
[11:32:44] [PASSED] no native formats
[11:32:44] [PASSED] XRGB8888 as native format
[11:32:44] [PASSED] remove duplicates
[11:32:44] [PASSED] convert alpha formats
[11:32:44] [PASSED] random formats
[11:32:44] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:32:44] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:32:44] ================== drm_fixp (2 subtests) ===================
[11:32:44] [PASSED] drm_test_int2fixp
[11:32:44] [PASSED] drm_test_sm2fixp
[11:32:44] ==================== [PASSED] drm_fixp =====================
[11:32:44] ============================================================
[11:32:44] Testing complete. Ran 639 tests: passed: 639
[11:32:44] Elapsed time: 26.483s total, 1.829s configuring, 24.490s building, 0.134s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:32:44] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:32:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:32:56] Starting KUnit Kernel (1/1)...
[11:32:56] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:32:56] ================= ttm_device (5 subtests) ==================
[11:32:56] [PASSED] ttm_device_init_basic
[11:32:56] [PASSED] ttm_device_init_multiple
[11:32:56] [PASSED] ttm_device_fini_basic
[11:32:56] [PASSED] ttm_device_init_no_vma_man
[11:32:56] ================== ttm_device_init_pools ==================
[11:32:56] [PASSED] No DMA allocations, no DMA32 required
[11:32:56] [PASSED] DMA allocations, DMA32 required
[11:32:56] [PASSED] No DMA allocations, DMA32 required
[11:32:56] [PASSED] DMA allocations, no DMA32 required
[11:32:56] ============== [PASSED] ttm_device_init_pools ==============
[11:32:56] =================== [PASSED] ttm_device ====================
[11:32:56] ================== ttm_pool (8 subtests) ===================
[11:32:56] ================== ttm_pool_alloc_basic ===================
[11:32:56] [PASSED] One page
[11:32:56] [PASSED] More than one page
[11:32:56] [PASSED] Above the allocation limit
[11:32:56] [PASSED] One page, with coherent DMA mappings enabled
[11:32:56] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:32:56] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:32:56] ============== ttm_pool_alloc_basic_dma_addr ==============
[11:32:56] [PASSED] One page
[11:32:56] [PASSED] More than one page
[11:32:56] [PASSED] Above the allocation limit
[11:32:56] [PASSED] One page, with coherent DMA mappings enabled
[11:32:56] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:32:56] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:32:56] [PASSED] ttm_pool_alloc_order_caching_match
[11:32:56] [PASSED] ttm_pool_alloc_caching_mismatch
[11:32:56] [PASSED] ttm_pool_alloc_order_mismatch
[11:32:56] [PASSED] ttm_pool_free_dma_alloc
[11:32:56] [PASSED] ttm_pool_free_no_dma_alloc
[11:32:56] [PASSED] ttm_pool_fini_basic
[11:32:56] ==================== [PASSED] ttm_pool =====================
[11:32:56] ================ ttm_resource (8 subtests) =================
[11:32:56] ================= ttm_resource_init_basic =================
[11:32:56] [PASSED] Init resource in TTM_PL_SYSTEM
[11:32:56] [PASSED] Init resource in TTM_PL_VRAM
[11:32:56] [PASSED] Init resource in a private placement
[11:32:56] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:32:56] ============= [PASSED] ttm_resource_init_basic =============
[11:32:56] [PASSED] ttm_resource_init_pinned
[11:32:56] [PASSED] ttm_resource_fini_basic
[11:32:56] [PASSED] ttm_resource_manager_init_basic
[11:32:56] [PASSED] ttm_resource_manager_usage_basic
[11:32:56] [PASSED] ttm_resource_manager_set_used_basic
[11:32:56] [PASSED] ttm_sys_man_alloc_basic
[11:32:56] [PASSED] ttm_sys_man_free_basic
[11:32:56] ================== [PASSED] ttm_resource ===================
[11:32:56] =================== ttm_tt (15 subtests) ===================
[11:32:56] ==================== ttm_tt_init_basic ====================
[11:32:56] [PASSED] Page-aligned size
[11:32:56] [PASSED] Extra pages requested
[11:32:56] ================ [PASSED] ttm_tt_init_basic ================
[11:32:56] [PASSED] ttm_tt_init_misaligned
[11:32:56] [PASSED] ttm_tt_fini_basic
[11:32:56] [PASSED] ttm_tt_fini_sg
[11:32:56] [PASSED] ttm_tt_fini_shmem
[11:32:56] [PASSED] ttm_tt_create_basic
[11:32:56] [PASSED] ttm_tt_create_invalid_bo_type
[11:32:56] [PASSED] ttm_tt_create_ttm_exists
[11:32:56] [PASSED] ttm_tt_create_failed
[11:32:56] [PASSED] ttm_tt_destroy_basic
[11:32:56] [PASSED] ttm_tt_populate_null_ttm
[11:32:56] [PASSED] ttm_tt_populate_populated_ttm
[11:32:56] [PASSED] ttm_tt_unpopulate_basic
[11:32:56] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:32:56] [PASSED] ttm_tt_swapin_basic
[11:32:56] ===================== [PASSED] ttm_tt ======================
[11:32:56] =================== ttm_bo (14 subtests) ===================
[11:32:56] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[11:32:56] [PASSED] Cannot be interrupted and sleeps
[11:32:56] [PASSED] Cannot be interrupted, locks straight away
[11:32:56] [PASSED] Can be interrupted, sleeps
[11:32:56] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:32:56] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:32:56] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:32:56] [PASSED] ttm_bo_reserve_double_resv
[11:32:56] [PASSED] ttm_bo_reserve_interrupted
[11:32:56] [PASSED] ttm_bo_reserve_deadlock
[11:32:56] [PASSED] ttm_bo_unreserve_basic
[11:32:56] [PASSED] ttm_bo_unreserve_pinned
[11:32:56] [PASSED] ttm_bo_unreserve_bulk
[11:32:56] [PASSED] ttm_bo_fini_basic
[11:32:56] [PASSED] ttm_bo_fini_shared_resv
[11:32:56] [PASSED] ttm_bo_pin_basic
[11:32:56] [PASSED] ttm_bo_pin_unpin_resource
[11:32:56] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:32:56] ===================== [PASSED] ttm_bo ======================
[11:32:56] ============== ttm_bo_validate (22 subtests) ===============
[11:32:56] ============== ttm_bo_init_reserved_sys_man ===============
[11:32:56] [PASSED] Buffer object for userspace
[11:32:56] [PASSED] Kernel buffer object
[11:32:56] [PASSED] Shared buffer object
[11:32:56] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:32:56] ============== ttm_bo_init_reserved_mock_man ==============
[11:32:56] [PASSED] Buffer object for userspace
[11:32:56] [PASSED] Kernel buffer object
[11:32:56] [PASSED] Shared buffer object
[11:32:56] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:32:56] [PASSED] ttm_bo_init_reserved_resv
[11:32:56] ================== ttm_bo_validate_basic ==================
[11:32:56] [PASSED] Buffer object for userspace
[11:32:56] [PASSED] Kernel buffer object
[11:32:56] [PASSED] Shared buffer object
[11:32:56] ============== [PASSED] ttm_bo_validate_basic ==============
[11:32:56] [PASSED] ttm_bo_validate_invalid_placement
[11:32:56] ============= ttm_bo_validate_same_placement ==============
[11:32:56] [PASSED] System manager
[11:32:56] [PASSED] VRAM manager
[11:32:56] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:32:56] [PASSED] ttm_bo_validate_failed_alloc
[11:32:56] [PASSED] ttm_bo_validate_pinned
[11:32:56] [PASSED] ttm_bo_validate_busy_placement
[11:32:56] ================ ttm_bo_validate_multihop =================
[11:32:56] [PASSED] Buffer object for userspace
[11:32:56] [PASSED] Kernel buffer object
[11:32:56] [PASSED] Shared buffer object
[11:32:56] ============ [PASSED] ttm_bo_validate_multihop =============
[11:32:56] ========== ttm_bo_validate_no_placement_signaled ==========
[11:32:56] [PASSED] Buffer object in system domain, no page vector
[11:32:56] [PASSED] Buffer object in system domain with an existing page vector
[11:32:56] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:32:56] ======== ttm_bo_validate_no_placement_not_signaled ========
[11:32:56] [PASSED] Buffer object for userspace
[11:32:56] [PASSED] Kernel buffer object
[11:32:56] [PASSED] Shared buffer object
[11:32:56] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:32:56] [PASSED] ttm_bo_validate_move_fence_signaled
[11:32:56] ========= ttm_bo_validate_move_fence_not_signaled =========
[11:32:56] [PASSED] Waits for GPU
[11:32:56] [PASSED] Tries to lock straight away
[11:32:56] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:32:56] [PASSED] ttm_bo_validate_swapout
[11:32:56] [PASSED] ttm_bo_validate_happy_evict
[11:32:56] [PASSED] ttm_bo_validate_all_pinned_evict
[11:32:56] [PASSED] ttm_bo_validate_allowed_only_evict
[11:32:56] [PASSED] ttm_bo_validate_deleted_evict
[11:32:56] [PASSED] ttm_bo_validate_busy_domain_evict
[11:32:56] [PASSED] ttm_bo_validate_evict_gutting
[11:32:56] [PASSED] ttm_bo_validate_recrusive_evict
[11:32:56] ================= [PASSED] ttm_bo_validate =================
[11:32:56] ============================================================
[11:32:56] Testing complete. Ran 102 tests: passed: 102
[11:32:56] Elapsed time: 11.863s total, 1.768s configuring, 9.830s building, 0.214s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 17+ messages in thread* ✗ CI.checksparse: warning for drm/xe: add page size allocation mode control and coverage (rev5)
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
` (7 preceding siblings ...)
2026-07-14 11:32 ` ✓ CI.KUnit: success for drm/xe: add page size allocation mode control and coverage (rev5) Patchwork
@ 2026-07-14 11:48 ` Patchwork
2026-07-14 12:23 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-07-14 17:22 ` ✗ Xe.CI.FULL: " Patchwork
10 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-07-14 11:48 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
== Series Details ==
Series: drm/xe: add page size allocation mode control and coverage (rev5)
URL : https://patchwork.freedesktop.org/series/168905/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast d3709d2bd13debee032d55c0dd71f145e11ec366
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+/kernel/Makefile:1280: C=1 specified, but sparse is not available or not up to date
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 17+ messages in thread* ✗ Xe.CI.BAT: failure for drm/xe: add page size allocation mode control and coverage (rev5)
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
` (8 preceding siblings ...)
2026-07-14 11:48 ` ✗ CI.checksparse: warning " Patchwork
@ 2026-07-14 12:23 ` Patchwork
2026-07-14 17:22 ` ✗ Xe.CI.FULL: " Patchwork
10 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-07-14 12:23 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 5332 bytes --]
== Series Details ==
Series: drm/xe: add page size allocation mode control and coverage (rev5)
URL : https://patchwork.freedesktop.org/series/168905/
State : failure
== Summary ==
CI Bug Log - changes from xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366_BAT -> xe-pw-168905v5_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-168905v5_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-168905v5_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-168905v5_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_system_allocator@madvise-atomic-inc:
- bat-bmg-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-bmg-2/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-bmg-2/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-wcl-2: [PASS][3] -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-wcl-2/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-wcl-2/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-bmg-1: [PASS][5] -> [ABORT][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-bmg-1/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-bmg-1/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-lnl-2: [PASS][7] -> [ABORT][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-lnl-2/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-lnl-2/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-bmg-vm: [PASS][9] -> [ABORT][10]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-bmg-vm/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-bmg-vm/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-ptl-2: [PASS][11] -> [ABORT][12]
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-ptl-2/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-ptl-2/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-wcl-1: [PASS][13] -> [ABORT][14]
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-wcl-1/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-wcl-1/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-ptl-1: [PASS][15] -> [ABORT][16]
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-ptl-1/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-ptl-1/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-ptl-vm: [PASS][17] -> [ABORT][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-ptl-vm/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-ptl-vm/igt@xe_exec_system_allocator@madvise-atomic-inc.html
- bat-lnl-1: [PASS][19] -> [ABORT][20]
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-lnl-1/igt@xe_exec_system_allocator@madvise-atomic-inc.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-lnl-1/igt@xe_exec_system_allocator@madvise-atomic-inc.html
* igt@xe_multigpu_svm@mgpu-xgpu-access-basic:
- bat-bmg-3: [PASS][21] -> [ABORT][22]
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/bat-bmg-3/igt@xe_multigpu_svm@mgpu-xgpu-access-basic.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/bat-bmg-3/igt@xe_multigpu_svm@mgpu-xgpu-access-basic.html
Build changes
-------------
* Linux: xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366 -> xe-pw-168905v5
IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366: d3709d2bd13debee032d55c0dd71f145e11ec366
xe-pw-168905v5: 168905v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/index.html
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^ permalink raw reply [flat|nested] 17+ messages in thread* ✗ Xe.CI.FULL: failure for drm/xe: add page size allocation mode control and coverage (rev5)
2026-07-14 10:55 [PATCH v7 0/7] drm/xe: add page size allocation mode control and coverage Himal Prasad Ghimiray
` (9 preceding siblings ...)
2026-07-14 12:23 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-07-14 17:22 ` Patchwork
10 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-07-14 17:22 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
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== Series Details ==
Series: drm/xe: add page size allocation mode control and coverage (rev5)
URL : https://patchwork.freedesktop.org/series/168905/
State : failure
== Summary ==
CI Bug Log - changes from xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366_FULL -> xe-pw-168905v5_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-168905v5_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-168905v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-168905v5_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_system_allocator@madvise-split-vma-with-mapping:
- shard-lnl: NOTRUN -> [ABORT][1]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@xe_exec_system_allocator@madvise-split-vma-with-mapping.html
* igt@xe_exec_system_allocator@many-large-mmap-new-madvise:
- shard-bmg: [PASS][2] -> [ABORT][3] +8 other tests abort
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-6/igt@xe_exec_system_allocator@many-large-mmap-new-madvise.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@xe_exec_system_allocator@many-large-mmap-new-madvise.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wb-single-vma:
- shard-lnl: [PASS][4] -> [ABORT][5] +12 other tests abort
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-lnl-6/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wb-single-vma.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-6/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wb-single-vma.html
* igt@xe_exec_system_allocator@process-many-execqueues-new-madvise:
- shard-bmg: NOTRUN -> [ABORT][6] +1 other test abort
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-5/igt@xe_exec_system_allocator@process-many-execqueues-new-madvise.html
Known issues
------------
Here are the changes found in xe-pw-168905v5_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
- shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#7059] / [Intel XE#7085])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#7059] / [Intel XE#7085])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#1124])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#1124])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_cursor_crc@cursor-offscreen-256x85:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2320])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-256x85.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: NOTRUN -> [FAIL][12] ([Intel XE#7571])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_feature_discovery@psr2:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2374] / [Intel XE#6128])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@kms_feature_discovery@psr2.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2311]) +2 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#656] / [Intel XE#7905])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#4141])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-fullscreen:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#6312] / [Intel XE#651])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-pgflip-blt:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#7865])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-pgflip-blt.html
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2313])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#7283])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#7283])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2387] / [Intel XE#7429])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@kms_psr2_su@page_flip-xrgb8888.html
- shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#1128] / [Intel XE#7413])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2509] / [Intel XE#7437])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_exec_balancer@no-exec-parallel-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#7482])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@xe_exec_balancer@no-exec-parallel-userptr-invalidate.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#1392])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2322] / [Intel XE#7372])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#8364])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate.html
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#8364])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-malloc-madvise:
- shard-bmg: [PASS][30] -> [ABORT][31] ([Intel XE#6652]) +2 other tests abort
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-5/igt@xe_exec_system_allocator@process-many-large-execqueues-malloc-madvise.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-1/igt@xe_exec_system_allocator@process-many-large-execqueues-malloc-madvise.html
* igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-madvise:
- shard-lnl: [PASS][32] -> [ABORT][33] ([Intel XE#8007]) +10 other tests abort
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-lnl-4/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-madvise.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-4/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-madvise.html
* igt@xe_exec_system_allocator@threads-many-large-malloc-prefetch-madvise:
- shard-bmg: [PASS][34] -> [ABORT][35] ([Intel XE#6652] / [Intel XE#8007]) +2 other tests abort
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-3/igt@xe_exec_system_allocator@threads-many-large-malloc-prefetch-madvise.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-large-malloc-prefetch-madvise.html
* igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-madvise:
- shard-bmg: [PASS][36] -> [ABORT][37] ([Intel XE#8007]) +7 other tests abort
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-9/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-madvise.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-9/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-madvise.html
* igt@xe_sriov_admin@exec-quantum-write-readback-vfs-disabled:
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#7174])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@xe_sriov_admin@exec-quantum-write-readback-vfs-disabled.html
#### Possible fixes ####
* igt@core_hotunplug@hotunbind-rebind:
- shard-bmg: [ABORT][39] ([Intel XE#8007]) -> [PASS][40] +1 other test pass
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-10/igt@core_hotunplug@hotunbind-rebind.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-5/igt@core_hotunplug@hotunbind-rebind.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [SKIP][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66]) ([Intel XE#2457] / [Intel XE#7405]) -> ([PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-8/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-5/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-5/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-2/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-8/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-2/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-2/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-6/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-4/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-4/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-4/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-10/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-10/igt@xe_module_load@load.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-9/igt@xe_module_load@load.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-1/igt@xe_module_load@load.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-1/igt@xe_module_load@load.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-3/igt@xe_module_load@load.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-6/igt@xe_module_load@load.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-6/igt@xe_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-7/igt@xe_module_load@load.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-7/igt@xe_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-4/igt@xe_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-9/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-9/igt@xe_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-5/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-3/igt@xe_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-5/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-5/igt@xe_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-3/igt@xe_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-5/igt@xe_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-2/igt@xe_module_load@load.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-4/igt@xe_module_load@load.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@xe_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-9/igt@xe_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-4/igt@xe_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-4/igt@xe_module_load@load.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-1/igt@xe_module_load@load.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-1/igt@xe_module_load@load.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-7/igt@xe_module_load@load.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-4/igt@xe_module_load@load.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-6/igt@xe_module_load@load.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-6/igt@xe_module_load@load.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-8/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-9/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-3/igt@xe_module_load@load.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-2/igt@xe_module_load@load.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-10/igt@xe_module_load@load.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-10/igt@xe_module_load@load.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-10/igt@xe_module_load@load.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-2/igt@xe_module_load@load.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-6/igt@xe_module_load@load.html
#### Warnings ####
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-lnl: [ABORT][92] ([Intel XE#8007]) -> [SKIP][93] ([Intel XE#7905])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][94] ([Intel XE#3544]) -> [SKIP][95] ([Intel XE#3374] / [Intel XE#3544])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
[Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
[Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
Build changes
-------------
* Linux: xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366 -> xe-pw-168905v5
IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5398-d3709d2bd13debee032d55c0dd71f145e11ec366: d3709d2bd13debee032d55c0dd71f145e11ec366
xe-pw-168905v5: 168905v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v5/index.html
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