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From: "Huang, Kai" <kai.huang@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>
Cc: Zixi Chen <zixchen@redhat.com>, Adam Dunlap <acdunlap@google.com>,
	"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	Ingo Molnar <mingo@kernel.org>, <x86@kernel.org>,
	<stable@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] x86/cpu: allow reducing x86_phys_bits during early_identify_cpu()
Date: Thu, 1 Feb 2024 23:44:33 +0800	[thread overview]
Message-ID: <dbcff3a5-8b02-4cc0-9d8e-1116ff7a3ffd@intel.com> (raw)
In-Reply-To: <20240131230902.1867092-2-pbonzini@redhat.com>



On 1/02/2024 7:09 am, Paolo Bonzini wrote:
> In commit fbf6449f84bf ("x86/sev-es: Set x86_virt_bits to the correct
> value straight away, instead of a two-phase approach"), the initialization
> of c->x86_phys_bits was moved after this_cpu->c_early_init(c).  This is
> incorrect because early_init_amd() expected to be able to reduce the
> value according to the contents of CPUID leaf 0x8000001f.
> 
> Fortunately, the bug was negated by init_amd()'s call to early_init_amd(),
> which does reduce x86_phys_bits in the end.  However, this is very
> late in the boot process and, most notably, the wrong value is used for
> x86_phys_bits when setting up MTRRs.
> 
> To fix this, call get_cpu_address_sizes() as soon as X86_FEATURE_CPUID is
> set/cleared, and c->extended_cpuid_level is retrieved.
> 
> Fixes: fbf6449f84bf ("x86/sev-es: Set x86_virt_bits to the correct value straight away, instead of a two-phase approach")
> Cc: Adam Dunlap <acdunlap@google.com>
> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> Cc: Xiaoyao Li <xiaoyao.li@intel.com>
> Cc: Kai Huang <kai.huang@intel.com>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@kernel.org>
> Cc: x86@kernel.org
> Cc: stable@vger.kernel.org
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Acked-by: Kai Huang <kai.huang@intel.com>

  parent reply	other threads:[~2024-02-01 15:44 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-31 23:09 [PATCH v2 0/2] x86/cpu: fix invalid MTRR mask values for SEV or TME Paolo Bonzini
2024-01-31 23:09 ` [PATCH v2 1/2] x86/cpu: allow reducing x86_phys_bits during early_identify_cpu() Paolo Bonzini
2024-02-01  8:33   ` Kirill A . Shutemov
2024-02-01 15:44   ` Huang, Kai [this message]
2024-01-31 23:09 ` [PATCH v2 2/2] x86/cpu/intel: Detect TME keyid bits before setting MTRR mask registers Paolo Bonzini
2024-02-01  8:34   ` Kirill A . Shutemov
2024-02-01 15:42   ` Huang, Kai
2024-02-01 18:29 ` [PATCH v2 0/2] x86/cpu: fix invalid MTRR mask values for SEV or TME Dave Hansen
2024-02-01 21:42   ` Dave Hansen
2024-02-01 23:08   ` Paolo Bonzini
2024-02-04 17:21     ` Paolo Bonzini
2024-02-13 15:45       ` Paolo Bonzini
2024-02-13 22:02         ` Dave Hansen
2024-02-13 22:25           ` Paolo Bonzini
2024-02-20 12:22           ` Paolo Bonzini
2024-02-22 18:06             ` Dave Hansen
2024-02-22 18:08               ` Paolo Bonzini
2024-02-26  1:57                 ` Yin Fengwei
2024-02-26 16:21                   ` Dave Hansen
2024-02-27  2:02                     ` Yin Fengwei
2024-02-27  6:08                     ` Yin Fengwei
2024-02-27 13:30                       ` Dave Hansen
2024-02-28  0:07                         ` Yin Fengwei
2024-02-13 17:07     ` Dave Hansen

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