From: "Huang, Kai" <kai.huang@intel.com>
To: "pbonzini@redhat.com" <pbonzini@redhat.com>,
"seanjc@google.com" <seanjc@google.com>,
"vkuznets@redhat.com" <vkuznets@redhat.com>,
"dwmw2@infradead.org" <dwmw2@infradead.org>,
"paul@xen.org" <paul@xen.org>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"yosry@kernel.org" <yosry@kernel.org>
Subject: Re: [PATCH 04/11] KVM: VMX: Read 32-bit GPR values for ENCLS instructions outside of 64-bit mode
Date: Mon, 13 Apr 2026 12:19:01 +0000 [thread overview]
Message-ID: <dea50f27311d88dcb09ea98261ca280853396a42.camel@intel.com> (raw)
In-Reply-To: <20260409235622.2052730-5-seanjc@google.com>
On Thu, 2026-04-09 at 16:56 -0700, Sean Christopherson wrote:
> When getting register values for ENCLS emulation, use kvm_register_read()
> instead of kvm_<reg>_read() so that bits 63:32 of the register are dropped
> if the guest is in 32-bit mode.
>
> Note, the misleading/surprising behavior of kvm_<reg>_read() being "raw"
> variants under the hood will be addressed once all non-benign bugs are
> fixed.
>
> Fixes: 70210c044b4e ("KVM: VMX: Add SGX ENCLS[ECREATE] handler to enforce CPUID restrictions")
> Fixes: b6f084ca5538 ("KVM: VMX: Add ENCLS[EINIT] handler to support SGX Launch Control (LC)")
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
> arch/x86/kvm/vmx/sgx.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx/sgx.c b/arch/x86/kvm/vmx/sgx.c
> index df1d0cf76947..4c61fc33f764 100644
> --- a/arch/x86/kvm/vmx/sgx.c
> +++ b/arch/x86/kvm/vmx/sgx.c
> @@ -225,8 +225,8 @@ static int handle_encls_ecreate(struct kvm_vcpu *vcpu)
> struct x86_exception ex;
> int r;
>
> - if (sgx_get_encls_gva(vcpu, kvm_rbx_read(vcpu), 32, 32, &pageinfo_gva) ||
> - sgx_get_encls_gva(vcpu, kvm_rcx_read(vcpu), 4096, 4096, &secs_gva))
> + if (sgx_get_encls_gva(vcpu, kvm_register_read(vcpu, VCPU_REGS_RBX), 32, 32, &pageinfo_gva) ||
> + sgx_get_encls_gva(vcpu, kvm_register_read(vcpu, VCPU_REGS_RCX), 4096, 4096, &secs_gva))
> return 1;
>
> /*
> @@ -302,9 +302,9 @@ static int handle_encls_einit(struct kvm_vcpu *vcpu)
> gpa_t sig_gpa, secs_gpa, token_gpa;
> int ret, trapnr;
>
> - if (sgx_get_encls_gva(vcpu, kvm_rbx_read(vcpu), 1808, 4096, &sig_gva) ||
> - sgx_get_encls_gva(vcpu, kvm_rcx_read(vcpu), 4096, 4096, &secs_gva) ||
> - sgx_get_encls_gva(vcpu, kvm_rdx_read(vcpu), 304, 512, &token_gva))
> + if (sgx_get_encls_gva(vcpu, kvm_register_read(vcpu, VCPU_REGS_RBX), 1808, 4096, &sig_gva) ||
> + sgx_get_encls_gva(vcpu, kvm_register_read(vcpu, VCPU_REGS_RCX), 4096, 4096, &secs_gva) ||
> + sgx_get_encls_gva(vcpu, kvm_register_read(vcpu, VCPU_REGS_RDX), 304, 512, &token_gva))
> return 1;
>
Is there any case where bits 63:32 can have non-zero value?
If vCPU is in 32-bit mode then it should not be able to access 64-bit GPR?
next prev parent reply other threads:[~2026-04-13 12:19 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-09 23:56 [PATCH 00/11] KVM: x86: Clean up kvm_<reg>_{read,write}() mess Sean Christopherson
2026-04-09 23:56 ` [PATCH 01/11] KVM: SVM: Truncate INVLPGA address in compatibility mode Sean Christopherson
2026-04-21 23:26 ` Yosry Ahmed
2026-04-09 23:56 ` [PATCH 02/11] KVM: x86/xen: Bug the VM if 32-bit KVM observes a 64-bit mode hypercall Sean Christopherson
2026-04-09 23:56 ` [PATCH 03/11] KVM: x86/xen: Don't truncate RAX when handling hypercall from protected guest Sean Christopherson
2026-04-13 10:36 ` Binbin Wu
2026-04-15 21:29 ` Sean Christopherson
2026-04-09 23:56 ` [PATCH 04/11] KVM: VMX: Read 32-bit GPR values for ENCLS instructions outside of 64-bit mode Sean Christopherson
2026-04-13 12:19 ` Huang, Kai [this message]
2026-04-15 21:37 ` Sean Christopherson
2026-04-15 23:32 ` Huang, Kai
2026-04-16 0:27 ` Sean Christopherson
2026-04-16 1:40 ` Huang, Kai
2026-04-09 23:56 ` [PATCH 05/11] KVM: x86: Trace hypercall register *after* truncating values for 32-bit Sean Christopherson
2026-04-21 23:27 ` Yosry Ahmed
2026-04-09 23:56 ` [PATCH 06/11] KVM: x86: Move kvm_<reg>_{read,write}() definitions to x86.h Sean Christopherson
2026-04-21 23:32 ` Yosry Ahmed
2026-04-22 0:40 ` Sean Christopherson
2026-04-22 20:03 ` Yosry Ahmed
2026-04-23 19:17 ` Sean Christopherson
2026-04-09 23:56 ` [PATCH 07/11] KVM: x86: Add mode-aware versions of kvm_<reg>_{read,write}() helpers Sean Christopherson
2026-04-14 8:26 ` Huang, Kai
2026-04-14 15:42 ` Sean Christopherson
2026-04-14 22:40 ` Huang, Kai
2026-04-14 9:02 ` Binbin Wu
2026-04-23 22:12 ` Sean Christopherson
2026-04-09 23:56 ` [PATCH 08/11] KVM: x86: Drop non-raw kvm_<reg>_write() helpers Sean Christopherson
2026-04-09 23:56 ` [PATCH 09/11] KVM: nSVM: Use kvm_rax_read() now that it's mode-aware Sean Christopherson
2026-04-21 23:19 ` Yosry Ahmed
2026-04-09 23:56 ` [PATCH 10/11] Revert "KVM: VMX: Read 32-bit GPR values for ENCLS instructions outside of 64-bit mode" Sean Christopherson
2026-04-16 1:42 ` Huang, Kai
2026-04-09 23:56 ` [PATCH 11/11] KVM: x86: Harden is_64_bit_hypercall() against bugs on 32-bit kernels Sean Christopherson
2026-04-16 1:43 ` Huang, Kai
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