From: Santosh Shilimkar <santosh.shilimkar@ti.com>
To: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Nishanth Menon <nm@ti.com>,
linux-omap <linux-omap@vger.kernel.org>,
Jean Pihet <jean.pihet@newoldbits.com>,
Vishwanath Sripathy <vishwanath.bs@ti.com>,
Tony <tony@atomide.com>
Subject: RE: [PATCH 00/13] OMAP3: OFF mode fixes
Date: Wed, 24 Nov 2010 14:52:27 +0530 [thread overview]
Message-ID: <dfe358793629e4b10d1a5007fb273164@mail.gmail.com> (raw)
In-Reply-To: efb598510f2d2522872f58145c03910d@mail.gmail.com
(Sorry. You will see two replies from me on your email)
> -----Original Message-----
> From: Santosh Shilimkar [mailto:santosh.shilimkar@ti.com]
> Sent: Wednesday, November 24, 2010 11:04 AM
> To: 'Kevin Hilman'
> Cc: Nishanth Menon; 'linux-omap'; 'Jean Pihet'; Vishwanath Sripathy;
> 'Tony'
> Subject: RE: [PATCH 00/13] OMAP3: OFF mode fixes
>
> > -----Original Message-----
> > From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> > owner@vger.kernel.org] On Behalf Of Kevin Hilman
> > Sent: Wednesday, November 24, 2010 2:06 AM
> > To: Santosh Shilimkar
> > Cc: Nishanth Menon; linux-omap; Jean Pihet; Vishwanath Sripathy; Tony
> > Subject: Re: [PATCH 00/13] OMAP3: OFF mode fixes
> >
[...]
> > > And we should treat ROM code as a hardware. Secure services
> > > don't give you garrulity of saving per each secure module. To
> > > get CPU OFF working on secure device, secure RAM must be saved.
> > > So I still think it is CPU specific code and pretty much relevant
> > > to CPU IDLE OFF state considering ROM code.
> > > Ofcourse this not related to GP device because we never enter Secure
> > > world again after the boot-up.
> > > So moving this code to a separate file is fine but it still related
> > > to CPU.
> >
> > Sure, it's still *related* to the CPU, but what I am arguing is that
it
> > should not be related to CPU *idle*.
> >
> > My undersanding is this (please correct me):
> >
> > Secure RAM context only needs to be saved/updated when something in it
> > changes changes (e.g. secure driver usage.) Therefore, any
> > driver/device usage that has a side effect of changing secure RAM
should
> > be responsible for updating secure RAM.
> >
> This assumption holds true largely but not completely. There are more
> Secure APIs which are outside of any secure driver usage which can also
> alter the state of secure RAM. OMAP4, we have more APIs apart from
secure
> RAM where the secure HW registers, firewalls, cache controllers,
interrupt
> controllers are managed using secure APIs. All of this is must for
correct
> CPU OFF functioning.
>
> > The approach taken in $SUBJECT series is basically: since we don't
know
> > who is using/changing secure RAM, we better save it (or have the
option
> > to) during every off-mode transition. This approach is what I do not
> > like. It's pushing work (and intellegence) that should be in the
> > drivers into the PM core where it does not belong.
> >
> The problem is because the secure RAM is not portioned per device basis
> but managed as a whole. If we had per secure device portioning then the
> respective device drivers saving it's context would have worked
perfectly.
> And the fact is it's not the secure device driver context, but it's a
> Secure software context which runs in parallel with HLOS on HS devices.
>
> > Rather, I want to follow the same approach we follow for every other
> > device driver. Drivers must assume they can lose context. Therefore
> > it's up to them to save it.
> >
> > IOW, the drivers that *change* secure RAM should be responsible for
> > ensuring that any of the changes they make are saved.
> >
> As I mentioned above its not just the driver context but the whole
> secure software context. I will check with ROM team if it can be made
> more granular for future OMAPs so that we can have the usual strategy
> of respective components taking care of there save/restore. This will
> also save huge latency we incure while saving whole RAM on every MPU
> OFF transition.
>
I had a discussion with ROM team and they conformed that the secure
context can get changed with protected applications (PA for FW, secure
keys) as well as with secure drivers like crypto, aes etc.
This can be centralized and some APIs can be provided by the secure
middleware to know whether the context needs to be save or not.
Secure middleware manages all the secure driver interfaces as well
as PA's. This is the centralized place where all state knowledge is
available. This component also can take care of doing a secure context
save job based on needs. The only concern from them was that
which security middleware to be used is not fixed and its
upto customers to decide. Few of them develop this on there own.
So with clarity now, I concur with your idea of moving out the secure
context save from CPUIDLE code.
The only problem I see is how do we support multiple security
middleware's with a common infrastructure.
Regards
Santosh
next prev parent reply other threads:[~2010-11-24 9:22 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-19 1:54 [PATCH 00/13] OMAP3: OFF mode fixes Nishanth Menon
2010-11-19 1:54 ` [PATCH 01/13] OMAP3: PM: Update clean_l2 to use v7_flush_dcache_all Nishanth Menon
2010-11-19 9:46 ` Jean Pihet
2010-11-19 9:57 ` Peter 'p2' De Schrijver
2010-11-19 10:15 ` Jean Pihet
2010-11-19 1:54 ` [PATCH 02/13] OMAP3: PM: Errata i581 suppport: dll kick strategy Nishanth Menon
2010-11-24 16:51 ` Sripathy, Vishwanath
2010-11-24 17:24 ` Nishanth Menon
2010-11-25 6:39 ` Sripathy, Vishwanath
2010-11-25 12:22 ` Peter 'p2' De Schrijver
2010-11-19 1:54 ` [PATCH 03/13] OMAP3: PM: make secure ram save size configurable Nishanth Menon
2010-11-19 1:54 ` [PATCH 04/13] OMAP3: PM: Save secure RAM context before entering WFI Nishanth Menon
2010-11-19 1:54 ` [PATCH 05/13] OMAP3: PM: optional save secure RAM context every core off cycle Nishanth Menon
2010-11-19 1:54 ` [PATCH 06/13] OMAP3: PM: Fix secure save size for OMAP3 Nishanth Menon
2010-11-19 1:54 ` [PATCH 07/13] OMAP3: PM: allocate secure RAM context memory from low-mem Nishanth Menon
2010-11-19 1:54 ` [PATCH 08/13] OMAP3: PM: Deny MPU idle while saving secure RAM Nishanth Menon
2010-11-19 17:08 ` Kevin Hilman
2010-11-19 17:16 ` Nishanth Menon
2010-11-19 17:18 ` Santosh Shilimkar
2010-11-19 17:24 ` Nishanth Menon
2010-11-19 17:28 ` Santosh Shilimkar
2010-11-19 18:51 ` Nishanth Menon
2010-11-19 20:39 ` Kevin Hilman
2010-11-19 20:54 ` Nishanth Menon
2010-11-19 21:06 ` Kevin Hilman
2010-11-19 21:15 ` Nishanth Menon
2010-11-20 10:04 ` Santosh Shilimkar
2010-11-19 19:41 ` Kevin Hilman
2010-11-19 20:18 ` Nishanth Menon
2010-11-19 20:55 ` Kevin Hilman
2010-11-19 21:02 ` Nishanth Menon
2010-11-19 21:09 ` Kevin Hilman
2010-11-20 10:02 ` Santosh Shilimkar
2010-11-19 1:54 ` [PATCH 09/13] OMAP3: PM: Apply errata i540 before save secure ram Nishanth Menon
2010-11-19 10:09 ` Jean Pihet
2010-11-19 12:12 ` Nishanth Menon
2010-11-19 12:54 ` Jean Pihet
2010-11-19 17:15 ` Kevin Hilman
2010-11-19 17:18 ` Nishanth Menon
2010-11-19 19:47 ` Kevin Hilman
2010-11-19 20:08 ` Nishanth Menon
2010-11-19 1:54 ` [PATCH 10/13] OMAP3: PM: Errata i582: per domain reset issue: uart Nishanth Menon
2010-11-22 18:59 ` Kevin Hilman
2010-11-19 1:54 ` [PATCH 11/13] OMAP3630: PM: Errata i608: disable RTA Nishanth Menon
2010-11-19 9:57 ` Jean Pihet
2010-11-19 12:09 ` Nishanth Menon
2010-11-19 1:54 ` [PATCH 12/13] OMAP3630: PM: Disable L2 cache while invalidating L2 cache Nishanth Menon
2010-11-19 1:54 ` [PATCH 13/13] OMAP3630: PM: Errata i583: disable coreoff if < ES1.2 Nishanth Menon
2010-11-19 10:07 ` Jean Pihet
2010-11-19 12:14 ` Nishanth Menon
2010-11-19 10:18 ` [PATCH 00/13] OMAP3: OFF mode fixes Jean Pihet
2010-11-19 12:03 ` Nishanth Menon
2010-11-19 21:20 ` Kevin Hilman
2010-11-19 21:37 ` Nishanth Menon
2010-11-20 9:56 ` Santosh Shilimkar
2010-11-22 16:08 ` Kevin Hilman
2010-11-22 19:16 ` Kevin Hilman
2010-11-23 9:02 ` Santosh Shilimkar
2010-11-23 20:35 ` Kevin Hilman
2010-11-24 5:34 ` Santosh Shilimkar
2010-11-24 9:22 ` Santosh Shilimkar [this message]
2010-11-24 17:11 ` Jean Pihet
2010-11-24 17:21 ` Nishanth Menon
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