* [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes
@ 2026-07-27 22:21 Michał Grzelak
2026-07-27 22:21 ` [PATCH v1 1/2] drm/i915/display: fix SKL_DSSM register masks Michał Grzelak
` (6 more replies)
0 siblings, 7 replies; 10+ messages in thread
From: Michał Grzelak @ 2026-07-27 22:21 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Michał Grzelak (2):
drm/i915/display: fix SKL_DSSM register masks
drm/i915/xe2lpd+: disable 3D LUT if unsupported
drivers/gpu/drm/i915/display/intel_color.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_device.c | 8 ++++++++
drivers/gpu/drm/i915/display/intel_display_device.h | 4 ++++
drivers/gpu/drm/i915/display/intel_display_regs.h | 9 +++++----
4 files changed, 20 insertions(+), 4 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v1 1/2] drm/i915/display: fix SKL_DSSM register masks
2026-07-27 22:21 [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes Michał Grzelak
@ 2026-07-27 22:21 ` Michał Grzelak
2026-07-28 7:44 ` Jani Nikula
2026-07-27 22:21 ` [PATCH v1 2/2] drm/i915/xe2lpd+: disable 3D LUT if unsupported Michał Grzelak
` (5 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Michał Grzelak @ 2026-07-27 22:21 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Add indentation into SKL_DSSM reference clock macros. Replace bit shifts
with REG_GENMASK().
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_regs.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 0f5018482497..0677ca2dde00 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1779,10 +1779,10 @@
#define XE2LPD_DE_CAP_SCALER_SINGLE 1
#define SKL_DSSM _MMIO(0x51004)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK (7 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz (0 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz (1 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz (2 << 29)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK REG_GENMASK(31, 29)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz 0
+#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz REG_GENMASK(29, 29)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz REG_GENMASK(30, 29)
/*GEN11 chicken */
#define _PIPEA_CHICKEN 0x70038
--
2.45.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v1 2/2] drm/i915/xe2lpd+: disable 3D LUT if unsupported
2026-07-27 22:21 [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes Michał Grzelak
2026-07-27 22:21 ` [PATCH v1 1/2] drm/i915/display: fix SKL_DSSM register masks Michał Grzelak
@ 2026-07-27 22:21 ` Michał Grzelak
2026-07-28 7:42 ` Jani Nikula
2026-07-27 22:27 ` ✗ CI.checkpatch: warning for drm/i915/display: SKL_DSSM / DE_CAP fixes Patchwork
` (4 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Michał Grzelak @ 2026-07-27 22:21 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: Jani Nikula, Michał Grzelak, Chaitanya Borah Kumar
XE2LPD_DE_CAP_3DLUT_MASK is defined but never used. Check with it if
3DLUT is enabled.
Check DE_CAP register if 3D LUT is disabled. Store the info in a new
field of struct intel_display_runtime_info.
Add macros for checking both 3D LUT hardware and 3D LUT capability.
Initialize has_3dlut to 1 on each platform since LNL.
Log value of has_3dlut in intel_display_device_info_print().
Bspec: 71161
Cc: Chaitanya Borah Kumar <chaitanya.borah.kumar@intel.com>
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_device.c | 8 ++++++++
drivers/gpu/drm/i915/display/intel_display_device.h | 4 ++++
drivers/gpu/drm/i915/display/intel_display_regs.h | 1 +
4 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 87ced9f6ff40..ffdefb51a264 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4258,6 +4258,9 @@ intel_color_load_plane_luts(struct intel_dsb *dsb,
bool
intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe)
{
+ if (!HAS_3DLUT(display))
+ return false;
+
if (DISPLAY_VER(display) >= 12)
return pipe == PIPE_A || pipe == PIPE_B;
else
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index f17fc2c68472..45c791531f85 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1335,6 +1335,7 @@ static const struct platform_desc dg2_desc = {
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_D), \
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A) | BIT(INTEL_FBC_B), \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
@@ -1345,6 +1346,7 @@ static const struct platform_desc dg2_desc = {
static const struct intel_display_device_info xe_lpdp_display = {
XE_LPDP_FEATURES,
+ .__runtime_defaults.has_3dlut = 0,
};
static const struct intel_display_device_info xe2_lpd_display = {
@@ -1385,6 +1387,7 @@ static const struct intel_display_device_info xe2_hpd_display = {
XE_LPDP_FEATURES,
.__runtime_defaults.port_mask = BIT(PORT_A) |
BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4),
+ .__runtime_defaults.has_3dlut = 0,
};
static const u16 mtl_u_ids[] = {
@@ -1935,6 +1938,10 @@ static void __intel_display_device_info_runtime_init(struct intel_display *displ
if (DISPLAY_VER(display) >= 20) {
u32 cap = intel_de_read(display, XE2LPD_DE_CAP);
+ if (REG_FIELD_GET(XE2LPD_DE_CAP_3DLUT_MASK, cap) ==
+ XE2LPD_DE_CAP_3DLUT_REMOVED)
+ display_runtime->has_3dlut = 0;
+
if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) ==
XE2LPD_DE_CAP_DSC_REMOVED)
display_runtime->has_dsc = 0;
@@ -1996,6 +2003,7 @@ void intel_display_device_info_print(const struct intel_display_device_info *inf
DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
#undef PRINT_FLAG
+ drm_printf(p, "has_3dlut: %s\n", str_yes_no(runtime->has_3dlut));
drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
drm_printf(p, "has_dsc: %s\n", str_yes_no(runtime->has_dsc));
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 7121e7cd9512..34ee7993be33 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -147,6 +147,9 @@ struct intel_display_platforms {
#define HAS_128B_Y_TILING(__display) (!(__display)->platform.i915g && !(__display)->platform.i915gm)
#define HAS_2PPC(__display) (DISPLAY_VER(__display) >= 10)
+#define HAS_3DLUT_HW(__display) (DISPLAY_VER(__display) >= 10)
+#define HAS_3DLUT_CAP(__display) (IS_DISPLAY_VER(__display, 10, 20) || DISPLAY_RUNTIME_INFO(__display)->has_3dlut)
+#define HAS_3DLUT(__display) (HAS_3DLUT_HW(__display) && HAS_3DLUT_CAP(__display))
#define HAS_4TILE(__display) ((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
#define HAS_ASYNC_FLIPS(__display) (DISPLAY_VER(__display) >= 5)
#define HAS_AS_SDP(__display) (DISPLAY_VER(__display) >= 13)
@@ -304,6 +307,7 @@ struct intel_display_runtime_info {
u8 fbc_mask;
+ bool has_3dlut;
bool has_hdcp;
bool has_dmc;
bool has_dsc;
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 0677ca2dde00..7b2332e2fae2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1773,6 +1773,7 @@
#define XE2LPD_DE_CAP _MMIO(0x41100)
#define XE2LPD_DE_CAP_3DLUT_MASK REG_GENMASK(31, 30)
+#define XE2LPD_DE_CAP_3DLUT_REMOVED 1
#define XE2LPD_DE_CAP_DSC_MASK REG_GENMASK(29, 28)
#define XE2LPD_DE_CAP_DSC_REMOVED 1
#define XE2LPD_DE_CAP_SCALER_MASK REG_GENMASK(27, 26)
--
2.45.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915/display: SKL_DSSM / DE_CAP fixes
2026-07-27 22:21 [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes Michał Grzelak
2026-07-27 22:21 ` [PATCH v1 1/2] drm/i915/display: fix SKL_DSSM register masks Michał Grzelak
2026-07-27 22:21 ` [PATCH v1 2/2] drm/i915/xe2lpd+: disable 3D LUT if unsupported Michał Grzelak
@ 2026-07-27 22:27 ` Patchwork
2026-07-27 22:29 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-27 22:27 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171136/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit ca9a5d53c1b514bf71a546b7e9cc28daffa1cd1d
Author: Michał Grzelak <michal.grzelak@intel.com>
Date: Tue Jul 28 00:21:25 2026 +0200
drm/i915/xe2lpd+: disable 3D LUT if unsupported
XE2LPD_DE_CAP_3DLUT_MASK is defined but never used. Check with it if
3DLUT is enabled.
Check DE_CAP register if 3D LUT is disabled. Store the info in a new
field of struct intel_display_runtime_info.
Add macros for checking both 3D LUT hardware and 3D LUT capability.
Initialize has_3dlut to 1 on each platform since LNL.
Log value of has_3dlut in intel_display_device_info_print().
Bspec: 71161
Cc: Chaitanya Borah Kumar <chaitanya.borah.kumar@intel.com>
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
+ /mt/dim checkpatch 28e3f47d47a61b5e28e7566944479e9c9715d41d drm-intel
d89fa6b5f997 drm/i915/display: fix SKL_DSSM register masks
ca9a5d53c1b5 drm/i915/xe2lpd+: disable 3D LUT if unsupported
-:95: WARNING:LONG_LINE: line length of 121 exceeds 100 columns
#95: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:151:
+#define HAS_3DLUT_CAP(__display) (IS_DISPLAY_VER(__display, 10, 20) || DISPLAY_RUNTIME_INFO(__display)->has_3dlut)
-:95: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#95: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:151:
+#define HAS_3DLUT_CAP(__display) (IS_DISPLAY_VER(__display, 10, 20) || DISPLAY_RUNTIME_INFO(__display)->has_3dlut)
-:96: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#96: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:152:
+#define HAS_3DLUT(__display) (HAS_3DLUT_HW(__display) && HAS_3DLUT_CAP(__display))
total: 0 errors, 1 warnings, 2 checks, 70 lines checked
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: SKL_DSSM / DE_CAP fixes
2026-07-27 22:21 [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes Michał Grzelak
` (2 preceding siblings ...)
2026-07-27 22:27 ` ✗ CI.checkpatch: warning for drm/i915/display: SKL_DSSM / DE_CAP fixes Patchwork
@ 2026-07-27 22:29 ` Patchwork
2026-07-27 23:04 ` ✗ i915.CI.BAT: failure " Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-27 22:29 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171136/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:27:59] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:28:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:28:35] Starting KUnit Kernel (1/1)...
[22:28:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:28:35] ================== guc_buf (11 subtests) ===================
[22:28:35] [PASSED] test_smallest
[22:28:35] [PASSED] test_largest
[22:28:35] [PASSED] test_granular
[22:28:35] [PASSED] test_unique
[22:28:35] [PASSED] test_overlap
[22:28:35] [PASSED] test_reusable
[22:28:35] [PASSED] test_too_big
[22:28:35] [PASSED] test_flush
[22:28:35] [PASSED] test_lookup
[22:28:35] [PASSED] test_data
[22:28:35] [PASSED] test_class
[22:28:35] ===================== [PASSED] guc_buf =====================
[22:28:35] =================== guc_dbm (7 subtests) ===================
[22:28:35] [PASSED] test_empty
[22:28:35] [PASSED] test_default
[22:28:35] ======================== test_size ========================
[22:28:35] [PASSED] 4
[22:28:35] [PASSED] 8
[22:28:35] [PASSED] 32
[22:28:35] [PASSED] 256
[22:28:35] ==================== [PASSED] test_size ====================
[22:28:35] ======================= test_reuse ========================
[22:28:35] [PASSED] 4
[22:28:35] [PASSED] 8
[22:28:35] [PASSED] 32
[22:28:35] [PASSED] 256
[22:28:35] =================== [PASSED] test_reuse ====================
[22:28:35] =================== test_range_overlap ====================
[22:28:35] [PASSED] 4
[22:28:35] [PASSED] 8
[22:28:35] [PASSED] 32
[22:28:35] [PASSED] 256
[22:28:35] =============== [PASSED] test_range_overlap ================
[22:28:35] =================== test_range_compact ====================
[22:28:35] [PASSED] 4
[22:28:35] [PASSED] 8
[22:28:35] [PASSED] 32
[22:28:35] [PASSED] 256
[22:28:35] =============== [PASSED] test_range_compact ================
[22:28:35] ==================== test_range_spare =====================
[22:28:35] [PASSED] 4
[22:28:35] [PASSED] 8
[22:28:35] [PASSED] 32
[22:28:35] [PASSED] 256
[22:28:35] ================ [PASSED] test_range_spare =================
[22:28:35] ===================== [PASSED] guc_dbm =====================
[22:28:35] =================== guc_idm (6 subtests) ===================
[22:28:35] [PASSED] bad_init
[22:28:35] [PASSED] no_init
[22:28:35] [PASSED] init_fini
[22:28:35] [PASSED] check_used
[22:28:35] [PASSED] check_quota
[22:28:35] [PASSED] check_all
[22:28:35] ===================== [PASSED] guc_idm =====================
[22:28:35] =============== guc_klv_helpers (9 subtests) ===============
[22:28:35] [PASSED] test_count
[22:28:35] [PASSED] test_encode_u32
[22:28:35] [PASSED] test_encode_u64
[22:28:35] [PASSED] test_encode_string
[22:28:35] [PASSED] test_encode_object_raw
[22:28:35] [PASSED] test_encode_object_klv
[22:28:35] [PASSED] test_encode_object_nested
[22:28:35] [PASSED] test_encode_object_basic
[22:28:35] [PASSED] test_print
[22:28:35] ================= [PASSED] guc_klv_helpers =================
[22:28:35] ================== no_relay (3 subtests) ===================
[22:28:35] [PASSED] xe_drops_guc2pf_if_not_ready
[22:28:35] [PASSED] xe_drops_guc2vf_if_not_ready
[22:28:35] [PASSED] xe_rejects_send_if_not_ready
[22:28:35] ==================== [PASSED] no_relay =====================
[22:28:35] ================== pf_relay (14 subtests) ==================
[22:28:35] [PASSED] pf_rejects_guc2pf_too_short
[22:28:35] [PASSED] pf_rejects_guc2pf_too_long
[22:28:35] [PASSED] pf_rejects_guc2pf_no_payload
[22:28:35] [PASSED] pf_fails_no_payload
[22:28:35] [PASSED] pf_fails_bad_origin
[22:28:35] [PASSED] pf_fails_bad_type
[22:28:35] [PASSED] pf_txn_reports_error
[22:28:35] [PASSED] pf_txn_sends_pf2guc
[22:28:35] [PASSED] pf_sends_pf2guc
[22:28:35] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:28:35] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:28:35] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:28:35] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:28:35] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:28:35] ==================== [PASSED] pf_relay =====================
[22:28:35] ================== vf_relay (3 subtests) ===================
[22:28:35] [PASSED] vf_rejects_guc2vf_too_short
[22:28:35] [PASSED] vf_rejects_guc2vf_too_long
[22:28:35] [PASSED] vf_rejects_guc2vf_no_payload
[22:28:35] ==================== [PASSED] vf_relay =====================
[22:28:35] ================ pf_gt_config (9 subtests) =================
[22:28:35] [PASSED] fair_contexts_1vf
[22:28:35] [PASSED] fair_doorbells_1vf
[22:28:35] [PASSED] fair_ggtt_1vf
[22:28:35] ====================== fair_vram_1vf ======================
[22:28:35] [PASSED] 3.50 GiB
[22:28:35] [PASSED] 11.5 GiB
[22:28:35] [PASSED] 15.5 GiB
[22:28:35] [PASSED] 31.5 GiB
[22:28:35] [PASSED] 63.5 GiB
[22:28:35] [PASSED] 1.91 GiB
[22:28:35] ================== [PASSED] fair_vram_1vf ==================
[22:28:35] ================ fair_vram_1vf_admin_only =================
[22:28:35] [PASSED] 3.50 GiB
[22:28:35] [PASSED] 11.5 GiB
[22:28:35] [PASSED] 15.5 GiB
[22:28:35] [PASSED] 31.5 GiB
[22:28:35] [PASSED] 63.5 GiB
[22:28:35] [PASSED] 1.91 GiB
[22:28:35] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:28:35] ====================== fair_contexts ======================
[22:28:35] [PASSED] 1 VF
[22:28:35] [PASSED] 2 VFs
[22:28:35] [PASSED] 3 VFs
[22:28:35] [PASSED] 4 VFs
[22:28:35] [PASSED] 5 VFs
[22:28:35] [PASSED] 6 VFs
[22:28:35] [PASSED] 7 VFs
[22:28:35] [PASSED] 8 VFs
[22:28:35] [PASSED] 9 VFs
[22:28:35] [PASSED] 10 VFs
[22:28:35] [PASSED] 11 VFs
[22:28:35] [PASSED] 12 VFs
[22:28:35] [PASSED] 13 VFs
[22:28:35] [PASSED] 14 VFs
[22:28:35] [PASSED] 15 VFs
[22:28:35] [PASSED] 16 VFs
[22:28:35] [PASSED] 17 VFs
[22:28:35] [PASSED] 18 VFs
[22:28:35] [PASSED] 19 VFs
[22:28:35] [PASSED] 20 VFs
[22:28:35] [PASSED] 21 VFs
[22:28:35] [PASSED] 22 VFs
[22:28:35] [PASSED] 23 VFs
[22:28:35] [PASSED] 24 VFs
[22:28:35] [PASSED] 25 VFs
[22:28:35] [PASSED] 26 VFs
[22:28:35] [PASSED] 27 VFs
[22:28:35] [PASSED] 28 VFs
[22:28:35] [PASSED] 29 VFs
[22:28:35] [PASSED] 30 VFs
[22:28:35] [PASSED] 31 VFs
[22:28:35] [PASSED] 32 VFs
[22:28:35] [PASSED] 33 VFs
[22:28:35] [PASSED] 34 VFs
[22:28:35] [PASSED] 35 VFs
[22:28:35] [PASSED] 36 VFs
[22:28:35] [PASSED] 37 VFs
[22:28:35] [PASSED] 38 VFs
[22:28:35] [PASSED] 39 VFs
[22:28:35] [PASSED] 40 VFs
[22:28:35] [PASSED] 41 VFs
[22:28:35] [PASSED] 42 VFs
[22:28:35] [PASSED] 43 VFs
[22:28:35] [PASSED] 44 VFs
[22:28:35] [PASSED] 45 VFs
[22:28:35] [PASSED] 46 VFs
[22:28:35] [PASSED] 47 VFs
[22:28:35] [PASSED] 48 VFs
[22:28:35] [PASSED] 49 VFs
[22:28:35] [PASSED] 50 VFs
[22:28:35] [PASSED] 51 VFs
[22:28:35] [PASSED] 52 VFs
[22:28:35] [PASSED] 53 VFs
[22:28:35] [PASSED] 54 VFs
[22:28:35] [PASSED] 55 VFs
[22:28:35] [PASSED] 56 VFs
[22:28:35] [PASSED] 57 VFs
[22:28:35] [PASSED] 58 VFs
[22:28:35] [PASSED] 59 VFs
[22:28:35] [PASSED] 60 VFs
[22:28:35] [PASSED] 61 VFs
[22:28:35] [PASSED] 62 VFs
[22:28:35] [PASSED] 63 VFs
[22:28:35] ================== [PASSED] fair_contexts ==================
[22:28:35] ===================== fair_doorbells ======================
[22:28:35] [PASSED] 1 VF
[22:28:35] [PASSED] 2 VFs
[22:28:35] [PASSED] 3 VFs
[22:28:35] [PASSED] 4 VFs
[22:28:35] [PASSED] 5 VFs
[22:28:35] [PASSED] 6 VFs
[22:28:35] [PASSED] 7 VFs
[22:28:35] [PASSED] 8 VFs
[22:28:35] [PASSED] 9 VFs
[22:28:35] [PASSED] 10 VFs
[22:28:35] [PASSED] 11 VFs
[22:28:35] [PASSED] 12 VFs
[22:28:35] [PASSED] 13 VFs
[22:28:35] [PASSED] 14 VFs
[22:28:35] [PASSED] 15 VFs
[22:28:35] [PASSED] 16 VFs
[22:28:35] [PASSED] 17 VFs
[22:28:35] [PASSED] 18 VFs
[22:28:35] [PASSED] 19 VFs
[22:28:35] [PASSED] 20 VFs
[22:28:35] [PASSED] 21 VFs
[22:28:35] [PASSED] 22 VFs
[22:28:35] [PASSED] 23 VFs
[22:28:35] [PASSED] 24 VFs
[22:28:35] [PASSED] 25 VFs
[22:28:35] [PASSED] 26 VFs
[22:28:35] [PASSED] 27 VFs
[22:28:35] [PASSED] 28 VFs
[22:28:35] [PASSED] 29 VFs
[22:28:35] [PASSED] 30 VFs
[22:28:35] [PASSED] 31 VFs
[22:28:35] [PASSED] 32 VFs
[22:28:35] [PASSED] 33 VFs
[22:28:35] [PASSED] 34 VFs
[22:28:35] [PASSED] 35 VFs
[22:28:35] [PASSED] 36 VFs
[22:28:35] [PASSED] 37 VFs
[22:28:35] [PASSED] 38 VFs
[22:28:35] [PASSED] 39 VFs
[22:28:35] [PASSED] 40 VFs
[22:28:35] [PASSED] 41 VFs
[22:28:35] [PASSED] 42 VFs
[22:28:35] [PASSED] 43 VFs
[22:28:35] [PASSED] 44 VFs
[22:28:35] [PASSED] 45 VFs
[22:28:35] [PASSED] 46 VFs
[22:28:35] [PASSED] 47 VFs
[22:28:35] [PASSED] 48 VFs
[22:28:35] [PASSED] 49 VFs
[22:28:35] [PASSED] 50 VFs
[22:28:35] [PASSED] 51 VFs
[22:28:35] [PASSED] 52 VFs
[22:28:35] [PASSED] 53 VFs
[22:28:35] [PASSED] 54 VFs
[22:28:35] [PASSED] 55 VFs
[22:28:35] [PASSED] 56 VFs
[22:28:35] [PASSED] 57 VFs
[22:28:35] [PASSED] 58 VFs
[22:28:35] [PASSED] 59 VFs
[22:28:35] [PASSED] 60 VFs
[22:28:35] [PASSED] 61 VFs
[22:28:35] [PASSED] 62 VFs
[22:28:35] [PASSED] 63 VFs
[22:28:35] ================= [PASSED] fair_doorbells ==================
[22:28:35] ======================== fair_ggtt ========================
[22:28:35] [PASSED] 1 VF
[22:28:35] [PASSED] 2 VFs
[22:28:35] [PASSED] 3 VFs
[22:28:35] [PASSED] 4 VFs
[22:28:35] [PASSED] 5 VFs
[22:28:35] [PASSED] 6 VFs
[22:28:35] [PASSED] 7 VFs
[22:28:35] [PASSED] 8 VFs
[22:28:35] [PASSED] 9 VFs
[22:28:35] [PASSED] 10 VFs
[22:28:35] [PASSED] 11 VFs
[22:28:35] [PASSED] 12 VFs
[22:28:35] [PASSED] 13 VFs
[22:28:35] [PASSED] 14 VFs
[22:28:35] [PASSED] 15 VFs
[22:28:35] [PASSED] 16 VFs
[22:28:35] [PASSED] 17 VFs
[22:28:35] [PASSED] 18 VFs
[22:28:35] [PASSED] 19 VFs
[22:28:35] [PASSED] 20 VFs
[22:28:35] [PASSED] 21 VFs
[22:28:35] [PASSED] 22 VFs
[22:28:35] [PASSED] 23 VFs
[22:28:35] [PASSED] 24 VFs
[22:28:35] [PASSED] 25 VFs
[22:28:35] [PASSED] 26 VFs
[22:28:35] [PASSED] 27 VFs
[22:28:35] [PASSED] 28 VFs
[22:28:35] [PASSED] 29 VFs
[22:28:35] [PASSED] 30 VFs
[22:28:35] [PASSED] 31 VFs
[22:28:35] [PASSED] 32 VFs
[22:28:35] [PASSED] 33 VFs
[22:28:35] [PASSED] 34 VFs
[22:28:35] [PASSED] 35 VFs
[22:28:35] [PASSED] 36 VFs
[22:28:35] [PASSED] 37 VFs
[22:28:35] [PASSED] 38 VFs
[22:28:35] [PASSED] 39 VFs
[22:28:35] [PASSED] 40 VFs
[22:28:35] [PASSED] 41 VFs
[22:28:35] [PASSED] 42 VFs
[22:28:35] [PASSED] 43 VFs
[22:28:35] [PASSED] 44 VFs
[22:28:35] [PASSED] 45 VFs
[22:28:35] [PASSED] 46 VFs
[22:28:35] [PASSED] 47 VFs
[22:28:35] [PASSED] 48 VFs
[22:28:35] [PASSED] 49 VFs
[22:28:35] [PASSED] 50 VFs
[22:28:35] [PASSED] 51 VFs
[22:28:35] [PASSED] 52 VFs
[22:28:35] [PASSED] 53 VFs
[22:28:35] [PASSED] 54 VFs
[22:28:35] [PASSED] 55 VFs
[22:28:35] [PASSED] 56 VFs
[22:28:35] [PASSED] 57 VFs
[22:28:35] [PASSED] 58 VFs
[22:28:35] [PASSED] 59 VFs
[22:28:35] [PASSED] 60 VFs
[22:28:35] [PASSED] 61 VFs
[22:28:35] [PASSED] 62 VFs
[22:28:35] [PASSED] 63 VFs
[22:28:35] ==================== [PASSED] fair_ggtt ====================
[22:28:35] ======================== fair_vram ========================
[22:28:35] [PASSED] 1 VF
[22:28:35] [PASSED] 2 VFs
[22:28:35] [PASSED] 3 VFs
[22:28:35] [PASSED] 4 VFs
[22:28:35] [PASSED] 5 VFs
[22:28:35] [PASSED] 6 VFs
[22:28:35] [PASSED] 7 VFs
[22:28:35] [PASSED] 8 VFs
[22:28:35] [PASSED] 9 VFs
[22:28:35] [PASSED] 10 VFs
[22:28:35] [PASSED] 11 VFs
[22:28:35] [PASSED] 12 VFs
[22:28:35] [PASSED] 13 VFs
[22:28:35] [PASSED] 14 VFs
[22:28:35] [PASSED] 15 VFs
[22:28:35] [PASSED] 16 VFs
[22:28:35] [PASSED] 17 VFs
[22:28:35] [PASSED] 18 VFs
[22:28:35] [PASSED] 19 VFs
[22:28:35] [PASSED] 20 VFs
[22:28:35] [PASSED] 21 VFs
[22:28:35] [PASSED] 22 VFs
[22:28:35] [PASSED] 23 VFs
[22:28:35] [PASSED] 24 VFs
[22:28:35] [PASSED] 25 VFs
[22:28:35] [PASSED] 26 VFs
[22:28:35] [PASSED] 27 VFs
[22:28:35] [PASSED] 28 VFs
[22:28:35] [PASSED] 29 VFs
[22:28:35] [PASSED] 30 VFs
[22:28:35] [PASSED] 31 VFs
[22:28:35] [PASSED] 32 VFs
[22:28:35] [PASSED] 33 VFs
[22:28:35] [PASSED] 34 VFs
[22:28:35] [PASSED] 35 VFs
[22:28:35] [PASSED] 36 VFs
[22:28:35] [PASSED] 37 VFs
[22:28:35] [PASSED] 38 VFs
[22:28:35] [PASSED] 39 VFs
[22:28:35] [PASSED] 40 VFs
[22:28:35] [PASSED] 41 VFs
[22:28:35] [PASSED] 42 VFs
[22:28:35] [PASSED] 43 VFs
[22:28:35] [PASSED] 44 VFs
[22:28:35] [PASSED] 45 VFs
[22:28:35] [PASSED] 46 VFs
[22:28:35] [PASSED] 47 VFs
[22:28:35] [PASSED] 48 VFs
[22:28:35] [PASSED] 49 VFs
[22:28:35] [PASSED] 50 VFs
[22:28:35] [PASSED] 51 VFs
[22:28:35] [PASSED] 52 VFs
[22:28:35] [PASSED] 53 VFs
[22:28:35] [PASSED] 54 VFs
[22:28:35] [PASSED] 55 VFs
[22:28:35] [PASSED] 56 VFs
[22:28:35] [PASSED] 57 VFs
[22:28:35] [PASSED] 58 VFs
[22:28:35] [PASSED] 59 VFs
[22:28:35] [PASSED] 60 VFs
[22:28:35] [PASSED] 61 VFs
[22:28:35] [PASSED] 62 VFs
[22:28:35] [PASSED] 63 VFs
[22:28:35] ==================== [PASSED] fair_vram ====================
[22:28:35] ================== [PASSED] pf_gt_config ===================
[22:28:35] ===================== lmtt (1 subtest) =====================
[22:28:35] ======================== test_ops =========================
[22:28:35] [PASSED] 2-level
[22:28:35] [PASSED] multi-level
[22:28:35] ==================== [PASSED] test_ops =====================
[22:28:35] ====================== [PASSED] lmtt =======================
[22:28:35] ================= sriov_packet (1 subtest) =================
[22:28:35] [PASSED] test_descriptor_init
[22:28:35] ================== [PASSED] sriov_packet ===================
[22:28:35] ================= pf_service (11 subtests) =================
[22:28:35] [PASSED] pf_negotiate_any
[22:28:35] [PASSED] pf_negotiate_base_match
[22:28:35] [PASSED] pf_negotiate_base_newer
[22:28:35] [PASSED] pf_negotiate_base_next
[22:28:35] [SKIPPED] pf_negotiate_base_older (no older minor)
[22:28:35] [PASSED] pf_negotiate_base_prev
[22:28:35] [PASSED] pf_negotiate_latest_match
[22:28:35] [PASSED] pf_negotiate_latest_newer
[22:28:35] [PASSED] pf_negotiate_latest_next
[22:28:35] [SKIPPED] pf_negotiate_latest_older (no older minor)
[22:28:35] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[22:28:35] =================== [PASSED] pf_service ====================
[22:28:35] ================= xe_guc_g2g (2 subtests) ==================
[22:28:35] ============== xe_live_guc_g2g_kunit_default ==============
[22:28:35] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:28:35] ============== xe_live_guc_g2g_kunit_allmem ===============
[22:28:35] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:28:35] =================== [SKIPPED] xe_guc_g2g ===================
[22:28:35] =================== xe_mocs (2 subtests) ===================
[22:28:35] ================ xe_live_mocs_kernel_kunit ================
[22:28:35] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:28:35] ================ xe_live_mocs_reset_kunit =================
[22:28:35] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:28:35] ==================== [SKIPPED] xe_mocs =====================
[22:28:35] ================= xe_migrate (2 subtests) ==================
[22:28:35] ================= xe_migrate_sanity_kunit =================
[22:28:35] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:28:35] ================== xe_validate_ccs_kunit ==================
[22:28:35] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:28:35] =================== [SKIPPED] xe_migrate ===================
[22:28:35] ================== xe_dma_buf (1 subtest) ==================
[22:28:35] ==================== xe_dma_buf_kunit =====================
[22:28:35] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:28:35] =================== [SKIPPED] xe_dma_buf ===================
[22:28:35] ================= xe_bo_shrink (1 subtest) =================
[22:28:35] =================== xe_bo_shrink_kunit ====================
[22:28:35] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:28:35] ================== [SKIPPED] xe_bo_shrink ==================
[22:28:35] ==================== xe_bo (2 subtests) ====================
[22:28:35] ================== xe_ccs_migrate_kunit ===================
[22:28:35] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:28:35] ==================== xe_bo_evict_kunit ====================
[22:28:35] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:28:35] ===================== [SKIPPED] xe_bo ======================
[22:28:35] ==================== args (13 subtests) ====================
[22:28:35] [PASSED] count_args_test
[22:28:35] [PASSED] call_args_example
[22:28:35] [PASSED] call_args_test
[22:28:35] [PASSED] drop_first_arg_example
[22:28:35] [PASSED] drop_first_arg_test
[22:28:35] [PASSED] first_arg_example
[22:28:35] [PASSED] first_arg_test
[22:28:35] [PASSED] last_arg_example
[22:28:35] [PASSED] last_arg_test
[22:28:35] [PASSED] pick_arg_example
[22:28:35] [PASSED] if_args_example
[22:28:35] [PASSED] if_args_test
[22:28:35] [PASSED] sep_comma_example
[22:28:35] ====================== [PASSED] args =======================
[22:28:35] =================== xe_pci (3 subtests) ====================
[22:28:35] ==================== check_graphics_ip ====================
[22:28:35] [PASSED] 12.00 Xe_LP
[22:28:35] [PASSED] 12.10 Xe_LP+
[22:28:35] [PASSED] 12.55 Xe_HPG
[22:28:35] [PASSED] 12.60 Xe_HPC
[22:28:35] [PASSED] 12.70 Xe_LPG
[22:28:35] [PASSED] 12.71 Xe_LPG
[22:28:35] [PASSED] 12.74 Xe_LPG+
[22:28:35] [PASSED] 20.01 Xe2_HPG
[22:28:35] [PASSED] 20.02 Xe2_HPG
[22:28:35] [PASSED] 20.04 Xe2_LPG
[22:28:35] [PASSED] 30.00 Xe3_LPG
[22:28:35] [PASSED] 30.01 Xe3_LPG
[22:28:35] [PASSED] 30.03 Xe3_LPG
[22:28:35] [PASSED] 30.04 Xe3_LPG
[22:28:35] [PASSED] 30.05 Xe3_LPG
[22:28:35] [PASSED] 35.10 Xe3p_LPG
[22:28:35] [PASSED] 35.11 Xe3p_XPC
[22:28:35] ================ [PASSED] check_graphics_ip ================
[22:28:35] ===================== check_media_ip ======================
[22:28:35] [PASSED] 12.00 Xe_M
[22:28:35] [PASSED] 12.55 Xe_HPM
[22:28:35] [PASSED] 13.00 Xe_LPM+
[22:28:35] [PASSED] 13.01 Xe2_HPM
[22:28:35] [PASSED] 20.00 Xe2_LPM
[22:28:35] [PASSED] 30.00 Xe3_LPM
[22:28:35] [PASSED] 30.02 Xe3_LPM
[22:28:35] [PASSED] 35.00 Xe3p_LPM
[22:28:35] [PASSED] 35.03 Xe3p_HPM
[22:28:35] ================= [PASSED] check_media_ip ==================
[22:28:35] =================== check_platform_desc ===================
[22:28:35] [PASSED] 0x9A60 (TIGERLAKE)
[22:28:35] [PASSED] 0x9A68 (TIGERLAKE)
[22:28:35] [PASSED] 0x9A70 (TIGERLAKE)
[22:28:35] [PASSED] 0x9A40 (TIGERLAKE)
[22:28:35] [PASSED] 0x9A49 (TIGERLAKE)
[22:28:35] [PASSED] 0x9A59 (TIGERLAKE)
[22:28:35] [PASSED] 0x9A78 (TIGERLAKE)
[22:28:35] [PASSED] 0x9AC0 (TIGERLAKE)
[22:28:35] [PASSED] 0x9AC9 (TIGERLAKE)
[22:28:35] [PASSED] 0x9AD9 (TIGERLAKE)
[22:28:35] [PASSED] 0x9AF8 (TIGERLAKE)
[22:28:35] [PASSED] 0x4C80 (ROCKETLAKE)
[22:28:35] [PASSED] 0x4C8A (ROCKETLAKE)
[22:28:35] [PASSED] 0x4C8B (ROCKETLAKE)
[22:28:35] [PASSED] 0x4C8C (ROCKETLAKE)
[22:28:35] [PASSED] 0x4C90 (ROCKETLAKE)
[22:28:35] [PASSED] 0x4C9A (ROCKETLAKE)
[22:28:35] [PASSED] 0x4680 (ALDERLAKE_S)
[22:28:35] [PASSED] 0x4682 (ALDERLAKE_S)
[22:28:35] [PASSED] 0x4688 (ALDERLAKE_S)
[22:28:35] [PASSED] 0x468A (ALDERLAKE_S)
[22:28:35] [PASSED] 0x468B (ALDERLAKE_S)
[22:28:35] [PASSED] 0x4690 (ALDERLAKE_S)
[22:28:35] [PASSED] 0x4692 (ALDERLAKE_S)
[22:28:35] [PASSED] 0x4693 (ALDERLAKE_S)
[22:28:35] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46AA (ALDERLAKE_P)
[22:28:35] [PASSED] 0x462A (ALDERLAKE_P)
[22:28:35] [PASSED] 0x4626 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x4628 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:28:35] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:28:35] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:28:35] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:28:35] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:28:35] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:28:35] [PASSED] 0xA721 (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA720 (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:28:35] [PASSED] 0xA780 (ALDERLAKE_S)
[22:28:35] [PASSED] 0xA781 (ALDERLAKE_S)
[22:28:35] [PASSED] 0xA782 (ALDERLAKE_S)
[22:28:35] [PASSED] 0xA783 (ALDERLAKE_S)
[22:28:35] [PASSED] 0xA788 (ALDERLAKE_S)
[22:28:35] [PASSED] 0xA789 (ALDERLAKE_S)
[22:28:35] [PASSED] 0xA78A (ALDERLAKE_S)
[22:28:35] [PASSED] 0xA78B (ALDERLAKE_S)
[22:28:35] [PASSED] 0x4905 (DG1)
[22:28:35] [PASSED] 0x4906 (DG1)
[22:28:35] [PASSED] 0x4907 (DG1)
[22:28:35] [PASSED] 0x4908 (DG1)
[22:28:35] [PASSED] 0x4909 (DG1)
[22:28:35] [PASSED] 0x56C0 (DG2)
[22:28:35] [PASSED] 0x56C2 (DG2)
[22:28:35] [PASSED] 0x56C1 (DG2)
[22:28:35] [PASSED] 0x7D51 (METEORLAKE)
[22:28:35] [PASSED] 0x7DD1 (METEORLAKE)
[22:28:35] [PASSED] 0x7D41 (METEORLAKE)
[22:28:35] [PASSED] 0x7D67 (METEORLAKE)
[22:28:35] [PASSED] 0xB640 (METEORLAKE)
[22:28:35] [PASSED] 0x56A0 (DG2)
[22:28:35] [PASSED] 0x56A1 (DG2)
[22:28:35] [PASSED] 0x56A2 (DG2)
[22:28:35] [PASSED] 0x56BE (DG2)
[22:28:35] [PASSED] 0x56BF (DG2)
[22:28:35] [PASSED] 0x5690 (DG2)
[22:28:35] [PASSED] 0x5691 (DG2)
[22:28:35] [PASSED] 0x5692 (DG2)
[22:28:35] [PASSED] 0x56A5 (DG2)
[22:28:35] [PASSED] 0x56A6 (DG2)
[22:28:35] [PASSED] 0x56B0 (DG2)
[22:28:35] [PASSED] 0x56B1 (DG2)
[22:28:35] [PASSED] 0x56BA (DG2)
[22:28:35] [PASSED] 0x56BB (DG2)
[22:28:35] [PASSED] 0x56BC (DG2)
[22:28:35] [PASSED] 0x56BD (DG2)
[22:28:35] [PASSED] 0x5693 (DG2)
[22:28:35] [PASSED] 0x5694 (DG2)
[22:28:35] [PASSED] 0x5695 (DG2)
[22:28:35] [PASSED] 0x56A3 (DG2)
[22:28:35] [PASSED] 0x56A4 (DG2)
[22:28:35] [PASSED] 0x56B2 (DG2)
[22:28:35] [PASSED] 0x56B3 (DG2)
[22:28:35] [PASSED] 0x5696 (DG2)
[22:28:35] [PASSED] 0x5697 (DG2)
[22:28:35] [PASSED] 0xB69 (PVC)
[22:28:35] [PASSED] 0xB6E (PVC)
[22:28:35] [PASSED] 0xBD4 (PVC)
[22:28:35] [PASSED] 0xBD5 (PVC)
[22:28:35] [PASSED] 0xBD6 (PVC)
[22:28:35] [PASSED] 0xBD7 (PVC)
[22:28:35] [PASSED] 0xBD8 (PVC)
[22:28:35] [PASSED] 0xBD9 (PVC)
[22:28:35] [PASSED] 0xBDA (PVC)
[22:28:35] [PASSED] 0xBDB (PVC)
[22:28:35] [PASSED] 0xBE0 (PVC)
[22:28:35] [PASSED] 0xBE1 (PVC)
[22:28:35] [PASSED] 0xBE5 (PVC)
[22:28:35] [PASSED] 0x7D40 (METEORLAKE)
[22:28:35] [PASSED] 0x7D45 (METEORLAKE)
[22:28:35] [PASSED] 0x7D55 (METEORLAKE)
[22:28:35] [PASSED] 0x7D60 (METEORLAKE)
[22:28:35] [PASSED] 0x7DD5 (METEORLAKE)
[22:28:35] [PASSED] 0x6420 (LUNARLAKE)
[22:28:35] [PASSED] 0x64A0 (LUNARLAKE)
[22:28:35] [PASSED] 0x64B0 (LUNARLAKE)
[22:28:35] [PASSED] 0xE202 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE209 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE20B (BATTLEMAGE)
[22:28:35] [PASSED] 0xE20C (BATTLEMAGE)
[22:28:35] [PASSED] 0xE20D (BATTLEMAGE)
[22:28:35] [PASSED] 0xE210 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE211 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE212 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE216 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE220 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE221 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE222 (BATTLEMAGE)
[22:28:35] [PASSED] 0xE223 (BATTLEMAGE)
[22:28:35] [PASSED] 0xB080 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB081 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB082 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB083 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB084 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB085 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB086 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB087 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB08F (PANTHERLAKE)
[22:28:35] [PASSED] 0xB090 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:28:35] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:28:35] [PASSED] 0xFD80 (PANTHERLAKE)
[22:28:35] [PASSED] 0xFD81 (PANTHERLAKE)
[22:28:35] [PASSED] 0xD740 (NOVALAKE_S)
[22:28:35] [PASSED] 0xD741 (NOVALAKE_S)
[22:28:35] [PASSED] 0xD742 (NOVALAKE_S)
[22:28:35] [PASSED] 0xD743 (NOVALAKE_S)
[22:28:35] [PASSED] 0xD745 (NOVALAKE_S)
[22:28:35] [PASSED] 0xD74A (NOVALAKE_S)
[22:28:35] [PASSED] 0xD74B (NOVALAKE_S)
[22:28:35] [PASSED] 0x674C (CRESCENTISLAND)
[22:28:35] [PASSED] 0x674D (CRESCENTISLAND)
[22:28:35] [PASSED] 0x674E (CRESCENTISLAND)
[22:28:35] [PASSED] 0x674F (CRESCENTISLAND)
[22:28:35] [PASSED] 0x6750 (CRESCENTISLAND)
[22:28:35] [PASSED] 0xD750 (NOVALAKE_P)
[22:28:35] [PASSED] 0xD751 (NOVALAKE_P)
[22:28:35] [PASSED] 0xD752 (NOVALAKE_P)
[22:28:35] [PASSED] 0xD753 (NOVALAKE_P)
[22:28:35] [PASSED] 0xD754 (NOVALAKE_P)
[22:28:35] [PASSED] 0xD755 (NOVALAKE_P)
[22:28:35] [PASSED] 0xD756 (NOVALAKE_P)
[22:28:35] [PASSED] 0xD757 (NOVALAKE_P)
[22:28:35] [PASSED] 0xD75F (NOVALAKE_P)
[22:28:35] =============== [PASSED] check_platform_desc ===============
[22:28:35] ===================== [PASSED] xe_pci ======================
[22:28:35] ============= xe_rtp_tables_test (5 subtests) ==============
[22:28:35] ================== xe_rtp_table_gt_test ===================
[22:28:35] [PASSED] gt_was/14011060649
[22:28:35] [PASSED] gt_was/14011059788
[22:28:35] [PASSED] gt_was/14015795083
[22:28:35] [PASSED] gt_was/16021867713
[22:28:35] [PASSED] gt_was/14019449301
[22:28:35] [PASSED] gt_was/16028005424
[22:28:35] [PASSED] gt_was/14026578760
[22:28:35] [PASSED] gt_was/1409420604
[22:28:35] [PASSED] gt_was/1408615072
[22:28:35] [PASSED] gt_was/22010523718
[22:28:35] [PASSED] gt_was/14011006942
[22:28:35] [PASSED] gt_was/14014830051
[22:28:35] [PASSED] gt_was/18018781329
[22:28:35] [PASSED] gt_was/1509235366
[22:28:35] [PASSED] gt_was/18018781329
[22:28:35] [PASSED] gt_was/16016694945
[22:28:35] [PASSED] gt_was/14018575942
[22:28:35] [PASSED] gt_was/22016670082
[22:28:35] [PASSED] gt_was/22016670082
[22:28:35] [PASSED] gt_was/14017421178
[22:28:35] [PASSED] gt_was/16025250150
[22:28:35] [PASSED] gt_was/14021871409
[22:28:35] [PASSED] gt_was/16021865536
[22:28:35] [PASSED] gt_was/14021486841
[22:28:35] [PASSED] gt_was/14025160223
[22:28:35] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[22:28:35] [PASSED] gt_was/14025635424
[22:28:35] [PASSED] gt_was/16028005424
[22:28:35] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:28:35] ================== xe_rtp_table_gt_test ===================
[22:28:35] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[22:28:35] [PASSED] gt_tunings/Tuning: 32B Access Enable
[22:28:35] [PASSED] gt_tunings/Tuning: L3 cache
[22:28:35] [PASSED] gt_tunings/Tuning: L3 cache - media
[22:28:35] [PASSED] gt_tunings/Tuning: Compression Overfetch
[22:28:35] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[22:28:35] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[22:28:35] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[22:28:35] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[22:28:35] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[22:28:35] [PASSED] gt_tunings/Tuning: Stateless compression control
[22:28:35] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[22:28:35] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[22:28:35] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[22:28:35] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[22:28:35] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:28:35] ================== xe_rtp_table_oob_test ==================
[22:28:35] [PASSED] oob_was/1607983814
[22:28:35] [PASSED] oob_was/16010904313
[22:28:35] [PASSED] oob_was/18022495364
[22:28:35] [PASSED] oob_was/22012773006
[22:28:35] [PASSED] oob_was/14014475959
[22:28:35] [PASSED] oob_was/22011391025
[22:28:35] [PASSED] oob_was/22012727170
[22:28:35] [PASSED] oob_was/22012727685
[22:28:35] [PASSED] oob_was/22016596838
[22:28:35] [PASSED] oob_was/18020744125
[22:28:35] [PASSED] oob_was/1409600907
[22:28:35] [PASSED] oob_was/22014953428
[22:28:35] [PASSED] oob_was/16017236439
[22:28:35] [PASSED] oob_was/14019821291
[22:28:35] [PASSED] oob_was/14015076503
[22:28:35] [PASSED] oob_was/14018913170
[22:28:35] [PASSED] oob_was/14018094691
[22:28:35] [PASSED] oob_was/18024947630
[22:28:35] [PASSED] oob_was/16022287689
[22:28:35] [PASSED] oob_was/13011645652
[22:28:35] [PASSED] oob_was/14022293748
[22:28:35] [PASSED] oob_was/22019794406
[22:28:35] [PASSED] oob_was/22019338487
[22:28:35] [PASSED] oob_was/16023588340
[22:28:35] [PASSED] oob_was/14019789679
[22:28:35] [PASSED] oob_was/14022866841
[22:28:35] [PASSED] oob_was/16021333562
[22:28:35] [PASSED] oob_was/14016712196
[22:28:35] [PASSED] oob_was/14015568240
[22:28:35] [PASSED] oob_was/18013179988
[22:28:35] [PASSED] oob_was/1508761755
[22:28:35] [PASSED] oob_was/16023105232
[22:28:35] [PASSED] oob_was/16026508708
[22:28:35] [PASSED] oob_was/14020001231
[22:28:35] [PASSED] oob_was/16023683509
[22:28:35] [PASSED] oob_was/14025515070
[22:28:35] [PASSED] oob_was/15015404425_disable
[22:28:35] [PASSED] oob_was/16026007364
[22:28:35] [PASSED] oob_was/14020316580
[22:28:35] [PASSED] oob_was/14025883347
[22:28:35] [PASSED] oob_was/16029380221
[22:28:35] [PASSED] oob_was/22022079272
[22:28:35] [PASSED] oob_was/16029897822
[22:28:35] [PASSED] oob_was/14027054324
[22:28:35] ============== [PASSED] xe_rtp_table_oob_test ==============
[22:28:35] ================ xe_rtp_table_dev_oob_test ================
[22:28:35] [PASSED] device_oob_was/22010954014
[22:28:35] [PASSED] device_oob_was/15015404425
[22:28:35] [PASSED] device_oob_was/22019338487_display
[22:28:35] [PASSED] device_oob_was/14022085890
[22:28:35] [PASSED] device_oob_was/14026539277
[22:28:35] [PASSED] device_oob_was/14026633728
[22:28:35] [PASSED] device_oob_was/14026746987
[22:28:35] [PASSED] device_oob_was/14026779378
[22:28:35] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[22:28:35] ========== xe_rtp_table_missing_upper_bound_test ==========
[22:28:35] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[22:28:35] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[22:28:35] [PASSED] register_whitelist/1806527549
[22:28:35] [PASSED] register_whitelist/allow_read_ctx_timestamp
[22:28:35] [PASSED] register_whitelist/allow_read_queue_timestamp
[22:28:35] [PASSED] register_whitelist/16014440446
[22:28:35] [PASSED] register_whitelist/16017236439
[22:28:35] [PASSED] register_whitelist/16020183090
[22:28:35] [PASSED] register_whitelist/14024997852
[22:28:35] [PASSED] register_whitelist/14024997852
[22:28:35] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[22:28:35] =============== [PASSED] xe_rtp_tables_test ================
[22:28:35] =================== xe_rtp (3 subtests) ====================
[22:28:35] =================== xe_rtp_rules_tests ====================
[22:28:35] [PASSED] no
[22:28:35] [PASSED] yes
[22:28:35] [PASSED] no-and-no
[22:28:35] [PASSED] no-and-yes
[22:28:35] [PASSED] yes-and-no
[22:28:35] [PASSED] yes-and-yes
[22:28:35] [PASSED] no-or-no
[22:28:35] [PASSED] no-or-yes
[22:28:35] [PASSED] yes-or-no
[22:28:35] [PASSED] yes-or-yes
[22:28:35] [PASSED] no-yes-or-yes-no
[22:28:35] [PASSED] no-yes-or-yes-yes
[22:28:35] [PASSED] yes-yes-or-no-yes
[22:28:35] [PASSED] yes-yes-or-yes-yes
[22:28:35] [PASSED] no-no-or-yes-or-no
[22:28:35] [PASSED] or
[22:28:35] [PASSED] or-yes
[22:28:35] [PASSED] or-no
[22:28:35] [PASSED] yes-or
[22:28:35] [PASSED] no-or
[22:28:35] [PASSED] no-or-or-yes
[22:28:35] [PASSED] yes-or-or-no
[22:28:35] [PASSED] no-or-or-no
[22:28:35] [PASSED] missing-context-engine-class
[22:28:35] [PASSED] missing-context-engine-class-or-yes
[22:28:35] [PASSED] missing-context-engine-class-or-or-yes
[22:28:35] =============== [PASSED] xe_rtp_rules_tests ================
[22:28:35] =============== xe_rtp_process_to_sr_tests ================
[22:28:35] [PASSED] coalesce-same-reg
[22:28:35] [PASSED] coalesce-same-reg-literal-and-func
[22:28:35] [PASSED] no-match-no-add
[22:28:35] [PASSED] two-regs-two-entries
[22:28:35] [PASSED] clr-one-set-other
[22:28:35] [PASSED] set-field
[22:28:35] [PASSED] conflict-duplicate
[22:28:35] [PASSED] conflict-not-disjoint
[22:28:35] [PASSED] conflict-not-disjoint-literal-and-func
[22:28:35] [PASSED] conflict-reg-type
[22:28:35] [PASSED] bad-mcr-reg-forced-to-regular
[22:28:35] [PASSED] bad-regular-reg-forced-to-mcr
[22:28:35] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:28:35] ================== xe_rtp_process_tests ===================
[22:28:35] [PASSED] active1
[22:28:35] [PASSED] active2
[22:28:35] [PASSED] active-inactive
[22:28:35] [PASSED] inactive-active
[22:28:35] [PASSED] inactive-active-inactive
[22:28:35] [PASSED] inactive-inactive-inactive
[22:28:35] ============== [PASSED] xe_rtp_process_tests ===============
[22:28:35] ===================== [PASSED] xe_rtp ======================
[22:28:35] ==================== xe_wa (1 subtest) =====================
[22:28:35] ======================== xe_wa_gt =========================
[22:28:35] [PASSED] TIGERLAKE B0
[22:28:35] [PASSED] DG1 A0
[22:28:35] [PASSED] DG1 B0
[22:28:35] [PASSED] ALDERLAKE_S A0
[22:28:35] [PASSED] ALDERLAKE_S B0
[22:28:35] [PASSED] ALDERLAKE_S C0
[22:28:35] [PASSED] ALDERLAKE_S D0
[22:28:35] [PASSED] ALDERLAKE_P A0
[22:28:35] [PASSED] ALDERLAKE_P B0
[22:28:35] [PASSED] ALDERLAKE_P C0
[22:28:35] [PASSED] ALDERLAKE_S RPLS D0
[22:28:35] [PASSED] ALDERLAKE_P RPLU E0
[22:28:35] [PASSED] DG2 G10 C0
[22:28:35] [PASSED] DG2 G11 B1
[22:28:35] [PASSED] DG2 G12 A1
[22:28:35] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:28:35] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:28:35] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:28:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:28:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:28:35] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:28:35] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:28:35] ==================== [PASSED] xe_wa_gt =====================
[22:28:35] ====================== [PASSED] xe_wa ======================
[22:28:35] ============================================================
[22:28:35] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[22:28:35] Elapsed time: 36.743s total, 4.404s configuring, 31.669s building, 0.648s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:28:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:28:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:29:02] Starting KUnit Kernel (1/1)...
[22:29:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:29:02] ============ drm_test_pick_cmdline (2 subtests) ============
[22:29:02] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:29:02] =============== drm_test_pick_cmdline_named ===============
[22:29:02] [PASSED] NTSC
[22:29:02] [PASSED] NTSC-J
[22:29:02] [PASSED] PAL
[22:29:02] [PASSED] PAL-M
[22:29:02] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:29:02] ============== [PASSED] drm_test_pick_cmdline ==============
[22:29:02] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:29:02] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:29:02] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:29:02] =========== drm_validate_clone_mode (2 subtests) ===========
[22:29:02] ============== drm_test_check_in_clone_mode ===============
[22:29:02] [PASSED] in_clone_mode
[22:29:02] [PASSED] not_in_clone_mode
[22:29:02] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:29:02] =============== drm_test_check_valid_clones ===============
[22:29:02] [PASSED] not_in_clone_mode
[22:29:02] [PASSED] valid_clone
[22:29:02] [PASSED] invalid_clone
[22:29:02] =========== [PASSED] drm_test_check_valid_clones ===========
[22:29:02] ============= [PASSED] drm_validate_clone_mode =============
[22:29:02] ============= drm_validate_modeset (1 subtest) =============
[22:29:02] [PASSED] drm_test_check_connector_changed_modeset
[22:29:02] ============== [PASSED] drm_validate_modeset ===============
[22:29:02] ====== drm_test_bridge_get_current_state (1 subtest) =======
[22:29:02] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:29:02] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:29:02] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:29:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:29:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:29:02] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[22:29:02] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:29:02] ============== drm_bridge_alloc (2 subtests) ===============
[22:29:02] [PASSED] drm_test_drm_bridge_alloc_basic
[22:29:02] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:29:02] ================ [PASSED] drm_bridge_alloc =================
[22:29:02] ============= drm_bridge_bus_fmt (5 subtests) ==============
[22:29:02] [PASSED] drm_test_bridge_rgb_yuv_rgb
[22:29:02] [PASSED] drm_test_bridge_must_convert_to_yuv444
[22:29:02] [PASSED] drm_test_bridge_hdmi_auto_rgb
[22:29:02] [PASSED] drm_test_bridge_auto_first
[22:29:02] [PASSED] drm_test_bridge_rgb_yuv_no_path
[22:29:02] =============== [PASSED] drm_bridge_bus_fmt ================
[22:29:02] ============= drm_cmdline_parser (40 subtests) =============
[22:29:02] [PASSED] drm_test_cmdline_force_d_only
[22:29:02] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:29:02] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:29:02] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:29:02] [PASSED] drm_test_cmdline_force_e_only
[22:29:02] [PASSED] drm_test_cmdline_res
[22:29:02] [PASSED] drm_test_cmdline_res_vesa
[22:29:02] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:29:02] [PASSED] drm_test_cmdline_res_rblank
[22:29:02] [PASSED] drm_test_cmdline_res_bpp
[22:29:02] [PASSED] drm_test_cmdline_res_refresh
[22:29:02] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:29:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:29:02] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:29:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:29:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:29:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:29:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:29:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:29:02] [PASSED] drm_test_cmdline_res_margins_force_on
[22:29:02] [PASSED] drm_test_cmdline_res_vesa_margins
[22:29:02] [PASSED] drm_test_cmdline_name
[22:29:02] [PASSED] drm_test_cmdline_name_bpp
[22:29:02] [PASSED] drm_test_cmdline_name_option
[22:29:02] [PASSED] drm_test_cmdline_name_bpp_option
[22:29:02] [PASSED] drm_test_cmdline_rotate_0
[22:29:02] [PASSED] drm_test_cmdline_rotate_90
[22:29:02] [PASSED] drm_test_cmdline_rotate_180
[22:29:02] [PASSED] drm_test_cmdline_rotate_270
[22:29:02] [PASSED] drm_test_cmdline_hmirror
[22:29:02] [PASSED] drm_test_cmdline_vmirror
[22:29:02] [PASSED] drm_test_cmdline_margin_options
[22:29:02] [PASSED] drm_test_cmdline_multiple_options
[22:29:02] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:29:02] [PASSED] drm_test_cmdline_extra_and_option
[22:29:02] [PASSED] drm_test_cmdline_freestanding_options
[22:29:02] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:29:02] [PASSED] drm_test_cmdline_panel_orientation
[22:29:02] ================ drm_test_cmdline_invalid =================
[22:29:02] [PASSED] margin_only
[22:29:02] [PASSED] interlace_only
[22:29:02] [PASSED] res_missing_x
[22:29:02] [PASSED] res_missing_y
[22:29:02] [PASSED] res_bad_y
[22:29:02] [PASSED] res_missing_y_bpp
[22:29:02] [PASSED] res_bad_bpp
[22:29:02] [PASSED] res_bad_refresh
[22:29:02] [PASSED] res_bpp_refresh_force_on_off
[22:29:02] [PASSED] res_invalid_mode
[22:29:02] [PASSED] res_bpp_wrong_place_mode
[22:29:02] [PASSED] name_bpp_refresh
[22:29:02] [PASSED] name_refresh
[22:29:02] [PASSED] name_refresh_wrong_mode
[22:29:02] [PASSED] name_refresh_invalid_mode
[22:29:02] [PASSED] rotate_multiple
[22:29:02] [PASSED] rotate_invalid_val
[22:29:02] [PASSED] rotate_truncated
[22:29:02] [PASSED] invalid_option
[22:29:02] [PASSED] invalid_tv_option
[22:29:02] [PASSED] truncated_tv_option
[22:29:02] ============ [PASSED] drm_test_cmdline_invalid =============
[22:29:02] =============== drm_test_cmdline_tv_options ===============
[22:29:02] [PASSED] NTSC
[22:29:02] [PASSED] NTSC_443
[22:29:02] [PASSED] NTSC_J
[22:29:02] [PASSED] PAL
[22:29:02] [PASSED] PAL_M
[22:29:02] [PASSED] PAL_N
[22:29:02] [PASSED] SECAM
[22:29:02] [PASSED] MONO_525
[22:29:02] [PASSED] MONO_625
[22:29:02] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:29:02] =============== [PASSED] drm_cmdline_parser ================
[22:29:02] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:29:02] [PASSED] drm_test_connector_hdmi_init_valid
[22:29:02] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:29:02] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:29:02] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:29:02] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:29:02] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:29:02] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:29:02] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:29:02] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:29:02] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:29:02] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:29:02] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:29:02] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:29:02] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:29:02] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:29:02] [PASSED] drm_test_connector_hdmi_init_null_product
[22:29:02] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:29:02] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:29:02] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:29:02] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:29:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:29:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:29:02] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:29:02] ========= drm_test_connector_hdmi_init_type_valid =========
[22:29:02] [PASSED] HDMI-A
[22:29:02] [PASSED] HDMI-B
[22:29:02] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:29:02] ======== drm_test_connector_hdmi_init_type_invalid ========
[22:29:02] [PASSED] Unknown
[22:29:02] [PASSED] VGA
[22:29:02] [PASSED] DVI-I
[22:29:02] [PASSED] DVI-D
[22:29:02] [PASSED] DVI-A
[22:29:02] [PASSED] Composite
[22:29:02] [PASSED] SVIDEO
[22:29:02] [PASSED] LVDS
[22:29:02] [PASSED] Component
[22:29:02] [PASSED] DIN
[22:29:02] [PASSED] DP
[22:29:02] [PASSED] TV
[22:29:02] [PASSED] eDP
[22:29:02] [PASSED] Virtual
[22:29:02] [PASSED] DSI
[22:29:02] [PASSED] DPI
[22:29:02] [PASSED] Writeback
[22:29:02] [PASSED] SPI
[22:29:02] [PASSED] USB
[22:29:02] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:29:02] ============ [PASSED] drmm_connector_hdmi_init =============
[22:29:02] ============= drmm_connector_init (3 subtests) =============
[22:29:02] [PASSED] drm_test_drmm_connector_init
[22:29:02] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:29:02] ========= drm_test_drmm_connector_init_type_valid =========
[22:29:02] [PASSED] Unknown
[22:29:02] [PASSED] VGA
[22:29:02] [PASSED] DVI-I
[22:29:02] [PASSED] DVI-D
[22:29:02] [PASSED] DVI-A
[22:29:02] [PASSED] Composite
[22:29:02] [PASSED] SVIDEO
[22:29:02] [PASSED] LVDS
[22:29:02] [PASSED] Component
[22:29:02] [PASSED] DIN
[22:29:02] [PASSED] DP
[22:29:02] [PASSED] HDMI-A
[22:29:02] [PASSED] HDMI-B
[22:29:02] [PASSED] TV
[22:29:02] [PASSED] eDP
[22:29:02] [PASSED] Virtual
[22:29:02] [PASSED] DSI
[22:29:02] [PASSED] DPI
[22:29:02] [PASSED] Writeback
[22:29:02] [PASSED] SPI
[22:29:02] [PASSED] USB
[22:29:02] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:29:02] =============== [PASSED] drmm_connector_init ===============
[22:29:02] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_init
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:29:02] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[22:29:02] [PASSED] Unknown
[22:29:02] [PASSED] VGA
[22:29:02] [PASSED] DVI-I
[22:29:02] [PASSED] DVI-D
[22:29:02] [PASSED] DVI-A
[22:29:02] [PASSED] Composite
[22:29:02] [PASSED] SVIDEO
[22:29:02] [PASSED] LVDS
[22:29:02] [PASSED] Component
[22:29:02] [PASSED] DIN
[22:29:02] [PASSED] DP
[22:29:02] [PASSED] HDMI-A
[22:29:02] [PASSED] HDMI-B
[22:29:02] [PASSED] TV
[22:29:02] [PASSED] eDP
[22:29:02] [PASSED] Virtual
[22:29:02] [PASSED] DSI
[22:29:02] [PASSED] DPI
[22:29:02] [PASSED] Writeback
[22:29:02] [PASSED] SPI
[22:29:02] [PASSED] USB
[22:29:02] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:29:02] ======== drm_test_drm_connector_dynamic_init_name =========
[22:29:02] [PASSED] Unknown
[22:29:02] [PASSED] VGA
[22:29:02] [PASSED] DVI-I
[22:29:02] [PASSED] DVI-D
[22:29:02] [PASSED] DVI-A
[22:29:02] [PASSED] Composite
[22:29:02] [PASSED] SVIDEO
[22:29:02] [PASSED] LVDS
[22:29:02] [PASSED] Component
[22:29:02] [PASSED] DIN
[22:29:02] [PASSED] DP
[22:29:02] [PASSED] HDMI-A
[22:29:02] [PASSED] HDMI-B
[22:29:02] [PASSED] TV
[22:29:02] [PASSED] eDP
[22:29:02] [PASSED] Virtual
[22:29:02] [PASSED] DSI
[22:29:02] [PASSED] DPI
[22:29:02] [PASSED] Writeback
[22:29:02] [PASSED] SPI
[22:29:02] [PASSED] USB
[22:29:02] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:29:02] =========== [PASSED] drm_connector_dynamic_init ============
[22:29:02] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:29:02] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:29:02] ======= drm_connector_dynamic_register (7 subtests) ========
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:29:02] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:29:02] ========= [PASSED] drm_connector_dynamic_register ==========
[22:29:02] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:29:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:29:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:29:02] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:29:02] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:29:02] ========== drm_test_get_tv_mode_from_name_valid ===========
[22:29:02] [PASSED] NTSC
[22:29:02] [PASSED] NTSC-443
[22:29:02] [PASSED] NTSC-J
[22:29:02] [PASSED] PAL
[22:29:02] [PASSED] PAL-M
[22:29:02] [PASSED] PAL-N
[22:29:02] [PASSED] SECAM
[22:29:02] [PASSED] Mono
[22:29:02] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:29:02] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:29:02] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:29:02] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:29:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:29:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:29:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:29:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:29:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:29:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:29:02] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[22:29:02] [PASSED] VIC 96
[22:29:02] [PASSED] VIC 97
[22:29:02] [PASSED] VIC 101
[22:29:02] [PASSED] VIC 102
[22:29:02] [PASSED] VIC 106
[22:29:02] [PASSED] VIC 107
[22:29:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:29:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:29:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:29:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:29:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:29:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:29:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:29:02] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:29:02] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[22:29:02] [PASSED] Automatic
[22:29:02] [PASSED] Full
[22:29:02] [PASSED] Limited 16:235
[22:29:02] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:29:02] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:29:02] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:29:02] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:29:02] === drm_test_drm_hdmi_connector_get_output_format_name ====
[22:29:02] [PASSED] RGB
[22:29:02] [PASSED] YUV 4:2:0
[22:29:02] [PASSED] YUV 4:2:2
[22:29:02] [PASSED] YUV 4:4:4
[22:29:02] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:29:02] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:29:02] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:29:02] ============= drm_damage_helper (21 subtests) ==============
[22:29:02] [PASSED] drm_test_damage_iter_no_damage
[22:29:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:29:02] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:29:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:29:02] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:29:02] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:29:02] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:29:02] [PASSED] drm_test_damage_iter_simple_damage
[22:29:02] [PASSED] drm_test_damage_iter_single_damage
[22:29:02] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:29:02] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:29:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:29:02] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:29:02] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:29:02] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:29:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:29:02] [PASSED] drm_test_damage_iter_damage
[22:29:02] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:29:02] [PASSED] drm_test_damage_iter_damage_one_outside
[22:29:02] [PASSED] drm_test_damage_iter_damage_src_moved
[22:29:02] [PASSED] drm_test_damage_iter_damage_not_visible
[22:29:02] ================ [PASSED] drm_damage_helper ================
[22:29:02] ============== drm_dp_mst_helper (3 subtests) ==============
[22:29:02] ============== drm_test_dp_mst_calc_pbn_mode ==============
[22:29:02] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:29:02] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:29:02] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:29:02] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:29:02] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:29:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:29:02] ============== drm_test_dp_mst_calc_pbn_div ===============
[22:29:02] [PASSED] Link rate 2000000 lane count 4
[22:29:02] [PASSED] Link rate 2000000 lane count 2
[22:29:02] [PASSED] Link rate 2000000 lane count 1
[22:29:02] [PASSED] Link rate 1350000 lane count 4
[22:29:02] [PASSED] Link rate 1350000 lane count 2
[22:29:02] [PASSED] Link rate 1350000 lane count 1
[22:29:02] [PASSED] Link rate 1000000 lane count 4
[22:29:02] [PASSED] Link rate 1000000 lane count 2
[22:29:02] [PASSED] Link rate 1000000 lane count 1
[22:29:02] [PASSED] Link rate 810000 lane count 4
[22:29:02] [PASSED] Link rate 810000 lane count 2
[22:29:02] [PASSED] Link rate 810000 lane count 1
[22:29:02] [PASSED] Link rate 540000 lane count 4
[22:29:02] [PASSED] Link rate 540000 lane count 2
[22:29:02] [PASSED] Link rate 540000 lane count 1
[22:29:02] [PASSED] Link rate 270000 lane count 4
[22:29:02] [PASSED] Link rate 270000 lane count 2
[22:29:02] [PASSED] Link rate 270000 lane count 1
[22:29:02] [PASSED] Link rate 162000 lane count 4
[22:29:02] [PASSED] Link rate 162000 lane count 2
[22:29:02] [PASSED] Link rate 162000 lane count 1
[22:29:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:29:02] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[22:29:02] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:29:02] [PASSED] DP_POWER_UP_PHY with port number
[22:29:02] [PASSED] DP_POWER_DOWN_PHY with port number
[22:29:02] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:29:02] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:29:02] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:29:02] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:29:02] [PASSED] DP_QUERY_PAYLOAD with port number
[22:29:02] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:29:02] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:29:02] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:29:02] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:29:02] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:29:02] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:29:02] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:29:02] [PASSED] DP_REMOTE_I2C_READ with port number
[22:29:02] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:29:02] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:29:02] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:29:02] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:29:02] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:29:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:29:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:29:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:29:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:29:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:29:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:29:02] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:29:02] ================ [PASSED] drm_dp_mst_helper ================
[22:29:02] ================== drm_exec (7 subtests) ===================
[22:29:02] [PASSED] sanitycheck
[22:29:02] [PASSED] test_lock
[22:29:02] [PASSED] test_lock_unlock
[22:29:02] [PASSED] test_duplicates
[22:29:02] [PASSED] test_prepare
[22:29:02] [PASSED] test_prepare_array
[22:29:02] [PASSED] test_multiple_loops
[22:29:02] ==================== [PASSED] drm_exec =====================
[22:29:02] =========== drm_format_helper_test (17 subtests) ===========
[22:29:02] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:29:02] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:29:02] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:29:02] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:29:02] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:29:02] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:29:02] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:29:02] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:29:02] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:29:02] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:29:02] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:29:02] ============== drm_test_fb_xrgb8888_to_mono ===============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:29:02] ==================== drm_test_fb_swab =====================
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ================ [PASSED] drm_test_fb_swab =================
[22:29:02] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:29:02] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[22:29:02] [PASSED] single_pixel_source_buffer
[22:29:02] [PASSED] single_pixel_clip_rectangle
[22:29:02] [PASSED] well_known_colors
[22:29:02] [PASSED] destination_pitch
[22:29:02] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:29:02] ================= drm_test_fb_clip_offset =================
[22:29:02] [PASSED] pass through
[22:29:02] [PASSED] horizontal offset
[22:29:02] [PASSED] vertical offset
[22:29:02] [PASSED] horizontal and vertical offset
[22:29:02] [PASSED] horizontal offset (custom pitch)
[22:29:02] [PASSED] vertical offset (custom pitch)
[22:29:02] [PASSED] horizontal and vertical offset (custom pitch)
[22:29:02] ============= [PASSED] drm_test_fb_clip_offset =============
[22:29:02] =================== drm_test_fb_memcpy ====================
[22:29:02] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:29:02] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:29:02] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:29:02] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:29:02] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:29:02] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:29:02] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:29:02] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:29:02] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:29:02] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:29:02] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:29:02] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:29:02] =============== [PASSED] drm_test_fb_memcpy ================
[22:29:02] ============= [PASSED] drm_format_helper_test ==============
[22:29:02] ================= drm_format (18 subtests) =================
[22:29:02] [PASSED] drm_test_format_block_width_invalid
[22:29:02] [PASSED] drm_test_format_block_width_one_plane
[22:29:02] [PASSED] drm_test_format_block_width_two_plane
[22:29:02] [PASSED] drm_test_format_block_width_three_plane
[22:29:02] [PASSED] drm_test_format_block_width_tiled
[22:29:02] [PASSED] drm_test_format_block_height_invalid
[22:29:02] [PASSED] drm_test_format_block_height_one_plane
[22:29:02] [PASSED] drm_test_format_block_height_two_plane
[22:29:02] [PASSED] drm_test_format_block_height_three_plane
[22:29:02] [PASSED] drm_test_format_block_height_tiled
[22:29:02] [PASSED] drm_test_format_min_pitch_invalid
[22:29:02] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:29:02] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:29:02] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:29:02] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:29:02] [PASSED] drm_test_format_min_pitch_two_plane
[22:29:02] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:29:02] [PASSED] drm_test_format_min_pitch_tiled
[22:29:02] =================== [PASSED] drm_format ====================
[22:29:02] ============== drm_framebuffer (10 subtests) ===============
[22:29:02] ========== drm_test_framebuffer_check_src_coords ==========
[22:29:02] [PASSED] Success: source fits into fb
[22:29:02] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:29:02] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:29:02] [PASSED] Fail: overflowing fb with source width
[22:29:02] [PASSED] Fail: overflowing fb with source height
[22:29:02] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:29:02] [PASSED] drm_test_framebuffer_cleanup
[22:29:02] =============== drm_test_framebuffer_create ===============
[22:29:02] [PASSED] ABGR8888 normal sizes
[22:29:02] [PASSED] ABGR8888 max sizes
[22:29:02] [PASSED] ABGR8888 pitch greater than min required
[22:29:02] [PASSED] ABGR8888 pitch less than min required
[22:29:02] [PASSED] ABGR8888 Invalid width
[22:29:02] [PASSED] ABGR8888 Invalid buffer handle
[22:29:02] [PASSED] No pixel format
[22:29:02] [PASSED] ABGR8888 Width 0
[22:29:02] [PASSED] ABGR8888 Height 0
[22:29:02] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:29:02] [PASSED] ABGR8888 Large buffer offset
[22:29:02] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:29:02] [PASSED] ABGR8888 Invalid flag
[22:29:02] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:29:02] [PASSED] ABGR8888 Valid buffer modifier
[22:29:02] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:29:02] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:29:02] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:29:02] [PASSED] NV12 Normal sizes
[22:29:02] [PASSED] NV12 Max sizes
[22:29:02] [PASSED] NV12 Invalid pitch
[22:29:02] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:29:02] [PASSED] NV12 different modifier per-plane
[22:29:02] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:29:02] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:29:02] [PASSED] NV12 Modifier for inexistent plane
[22:29:02] [PASSED] NV12 Handle for inexistent plane
[22:29:02] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:29:02] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:29:02] [PASSED] YVU420 Normal sizes
[22:29:02] [PASSED] YVU420 Max sizes
[22:29:02] [PASSED] YVU420 Invalid pitch
[22:29:02] [PASSED] YVU420 Different pitches
[22:29:02] [PASSED] YVU420 Different buffer offsets/pitches
[22:29:02] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:29:02] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:29:02] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:29:02] [PASSED] YVU420 Valid modifier
[22:29:02] [PASSED] YVU420 Different modifiers per plane
[22:29:02] [PASSED] YVU420 Modifier for inexistent plane
[22:29:02] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:29:02] [PASSED] X0L2 Normal sizes
[22:29:02] [PASSED] X0L2 Max sizes
[22:29:02] [PASSED] X0L2 Invalid pitch
[22:29:02] [PASSED] X0L2 Pitch greater than minimum required
[22:29:02] [PASSED] X0L2 Handle for inexistent plane
[22:29:02] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:29:02] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:29:02] [PASSED] X0L2 Valid modifier
[22:29:02] [PASSED] X0L2 Modifier for inexistent plane
[22:29:02] =========== [PASSED] drm_test_framebuffer_create ===========
[22:29:02] [PASSED] drm_test_framebuffer_free
[22:29:02] [PASSED] drm_test_framebuffer_init
[22:29:02] [PASSED] drm_test_framebuffer_init_bad_format
[22:29:02] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:29:02] [PASSED] drm_test_framebuffer_lookup
[22:29:02] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:29:02] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:29:02] ================= [PASSED] drm_framebuffer =================
[22:29:02] ================ drm_gem_shmem (8 subtests) ================
[22:29:02] [PASSED] drm_gem_shmem_test_obj_create
[22:29:02] [PASSED] drm_gem_shmem_test_obj_create_private
[22:29:02] [PASSED] drm_gem_shmem_test_pin_pages
[22:29:02] [PASSED] drm_gem_shmem_test_vmap
[22:29:02] [PASSED] drm_gem_shmem_test_get_sg_table
[22:29:02] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:29:02] [PASSED] drm_gem_shmem_test_madvise
[22:29:02] [PASSED] drm_gem_shmem_test_purge
[22:29:02] ================== [PASSED] drm_gem_shmem ==================
[22:29:02] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:29:02] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[22:29:02] [PASSED] Automatic
[22:29:02] [PASSED] Full
[22:29:02] [PASSED] Limited 16:235
[22:29:02] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:29:02] [PASSED] drm_test_check_disable_connector
[22:29:02] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:29:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:29:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:29:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:29:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:29:02] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:29:02] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:29:02] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:29:02] [PASSED] drm_test_check_output_bpc_dvi
[22:29:02] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:29:02] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:29:02] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:29:02] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:29:02] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:29:02] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:29:02] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:29:02] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:29:02] ============ drm_test_check_hdmi_color_format =============
[22:29:02] [PASSED] AUTO -> RGB
[22:29:02] [PASSED] YCBCR422 -> YUV422
[22:29:02] [PASSED] YCBCR420 -> YUV420
[22:29:02] [PASSED] YCBCR444 -> YUV444
[22:29:02] [PASSED] RGB -> RGB
[22:29:02] ======== [PASSED] drm_test_check_hdmi_color_format =========
[22:29:02] ======== drm_test_check_hdmi_color_format_420_only ========
[22:29:02] [PASSED] RGB should fail
[22:29:02] [PASSED] YUV444 should fail
[22:29:02] [PASSED] YUV422 should fail
[22:29:02] [PASSED] YUV420 should work
[22:29:02] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[22:29:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:29:02] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:29:02] [PASSED] drm_test_check_broadcast_rgb_value
[22:29:02] [PASSED] drm_test_check_bpc_8_value
[22:29:02] [PASSED] drm_test_check_bpc_10_value
[22:29:02] [PASSED] drm_test_check_bpc_12_value
[22:29:02] [PASSED] drm_test_check_format_value
[22:29:02] [PASSED] drm_test_check_tmds_char_value
[22:29:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:29:02] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[22:29:02] [PASSED] drm_test_check_mode_valid
[22:29:02] [PASSED] drm_test_check_mode_valid_reject
[22:29:02] [PASSED] drm_test_check_mode_valid_reject_rate
[22:29:02] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:29:02] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[22:29:02] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[22:29:02] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[22:29:02] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:29:02] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:29:02] [PASSED] drm_test_check_infoframes
[22:29:02] [PASSED] drm_test_check_reject_avi_infoframe
[22:29:02] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:29:02] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:29:02] [PASSED] drm_test_check_reject_audio_infoframe
[22:29:02] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:29:02] ================= drm_managed (2 subtests) =================
[22:29:02] [PASSED] drm_test_managed_release_action
[22:29:02] [PASSED] drm_test_managed_run_action
[22:29:02] =================== [PASSED] drm_managed ===================
[22:29:02] =================== drm_mm (6 subtests) ====================
[22:29:02] [PASSED] drm_test_mm_init
[22:29:02] [PASSED] drm_test_mm_debug
[22:29:02] [PASSED] drm_test_mm_align32
[22:29:02] [PASSED] drm_test_mm_align64
[22:29:02] [PASSED] drm_test_mm_lowest
[22:29:02] [PASSED] drm_test_mm_highest
[22:29:02] ===================== [PASSED] drm_mm ======================
[22:29:02] ============= drm_modes_analog_tv (5 subtests) =============
[22:29:02] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:29:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:29:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:29:02] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:29:02] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:29:02] =============== [PASSED] drm_modes_analog_tv ===============
[22:29:02] ============== drm_plane_helper (2 subtests) ===============
[22:29:02] =============== drm_test_check_plane_state ================
[22:29:02] [PASSED] clipping_simple
[22:29:02] [PASSED] clipping_rotate_reflect
[22:29:02] [PASSED] positioning_simple
[22:29:02] [PASSED] upscaling
[22:29:02] [PASSED] downscaling
[22:29:02] [PASSED] rounding1
[22:29:02] [PASSED] rounding2
[22:29:02] [PASSED] rounding3
[22:29:02] [PASSED] rounding4
[22:29:02] =========== [PASSED] drm_test_check_plane_state ============
[22:29:02] =========== drm_test_check_invalid_plane_state ============
[22:29:02] [PASSED] positioning_invalid
[22:29:02] [PASSED] upscaling_invalid
[22:29:02] [PASSED] downscaling_invalid
[22:29:02] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:29:02] ================ [PASSED] drm_plane_helper =================
[22:29:02] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:29:02] ====== drm_test_connector_helper_tv_get_modes_check =======
[22:29:02] [PASSED] None
[22:29:02] [PASSED] PAL
[22:29:02] [PASSED] NTSC
[22:29:02] [PASSED] Both, NTSC Default
[22:29:02] [PASSED] Both, PAL Default
[22:29:02] [PASSED] Both, NTSC Default, with PAL on command-line
[22:29:02] [PASSED] Both, PAL Default, with NTSC on command-line
[22:29:02] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:29:02] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:29:02] ================== drm_rect (9 subtests) ===================
[22:29:02] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:29:02] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:29:02] [PASSED] drm_test_rect_clip_scaled_clipped
[22:29:02] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:29:02] ================= drm_test_rect_intersect =================
[22:29:02] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:29:02] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:29:02] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:29:02] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:29:02] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:29:02] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:29:02] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:29:02] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:29:02] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:29:02] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:29:02] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:29:02] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:29:02] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:29:02] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:29:02] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:29:02] ============= [PASSED] drm_test_rect_intersect =============
[22:29:02] ================ drm_test_rect_calc_hscale ================
[22:29:02] [PASSED] normal use
[22:29:02] [PASSED] out of max range
[22:29:02] [PASSED] out of min range
[22:29:02] [PASSED] zero dst
[22:29:02] [PASSED] negative src
[22:29:02] [PASSED] negative dst
[22:29:02] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:29:02] ================ drm_test_rect_calc_vscale ================
[22:29:02] [PASSED] normal use
[22:29:02] [PASSED] out of max range
[22:29:02] [PASSED] out of min range
[22:29:02] [PASSED] zero dst
[22:29:02] [PASSED] negative src
[22:29:02] [PASSED] negative dst
[22:29:02] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:29:02] ================== drm_test_rect_rotate ===================
[22:29:02] [PASSED] reflect-x
[22:29:02] [PASSED] reflect-y
[22:29:02] [PASSED] rotate-0
[22:29:02] [PASSED] rotate-90
[22:29:02] [PASSED] rotate-180
[22:29:02] [PASSED] rotate-270
[22:29:02] ============== [PASSED] drm_test_rect_rotate ===============
[22:29:02] ================ drm_test_rect_rotate_inv =================
[22:29:02] [PASSED] reflect-x
[22:29:02] [PASSED] reflect-y
[22:29:02] [PASSED] rotate-0
[22:29:02] [PASSED] rotate-90
[22:29:02] [PASSED] rotate-180
[22:29:02] [PASSED] rotate-270
[22:29:02] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:29:02] ==================== [PASSED] drm_rect =====================
[22:29:02] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:29:02] ============ drm_test_sysfb_build_fourcc_list =============
[22:29:02] [PASSED] no native formats
[22:29:02] [PASSED] XRGB8888 as native format
[22:29:02] [PASSED] remove duplicates
[22:29:02] [PASSED] convert alpha formats
[22:29:02] [PASSED] random formats
[22:29:02] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:29:02] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:29:02] ================== drm_fixp (2 subtests) ===================
[22:29:02] [PASSED] drm_test_int2fixp
[22:29:02] [PASSED] drm_test_sm2fixp
[22:29:02] ==================== [PASSED] drm_fixp =====================
[22:29:02] ============================================================
[22:29:02] Testing complete. Ran 637 tests: passed: 637
[22:29:02] Elapsed time: 26.631s total, 1.781s configuring, 24.679s building, 0.152s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:29:02] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:29:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:29:14] Starting KUnit Kernel (1/1)...
[22:29:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:29:14] ================= ttm_device (5 subtests) ==================
[22:29:14] [PASSED] ttm_device_init_basic
[22:29:14] [PASSED] ttm_device_init_multiple
[22:29:14] [PASSED] ttm_device_fini_basic
[22:29:14] [PASSED] ttm_device_init_no_vma_man
[22:29:14] ================== ttm_device_init_pools ==================
[22:29:14] [PASSED] No DMA allocations, no DMA32 required
[22:29:14] [PASSED] DMA allocations, DMA32 required
[22:29:14] [PASSED] No DMA allocations, DMA32 required
[22:29:14] [PASSED] DMA allocations, no DMA32 required
[22:29:14] ============== [PASSED] ttm_device_init_pools ==============
[22:29:14] =================== [PASSED] ttm_device ====================
[22:29:14] ================== ttm_pool (8 subtests) ===================
[22:29:14] ================== ttm_pool_alloc_basic ===================
[22:29:14] [PASSED] One page
[22:29:14] [PASSED] More than one page
[22:29:14] [PASSED] Above the allocation limit
[22:29:14] [PASSED] One page, with coherent DMA mappings enabled
[22:29:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:29:14] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:29:14] ============== ttm_pool_alloc_basic_dma_addr ==============
[22:29:14] [PASSED] One page
[22:29:14] [PASSED] More than one page
[22:29:14] [PASSED] Above the allocation limit
[22:29:14] [PASSED] One page, with coherent DMA mappings enabled
[22:29:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:29:14] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:29:14] [PASSED] ttm_pool_alloc_order_caching_match
[22:29:14] [PASSED] ttm_pool_alloc_caching_mismatch
[22:29:14] [PASSED] ttm_pool_alloc_order_mismatch
[22:29:14] [PASSED] ttm_pool_free_dma_alloc
[22:29:14] [PASSED] ttm_pool_free_no_dma_alloc
[22:29:14] [PASSED] ttm_pool_fini_basic
[22:29:14] ==================== [PASSED] ttm_pool =====================
[22:29:14] ================ ttm_resource (8 subtests) =================
[22:29:14] ================= ttm_resource_init_basic =================
[22:29:14] [PASSED] Init resource in TTM_PL_SYSTEM
[22:29:14] [PASSED] Init resource in TTM_PL_VRAM
[22:29:14] [PASSED] Init resource in a private placement
[22:29:14] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:29:14] ============= [PASSED] ttm_resource_init_basic =============
[22:29:14] [PASSED] ttm_resource_init_pinned
[22:29:14] [PASSED] ttm_resource_fini_basic
[22:29:14] [PASSED] ttm_resource_manager_init_basic
[22:29:14] [PASSED] ttm_resource_manager_usage_basic
[22:29:14] [PASSED] ttm_resource_manager_set_used_basic
[22:29:14] [PASSED] ttm_sys_man_alloc_basic
[22:29:14] [PASSED] ttm_sys_man_free_basic
[22:29:14] ================== [PASSED] ttm_resource ===================
[22:29:14] =================== ttm_tt (15 subtests) ===================
[22:29:14] ==================== ttm_tt_init_basic ====================
[22:29:14] [PASSED] Page-aligned size
[22:29:14] [PASSED] Extra pages requested
[22:29:14] ================ [PASSED] ttm_tt_init_basic ================
[22:29:14] [PASSED] ttm_tt_init_misaligned
[22:29:14] [PASSED] ttm_tt_fini_basic
[22:29:14] [PASSED] ttm_tt_fini_sg
[22:29:14] [PASSED] ttm_tt_fini_shmem
[22:29:14] [PASSED] ttm_tt_create_basic
[22:29:14] [PASSED] ttm_tt_create_invalid_bo_type
[22:29:14] [PASSED] ttm_tt_create_ttm_exists
[22:29:14] [PASSED] ttm_tt_create_failed
[22:29:14] [PASSED] ttm_tt_destroy_basic
[22:29:14] [PASSED] ttm_tt_populate_null_ttm
[22:29:14] [PASSED] ttm_tt_populate_populated_ttm
[22:29:14] [PASSED] ttm_tt_unpopulate_basic
[22:29:14] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:29:14] [PASSED] ttm_tt_swapin_basic
[22:29:14] ===================== [PASSED] ttm_tt ======================
[22:29:14] =================== ttm_bo (14 subtests) ===================
[22:29:14] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[22:29:14] [PASSED] Cannot be interrupted and sleeps
[22:29:14] [PASSED] Cannot be interrupted, locks straight away
[22:29:14] [PASSED] Can be interrupted, sleeps
[22:29:14] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:29:14] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:29:14] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:29:14] [PASSED] ttm_bo_reserve_double_resv
[22:29:14] [PASSED] ttm_bo_reserve_interrupted
[22:29:14] [PASSED] ttm_bo_reserve_deadlock
[22:29:14] [PASSED] ttm_bo_unreserve_basic
[22:29:14] [PASSED] ttm_bo_unreserve_pinned
[22:29:14] [PASSED] ttm_bo_unreserve_bulk
[22:29:14] [PASSED] ttm_bo_fini_basic
[22:29:14] [PASSED] ttm_bo_fini_shared_resv
[22:29:14] [PASSED] ttm_bo_pin_basic
[22:29:14] [PASSED] ttm_bo_pin_unpin_resource
[22:29:14] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:29:14] ===================== [PASSED] ttm_bo ======================
[22:29:14] ============== ttm_bo_validate (22 subtests) ===============
[22:29:14] ============== ttm_bo_init_reserved_sys_man ===============
[22:29:14] [PASSED] Buffer object for userspace
[22:29:14] [PASSED] Kernel buffer object
[22:29:14] [PASSED] Shared buffer object
[22:29:14] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:29:14] ============== ttm_bo_init_reserved_mock_man ==============
[22:29:14] [PASSED] Buffer object for userspace
[22:29:14] [PASSED] Kernel buffer object
[22:29:14] [PASSED] Shared buffer object
[22:29:14] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:29:14] [PASSED] ttm_bo_init_reserved_resv
[22:29:14] ================== ttm_bo_validate_basic ==================
[22:29:14] [PASSED] Buffer object for userspace
[22:29:14] [PASSED] Kernel buffer object
[22:29:14] [PASSED] Shared buffer object
[22:29:14] ============== [PASSED] ttm_bo_validate_basic ==============
[22:29:14] [PASSED] ttm_bo_validate_invalid_placement
[22:29:14] ============= ttm_bo_validate_same_placement ==============
[22:29:14] [PASSED] System manager
[22:29:14] [PASSED] VRAM manager
[22:29:14] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:29:14] [PASSED] ttm_bo_validate_failed_alloc
[22:29:14] [PASSED] ttm_bo_validate_pinned
[22:29:14] [PASSED] ttm_bo_validate_busy_placement
[22:29:14] ================ ttm_bo_validate_multihop =================
[22:29:14] [PASSED] Buffer object for userspace
[22:29:14] [PASSED] Kernel buffer object
[22:29:14] [PASSED] Shared buffer object
[22:29:14] ============ [PASSED] ttm_bo_validate_multihop =============
[22:29:14] ========== ttm_bo_validate_no_placement_signaled ==========
[22:29:14] [PASSED] Buffer object in system domain, no page vector
[22:29:14] [PASSED] Buffer object in system domain with an existing page vector
[22:29:14] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:29:14] ======== ttm_bo_validate_no_placement_not_signaled ========
[22:29:14] [PASSED] Buffer object for userspace
[22:29:14] [PASSED] Kernel buffer object
[22:29:14] [PASSED] Shared buffer object
[22:29:14] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:29:14] [PASSED] ttm_bo_validate_move_fence_signaled
[22:29:14] ========= ttm_bo_validate_move_fence_not_signaled =========
[22:29:14] [PASSED] Waits for GPU
[22:29:14] [PASSED] Tries to lock straight away
[22:29:14] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:29:14] [PASSED] ttm_bo_validate_swapout
[22:29:14] [PASSED] ttm_bo_validate_happy_evict
[22:29:14] [PASSED] ttm_bo_validate_all_pinned_evict
[22:29:14] [PASSED] ttm_bo_validate_allowed_only_evict
[22:29:14] [PASSED] ttm_bo_validate_deleted_evict
[22:29:14] [PASSED] ttm_bo_validate_busy_domain_evict
[22:29:14] [PASSED] ttm_bo_validate_evict_gutting
[22:29:14] [PASSED] ttm_bo_validate_recrusive_evict
[22:29:14] ================= [PASSED] ttm_bo_validate =================
[22:29:14] ============================================================
[22:29:14] Testing complete. Ran 102 tests: passed: 102
[22:29:14] Elapsed time: 12.003s total, 1.797s configuring, 9.991s building, 0.185s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ i915.CI.BAT: failure for drm/i915/display: SKL_DSSM / DE_CAP fixes
2026-07-27 22:21 [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes Michał Grzelak
` (3 preceding siblings ...)
2026-07-27 22:29 ` ✓ CI.KUnit: success " Patchwork
@ 2026-07-27 23:04 ` Patchwork
2026-07-27 23:19 ` ✗ Xe.CI.BAT: " Patchwork
2026-07-28 0:52 ` ✓ Xe.CI.FULL: success " Patchwork
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-27 23:04 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7027 bytes --]
== Series Details ==
Series: drm/i915/display: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171137/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_18909 -> Patchwork_171137v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_171137v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_171137v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/index.html
Participating hosts (41 -> 39)
------------------------------
Missing (2): bat-dg2-13 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_171137v1:
### IGT changes ###
#### Possible regressions ####
* igt@i915_module_load@load:
- bat-adlp-6: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-adlp-6/igt@i915_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-adlp-6/igt@i915_module_load@load.html
- bat-arlh-2: [PASS][3] -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-arlh-2/igt@i915_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-arlh-2/igt@i915_module_load@load.html
- bat-arlh-3: [PASS][5] -> [ABORT][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-arlh-3/igt@i915_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-arlh-3/igt@i915_module_load@load.html
- bat-dg1-7: [PASS][7] -> [INCOMPLETE][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-dg1-7/igt@i915_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-dg1-7/igt@i915_module_load@load.html
- bat-adlp-9: [PASS][9] -> [ABORT][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-adlp-9/igt@i915_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-adlp-9/igt@i915_module_load@load.html
- bat-twl-2: [PASS][11] -> [ABORT][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-twl-2/igt@i915_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-twl-2/igt@i915_module_load@load.html
- bat-rpls-4: [PASS][13] -> [ABORT][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-rpls-4/igt@i915_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-rpls-4/igt@i915_module_load@load.html
- bat-twl-1: [PASS][15] -> [ABORT][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-twl-1/igt@i915_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-twl-1/igt@i915_module_load@load.html
- bat-jsl-5: [PASS][17] -> [ABORT][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-jsl-5/igt@i915_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-jsl-5/igt@i915_module_load@load.html
- bat-rplp-1: [PASS][19] -> [ABORT][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-rplp-1/igt@i915_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-rplp-1/igt@i915_module_load@load.html
- fi-tgl-1115g4: [PASS][21] -> [ABORT][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/fi-tgl-1115g4/igt@i915_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/fi-tgl-1115g4/igt@i915_module_load@load.html
- bat-mtlp-9: [PASS][23] -> [ABORT][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-mtlp-9/igt@i915_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-mtlp-9/igt@i915_module_load@load.html
- bat-arls-6: [PASS][25] -> [ABORT][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-arls-6/igt@i915_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-arls-6/igt@i915_module_load@load.html
- bat-adlp-11: [PASS][27] -> [ABORT][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-adlp-11/igt@i915_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-adlp-11/igt@i915_module_load@load.html
- bat-mtlp-8: [PASS][29] -> [ABORT][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-mtlp-8/igt@i915_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-mtlp-8/igt@i915_module_load@load.html
- bat-dg1-6: [PASS][31] -> [ABORT][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-dg1-6/igt@i915_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-dg1-6/igt@i915_module_load@load.html
- bat-adls-6: [PASS][33] -> [ABORT][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/bat-adls-6/igt@i915_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/bat-adls-6/igt@i915_module_load@load.html
Known issues
------------
Here are the changes found in Patchwork_171137v1 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@i915_selftest@live:
- fi-bsw-n3050: [ABORT][35] ([i915#16562]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/fi-bsw-n3050/igt@i915_selftest@live.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/fi-bsw-n3050/igt@i915_selftest@live.html
* igt@i915_selftest@live@hangcheck:
- fi-bsw-n3050: [ABORT][37] ([i915#16633]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18909/fi-bsw-n3050/igt@i915_selftest@live@hangcheck.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/fi-bsw-n3050/igt@i915_selftest@live@hangcheck.html
[i915#16562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16562
[i915#16633]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16633
Build changes
-------------
* Linux: CI_DRM_18909 -> Patchwork_171137v1
CI-20190529: 20190529
CI_DRM_18909: 28e3f47d47a61b5e28e7566944479e9c9715d41d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9027: 9027
Patchwork_171137v1: 28e3f47d47a61b5e28e7566944479e9c9715d41d @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171137v1/index.html
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^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ Xe.CI.BAT: failure for drm/i915/display: SKL_DSSM / DE_CAP fixes
2026-07-27 22:21 [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes Michał Grzelak
` (4 preceding siblings ...)
2026-07-27 23:04 ` ✗ i915.CI.BAT: failure " Patchwork
@ 2026-07-27 23:19 ` Patchwork
2026-07-28 0:52 ` ✓ Xe.CI.FULL: success " Patchwork
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-27 23:19 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
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== Series Details ==
Series: drm/i915/display: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171136/
State : failure
== Summary ==
CI Bug Log - changes from xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d_BAT -> xe-pw-171136v1_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-171136v1_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-171136v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 2)
------------------------------
ERROR: It appears as if the changes made in xe-pw-171136v1_BAT prevented too many machines from booting.
Missing (11): bat-bmg-1 bat-lnl-2 bat-ptl-1 bat-ptl-2 bat-ptl-vm bat-lnl-1 bat-bmg-vm bat-bmg-3 bat-wcl-1 bat-wcl-2 bat-bmg-2
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-171136v1_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_module_load@load:
- bat-adlp-7: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/bat-adlp-7/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/bat-adlp-7/igt@xe_module_load@load.html
Build changes
-------------
* Linux: xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d -> xe-pw-171136v1
IGT_9027: 9027
xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d: 28e3f47d47a61b5e28e7566944479e9c9715d41d
xe-pw-171136v1: 171136v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/index.html
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^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.FULL: success for drm/i915/display: SKL_DSSM / DE_CAP fixes
2026-07-27 22:21 [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes Michał Grzelak
` (5 preceding siblings ...)
2026-07-27 23:19 ` ✗ Xe.CI.BAT: " Patchwork
@ 2026-07-28 0:52 ` Patchwork
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-28 0:52 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 14496 bytes --]
== Series Details ==
Series: drm/i915/display: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171136/
State : success
== Summary ==
CI Bug Log - changes from xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d_FULL -> xe-pw-171136v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-171136v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_module_load@load:
- shard-bmg: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) -> ([ABORT][26], [ABORT][27], [ABORT][28], [ABORT][29], [ABORT][30], [ABORT][31], [ABORT][32], [ABORT][33], [ABORT][34], [ABORT][35], [ABORT][36], [ABORT][37], [ABORT][38], [ABORT][39], [ABORT][40], [ABORT][41], [ABORT][42], [ABORT][43], [ABORT][44], [ABORT][45]) ([Intel XE#8007])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-6/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-5/igt@xe_module_load@load.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-4/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-5/igt@xe_module_load@load.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-5/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-9/igt@xe_module_load@load.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-9/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-9/igt@xe_module_load@load.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-3/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-3/igt@xe_module_load@load.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-3/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-6/igt@xe_module_load@load.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-8/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-8/igt@xe_module_load@load.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-2/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-8/igt@xe_module_load@load.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-10/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-10/igt@xe_module_load@load.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-10/igt@xe_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-7/igt@xe_module_load@load.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-10/igt@xe_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-2/igt@xe_module_load@load.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-2/igt@xe_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-4/igt@xe_module_load@load.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-bmg-4/igt@xe_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-4/igt@xe_module_load@load.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-4/igt@xe_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-4/igt@xe_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-8/igt@xe_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-8/igt@xe_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-10/igt@xe_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-10/igt@xe_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-10/igt@xe_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-7/igt@xe_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-7/igt@xe_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-7/igt@xe_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-9/igt@xe_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-9/igt@xe_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-2/igt@xe_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-2/igt@xe_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-6/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-3/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-3/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-5/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-bmg-5/igt@xe_module_load@load.html
#### Warnings ####
* igt@xe_module_load@load:
- shard-lnl: ([PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [SKIP][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71]) ([Intel XE#378] / [Intel XE#7405]) -> ([ABORT][72], [ABORT][73], [ABORT][74], [ABORT][75], [ABORT][76], [ABORT][77], [ABORT][78], [ABORT][79], [ABORT][80], [ABORT][81], [ABORT][82], [ABORT][83], [ABORT][84], [ABORT][85], [ABORT][86], [ABORT][87], [ABORT][88], [ABORT][89], [ABORT][90], [ABORT][91], [ABORT][92], [ABORT][93], [ABORT][94], [ABORT][95]) ([Intel XE#8007])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-1/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-7/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-3/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-4/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-2/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-6/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-6/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-6/igt@xe_module_load@load.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-8/igt@xe_module_load@load.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-8/igt@xe_module_load@load.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-4/igt@xe_module_load@load.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-4/igt@xe_module_load@load.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-5/igt@xe_module_load@load.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-8/igt@xe_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-2/igt@xe_module_load@load.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-2/igt@xe_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-1/igt@xe_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-5/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-5/igt@xe_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-7/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-7/igt@xe_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-3/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-3/igt@xe_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-3/igt@xe_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-1/igt@xe_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d/shard-lnl-4/igt@xe_module_load@load.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-1/igt@xe_module_load@load.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-1/igt@xe_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-1/igt@xe_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-8/igt@xe_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-8/igt@xe_module_load@load.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-8/igt@xe_module_load@load.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-4/igt@xe_module_load@load.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-4/igt@xe_module_load@load.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-4/igt@xe_module_load@load.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-6/igt@xe_module_load@load.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-6/igt@xe_module_load@load.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-6/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-3/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-3/igt@xe_module_load@load.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-3/igt@xe_module_load@load.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-2/igt@xe_module_load@load.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-2/igt@xe_module_load@load.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-2/igt@xe_module_load@load.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-7/igt@xe_module_load@load.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-7/igt@xe_module_load@load.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-7/igt@xe_module_load@load.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-5/igt@xe_module_load@load.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-5/igt@xe_module_load@load.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/shard-lnl-5/igt@xe_module_load@load.html
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
Build changes
-------------
* Linux: xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d -> xe-pw-171136v1
IGT_9027: 9027
xe-5491-28e3f47d47a61b5e28e7566944479e9c9715d41d: 28e3f47d47a61b5e28e7566944479e9c9715d41d
xe-pw-171136v1: 171136v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171136v1/index.html
[-- Attachment #2: Type: text/html, Size: 15122 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 2/2] drm/i915/xe2lpd+: disable 3D LUT if unsupported
2026-07-27 22:21 ` [PATCH v1 2/2] drm/i915/xe2lpd+: disable 3D LUT if unsupported Michał Grzelak
@ 2026-07-28 7:42 ` Jani Nikula
0 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2026-07-28 7:42 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe
Cc: Michał Grzelak, Chaitanya Borah Kumar
On Tue, 28 Jul 2026, Michał Grzelak <michal.grzelak@intel.com> wrote:
> XE2LPD_DE_CAP_3DLUT_MASK is defined but never used. Check with it if
> 3DLUT is enabled.
>
> Check DE_CAP register if 3D LUT is disabled. Store the info in a new
> field of struct intel_display_runtime_info.
>
> Add macros for checking both 3D LUT hardware and 3D LUT capability.
What's the difference?
> Initialize has_3dlut to 1 on each platform since LNL.
>
> Log value of has_3dlut in intel_display_device_info_print().
>
> Bspec: 71161
> Cc: Chaitanya Borah Kumar <chaitanya.borah.kumar@intel.com>
> Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_device.c | 8 ++++++++
> drivers/gpu/drm/i915/display/intel_display_device.h | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_regs.h | 1 +
> 4 files changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 87ced9f6ff40..ffdefb51a264 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -4258,6 +4258,9 @@ intel_color_load_plane_luts(struct intel_dsb *dsb,
> bool
> intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe)
> {
> + if (!HAS_3DLUT(display))
> + return false;
> +
> if (DISPLAY_VER(display) >= 12)
> return pipe == PIPE_A || pipe == PIPE_B;
> else
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index f17fc2c68472..45c791531f85 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1335,6 +1335,7 @@ static const struct platform_desc dg2_desc = {
> BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> BIT(TRANSCODER_C) | BIT(TRANSCODER_D), \
> .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A) | BIT(INTEL_FBC_B), \
> + .__runtime_defaults.has_3dlut = 1, \
> .__runtime_defaults.has_dmc = 1, \
> .__runtime_defaults.has_dsc = 1, \
> .__runtime_defaults.has_hdcp = 1, \
> @@ -1345,6 +1346,7 @@ static const struct platform_desc dg2_desc = {
>
> static const struct intel_display_device_info xe_lpdp_display = {
> XE_LPDP_FEATURES,
> + .__runtime_defaults.has_3dlut = 0,
There's no need to initialize to 0.
> };
>
> static const struct intel_display_device_info xe2_lpd_display = {
> @@ -1385,6 +1387,7 @@ static const struct intel_display_device_info xe2_hpd_display = {
> XE_LPDP_FEATURES,
> .__runtime_defaults.port_mask = BIT(PORT_A) |
> BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4),
> + .__runtime_defaults.has_3dlut = 0,
Ditto.
> };
>
> static const u16 mtl_u_ids[] = {
> @@ -1935,6 +1938,10 @@ static void __intel_display_device_info_runtime_init(struct intel_display *displ
> if (DISPLAY_VER(display) >= 20) {
> u32 cap = intel_de_read(display, XE2LPD_DE_CAP);
>
> + if (REG_FIELD_GET(XE2LPD_DE_CAP_3DLUT_MASK, cap) ==
> + XE2LPD_DE_CAP_3DLUT_REMOVED)
> + display_runtime->has_3dlut = 0;
> +
> if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) ==
> XE2LPD_DE_CAP_DSC_REMOVED)
> display_runtime->has_dsc = 0;
> @@ -1996,6 +2003,7 @@ void intel_display_device_info_print(const struct intel_display_device_info *inf
> DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
> #undef PRINT_FLAG
>
> + drm_printf(p, "has_3dlut: %s\n", str_yes_no(runtime->has_3dlut));
> drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
> drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
> drm_printf(p, "has_dsc: %s\n", str_yes_no(runtime->has_dsc));
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 7121e7cd9512..34ee7993be33 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -147,6 +147,9 @@ struct intel_display_platforms {
>
> #define HAS_128B_Y_TILING(__display) (!(__display)->platform.i915g && !(__display)->platform.i915gm)
> #define HAS_2PPC(__display) (DISPLAY_VER(__display) >= 10)
> +#define HAS_3DLUT_HW(__display) (DISPLAY_VER(__display) >= 10)
> +#define HAS_3DLUT_CAP(__display) (IS_DISPLAY_VER(__display, 10, 20) || DISPLAY_RUNTIME_INFO(__display)->has_3dlut)
I don't understand the difference between "HW" and "CAP" or the need for
both.
It's generally better to either use the runtime info flag or the display
version check, not both.
> +#define HAS_3DLUT(__display) (HAS_3DLUT_HW(__display) && HAS_3DLUT_CAP(__display))
> #define HAS_4TILE(__display) ((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
> #define HAS_ASYNC_FLIPS(__display) (DISPLAY_VER(__display) >= 5)
> #define HAS_AS_SDP(__display) (DISPLAY_VER(__display) >= 13)
> @@ -304,6 +307,7 @@ struct intel_display_runtime_info {
>
> u8 fbc_mask;
>
> + bool has_3dlut;
> bool has_hdcp;
> bool has_dmc;
> bool has_dsc;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 0677ca2dde00..7b2332e2fae2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -1773,6 +1773,7 @@
>
> #define XE2LPD_DE_CAP _MMIO(0x41100)
> #define XE2LPD_DE_CAP_3DLUT_MASK REG_GENMASK(31, 30)
> +#define XE2LPD_DE_CAP_3DLUT_REMOVED 1
> #define XE2LPD_DE_CAP_DSC_MASK REG_GENMASK(29, 28)
> #define XE2LPD_DE_CAP_DSC_REMOVED 1
> #define XE2LPD_DE_CAP_SCALER_MASK REG_GENMASK(27, 26)
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v1 1/2] drm/i915/display: fix SKL_DSSM register masks
2026-07-27 22:21 ` [PATCH v1 1/2] drm/i915/display: fix SKL_DSSM register masks Michał Grzelak
@ 2026-07-28 7:44 ` Jani Nikula
0 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2026-07-28 7:44 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe; +Cc: Michał Grzelak
On Tue, 28 Jul 2026, Michał Grzelak <michal.grzelak@intel.com> wrote:
> Add indentation into SKL_DSSM reference clock macros. Replace bit shifts
> with REG_GENMASK().
>
> Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_regs.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 0f5018482497..0677ca2dde00 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -1779,10 +1779,10 @@
> #define XE2LPD_DE_CAP_SCALER_SINGLE 1
>
> #define SKL_DSSM _MMIO(0x51004)
> -#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK (7 << 29)
> -#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz (0 << 29)
> -#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz (1 << 29)
> -#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz (2 << 29)
> +#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK REG_GENMASK(31, 29)
> +#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz 0
> +#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz REG_GENMASK(29, 29)
> +#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz REG_GENMASK(30, 29)
Define _MASK with REG_GENMASK and values with REG_FIELD_PREP. The above
is just plain wrong.
>
> /*GEN11 chicken */
> #define _PIPEA_CHICKEN 0x70038
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-07-28 7:44 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-07-27 22:21 [PATCH v1 0/2] drm/i915/display: SKL_DSSM / DE_CAP fixes Michał Grzelak
2026-07-27 22:21 ` [PATCH v1 1/2] drm/i915/display: fix SKL_DSSM register masks Michał Grzelak
2026-07-28 7:44 ` Jani Nikula
2026-07-27 22:21 ` [PATCH v1 2/2] drm/i915/xe2lpd+: disable 3D LUT if unsupported Michał Grzelak
2026-07-28 7:42 ` Jani Nikula
2026-07-27 22:27 ` ✗ CI.checkpatch: warning for drm/i915/display: SKL_DSSM / DE_CAP fixes Patchwork
2026-07-27 22:29 ` ✓ CI.KUnit: success " Patchwork
2026-07-27 23:04 ` ✗ i915.CI.BAT: failure " Patchwork
2026-07-27 23:19 ` ✗ Xe.CI.BAT: " Patchwork
2026-07-28 0:52 ` ✓ Xe.CI.FULL: success " Patchwork
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