[PATCH] drm/i915: Mask the ring->head offset using the ring->size

[PATCH] drm/i915: Mask the ring->head offset using the ring->size

[Chris Wilson]

Rather than relying on the hardware to do this correctly, we can
trivially do it ourselves.

This fixes a very reliable crash on d-i-n with all bits enabled during a
cairo-trace replay. The symptoms of the crash is that we continue to
write commands into the render ring buffer past the active head
position, leading to undefined operations.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 3c30dba..90aa9f7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -46,7 +46,7 @@ struct pipe_control {
 
 static inline int ring_space(struct intel_ring_buffer *ring)
 {
-	int space = (ring->head & HEAD_ADDR) - (ring->tail + 8);
+	int space = (ring->head & (ring->size-1)) - (ring->tail + 8);
 	if (space < 0)
 		space += ring->size;
 	return space;
-- 
1.7.7.2

Re: [PATCH] drm/i915: Mask the ring->head offset using the ring->size

[Daniel Vetter]

On Tue, Nov 08, 2011 at 11:13:12PM +0000, Chris Wilson wrote:
> Rather than relying on the hardware to do this correctly, we can
> trivially do it ourselves.
> 
> This fixes a very reliable crash on d-i-n with all bits enabled during a
> cairo-trace replay. The symptoms of the crash is that we continue to
> write commands into the render ring buffer past the active head
> position, leading to undefined operations.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: stable@kernel.org

I guess this is just the usual "snb doesn't like being pushed to hard bug"
resulting in random crashes with confusing error_states. So I think I'll
drop this. Correct?
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48

Re: [PATCH] drm/i915: Mask the ring->head offset using the ring->size

[Chris Wilson]

On Tue, 17 Jan 2012 11:59:27 +0100, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Tue, Nov 08, 2011 at 11:13:12PM +0000, Chris Wilson wrote:
> > Rather than relying on the hardware to do this correctly, we can
> > trivially do it ourselves.
> > 
> > This fixes a very reliable crash on d-i-n with all bits enabled during a
> > cairo-trace replay. The symptoms of the crash is that we continue to
> > write commands into the render ring buffer past the active head
> > position, leading to undefined operations.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: stable@kernel.org
> 
> I guess this is just the usual "snb doesn't like being pushed to hard bug"
> resulting in random crashes with confusing error_states. So I think I'll
> drop this. Correct?

I could find no other reason for this to have any effect other than the
hw not playing fair so don't apply it until some one else starts
experiencing random hangs on their SNB and can confirm whether this
patch helps.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

Re: [PATCH] drm/i915: Mask the ring->head offset using the ring->size

[Chris Wilson]

On Tue, 17 Jan 2012 11:14:04 +0000, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Tue, 17 Jan 2012 11:59:27 +0100, Daniel Vetter <daniel@ffwll.ch> wrote:
> > I guess this is just the usual "snb doesn't like being pushed to hard bug"
> > resulting in random crashes with confusing error_states. So I think I'll
> > drop this. Correct?
> 
> I could find no other reason for this to have any effect other than the
> hw not playing fair so don't apply it until some one else starts
> experiencing random hangs on their SNB and can confirm whether this
> patch helps.

The news is that the hw is indeed not playing fair, and we have some
substantial evidence that demonstrates the cause here is the
autoreported position of the head is completely bogus on SNB+.

See https://bugs.freedesktop.org/show_bug.cgi?id=45492
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre