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From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Romain Caritey <Romain.Caritey@microchip.com>,
	Doug Goldstein <cardoe@cardoe.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Alistair Francis <alistair.francis@wdc.com>,
	Connor Davis <connojdavis@gmail.com>,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v7 14/14] xen/riscv: Disable SSTC extension and add trap-based CSR probing
Date: Wed, 11 Mar 2026 11:54:14 +0100	[thread overview]
Message-ID: <e3e5d4cd-8ef7-45fb-b677-204a8af379b3@gmail.com> (raw)
In-Reply-To: <e0a891c4-3283-4e1b-81e4-f2b4bb62b5fa@gmail.com>


On 3/11/26 10:54 AM, Oleksii Kurochko wrote:
> On 3/10/26 10:15 AM, Jan Beulich wrote:
>> On 06.03.2026 17:33, Oleksii Kurochko wrote:
>>> Some RISC-V platforms expose the SSTC extension, but its CSRs are not
>>> properly saved and restored by Xen. Using SSTC in Xen could therefore
>>> lead to unexpected behaviour.
>> And what's wrong with (or what gets in the way of) adding proper
>> saving/restoring? Also, wouldn't a guest use vstimecmp anyway? I.e. what
>> saving/restoring are you talking about here?
>>
>>> To avoid this in QEMU, disable SSTC by passing "sstc=off". On real
>>> hardware, OpenSBI does not provide a mechanism to disable SSTC via the
>>> DTS (riscv,isa or similar property), as it does not rely on that
>>> property to determine extension availability. Instead, it directly
>>> probes the CSR_STIMECMP register.
>>>
>>> Introduce struct trap_info together with the do_expected_trap() handler
>>> to safely probe CSRs. The helper csr_read_allowed() attempts to read a
>>> CSR while catching traps, allowing Xen to detect whether the register
>>> is accessible. This mechanism is used at boot to verify SSTC support 
>>> and
>>> panic if the CSR is not available.
>>>
>>> The trap handling infrastructure may also be reused for other cases
>>> where controlled trap handling is required (e.g. probing instructions
>>> such as HLV*).
>> Hmm, won't you need a more generic way of dealing with traps anyway? See
>> Linux'es _ASM_EXTABLE(). See also comments further down.
>
> At the moment this approach works for me and I haven't had a need for 
> more
> generic approach. I will look at _ASM_EXTABLE(). I haven't checked yet 
> but
> I assume it will require some extra fixup code in trap handler what looks
> like over complication for the current case, at least.

I checked _ASM_EXTABLE() implementation and so I will need basically provide only
for now implementation of EX_TYPE_FIXUP what doesn't look too much and is comparable
with the current suggested solution.

~ Oleksii



  reply	other threads:[~2026-03-11 10:54 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-06 16:33 [PATCH v7 00/14] xen/riscv: introduce vtimer related things Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot Oleksii Kurochko
2026-03-10  8:11   ` Jan Beulich
2026-03-10  8:17     ` Jan Beulich
2026-03-10 16:00     ` Oleksii Kurochko
2026-03-10 16:14       ` Jan Beulich
2026-03-06 16:33 ` [PATCH v7 02/14] xen/riscv: implement vcpu_csr_init() Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 03/14] xen/riscv: introduce tracking of pending vCPU interrupts, part 1 Oleksii Kurochko
2026-03-10  8:13   ` Jan Beulich
2026-03-06 16:33 ` [PATCH v7 04/14] xen/riscv: introduce tracking of pending vCPU interrupts, part 2 Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 05/14] xen/riscv: introduce basic vtimer infrastructure for guests Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 06/14] xen/riscv: introduce vcpu_kick() implementation Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 07/14] xen/riscv: add vtimer context switch helpers Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 08/14] xen/riscv: implement SBI legacy SET_TIMER support for guests Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 09/14] xen/riscv: introduce sbi_set_timer() Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 10/14] xen/riscv: implement reprogram_timer() via SBI Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 11/14] xen/riscv: handle hypervisor timer interrupts Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 12/14] xen/riscv: init tasklet subsystem Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 13/14] xen/riscv: implement sync_vcpu_execstate() Oleksii Kurochko
2026-03-06 16:33 ` [PATCH v7 14/14] xen/riscv: Disable SSTC extension and add trap-based CSR probing Oleksii Kurochko
2026-03-10  9:15   ` Jan Beulich
2026-03-11  9:54     ` Oleksii Kurochko
2026-03-11 10:54       ` Oleksii Kurochko [this message]
2026-03-11 10:58       ` Jan Beulich
2026-03-11 11:38         ` Oleksii Kurochko
2026-03-11 12:54           ` Jan Beulich

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