Re: [Qemu-devel] Questions about acpi interrupt link device's ‘_PRS' field

[Paolo Bonzini <pbonzini@redhat.com>]

On 11/04/19 02:57, Li Qiang wrote:
> 
> 
> Paolo Bonzini <pbonzini@redhat.com <mailto:pbonzini@redhat.com>> 于2019
> 年4月10日周三 下午11:55写道：
> 
>     On 10/04/19 16:33, Li Qiang wrote:
>     > Hi all,
>     >
>     >  
>     >
>     > I see the link device ‘_PRS’  uses irq line 5, 10, 11 in
>     > ‘build_link_dev’ function.
>     >
>     > But I never see the 5 lines uses in the guest, just uses 10 and 11.
>     >
>     > Why this happen?  Maybe related with the guest?
> 
>     Because the MADT table tells the guest to only use lines 10 and 11.  The
>     BIOS configures the chipset that way.
> 
> 
> Hi Paolo,
> 
> I read the MADT spec, and found that it may related with 'Entry Type 2 :
> Interrupt Source Override'.
> However, in build_madt function, I found following code when fill
> interrupt source overide.
> 
> #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
>         if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) {
>             /* No need for a INT source override structure. */
>             continue;
>         }
> 
> Seems the madt doesn't play a role?
> 
> Also in the seabios code, I see the pci interrupt linking device is
> routed hard-coded by pci_irqs.
> So this means the seabios doesn't use the madt/dsdt table to configure
> PCI interrupt routing?

Yeah, the MADT doesn't matter, I got confused.  It's just the firmware's
definition of pci_irqs that affects the behavior you're seeing.

Paolo