From: Jan Beulich <jbeulich@suse.com>
To: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Cc: "Romain Caritey" <Romain.Caritey@microchip.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Connor Davis" <connojdavis@gmail.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Anthony PERARD" <anthony.perard@vates.tech>,
"Michal Orzel" <michal.orzel@amd.com>,
"Julien Grall" <julien@xen.org>,
"Roger Pau Monné" <roger.pau@citrix.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 20/26] xen/riscv: add missing APLIC register offsets, masks to asm/aplic.h.
Date: Fri, 5 Jun 2026 11:07:20 +0200 [thread overview]
Message-ID: <e6eb62ce-e4ea-4621-8ab4-cb986ece275d@suse.com> (raw)
In-Reply-To: <aa3053d4-692b-49cd-8e61-40db808e6a8b@gmail.com>
On 05.06.2026 10:48, Oleksii Kurochko wrote:
> On 6/3/26 5:36 PM, Jan Beulich wrote:
>> On 08.05.2026 16:43, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/include/asm/aplic.h
>>> +++ b/xen/arch/riscv/include/asm/aplic.h
>>> @@ -15,6 +15,11 @@
>>>
>>> #include <asm/imsic.h>
>>>
>>> +#define APLIC_REG_OFFSET_MASK 0x3fff
>>
>> This I can see this as wanting to live separately. Yet ...
>>
>>> +#define APLIC_TARGET_IPRIO_MASK 0xff
>
> This could be dropped as I don't use this mask anymore.
>
>>> +#define APLIC_TARGET_GUEST_IDX_SHIFT 12
>>> +#define APLIC_TARGET_EIID_MASK 0x7ff
>>
>> ... what (set of) register(s) do these apply to? Perhaps ...
>>
>>> @@ -26,6 +31,36 @@
>>> #define APLIC_SOURCECFG_SM_LEVEL_HIGH 0x6
>>> #define APLIC_SOURCECFG_SM_LEVEL_LOW 0x7
>>>
>>> +#define APLIC_DOMAINCFG 0x0000
>>> +#define APLIC_SOURCECFG_BASE 0x0004
>>> +#define APLIC_SOURCECFG_LAST 0x0ffc
>>> +
>>> +#define APLIC_SMSICFGADDR 0x1bc8
>>> +#define APLIC_SMSICFGADDRH 0x1bcc
>>> +
>>> +#define APLIC_SETIP_BASE 0x1c00
>>> +#define APLIC_SETIP_LAST 0x1c7c
>>> +#define APLIC_SETIPNUM 0x1cdc
>>> +
>>> +#define APLIC_CLRIP_BASE 0x1d00
>>> +#define APLIC_CLRIP_LAST 0x1d7c
>>> +#define APLIC_CLRIPNUM 0x1ddc
>>> +
>>> +#define APLIC_SETIE_BASE 0x1e00
>>> +#define APLIC_SETIE_LAST 0x1e7c
>>> +#define APLIC_SETIENUM 0x1edc
>>> +
>>> +#define APLIC_CLRIE_BASE 0x1f00
>>> +#define APLIC_CLRIE_LAST 0x1f7c
>>> +#define APLIC_CLRIENUM 0x1fdc
>>> +
>>> +#define APLIC_SETIPNUM_LE 0x2000
>>> +
>>> +#define APLIC_GENMSI 0x3000
>>> +
>>> +#define APLIC_TARGET_BASE 0x3004
>>> +#define APLIC_TARGET_LAST 0x3ffc
>>
>> ... these? And then is ...
>
> Yes, it is applied to target register.
>
>>
>>> #define APLIC_TARGET_HART_IDX_SHIFT 18
>>
>> ... this also covering some part of them? Can't they (a) live together and (b)
>> have some kind of connection to what they apply to?
>
> Agreed, they could live together. The intent was simply to keep all MMIO
> definitions in sequence,
That would also be fine, but then please add a comment to the register field
definition groups.
Jan
> but I'm okay with grouping macros related to a
> specific register together.
next prev parent reply other threads:[~2026-06-05 9:07 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-08 14:43 [PATCH v2 00/26] Introduce enablemenant of dom0less Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 01/26] xen: arm: update p2m_set_allocation() prototype Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 02/26] xen/riscv: Implement ARCH_PAGING_MEMPOOL Oleksii Kurochko
2026-05-18 15:13 ` Jan Beulich
2026-05-19 9:27 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 03/26] xen/riscv: Implement construct_domain() Oleksii Kurochko
2026-05-18 15:33 ` Jan Beulich
2026-05-19 9:28 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 04/26] xen/riscv: implement prerequisites for domain_create() Oleksii Kurochko
2026-05-18 15:43 ` Jan Beulich
2026-05-19 11:33 ` Oleksii Kurochko
2026-05-19 11:47 ` Jan Beulich
2026-05-08 14:43 ` [PATCH v2 05/26] xen/riscv: introduce guest riscv,isa string Oleksii Kurochko
2026-05-18 15:51 ` Jan Beulich
2026-05-19 11:59 ` Oleksii Kurochko
2026-05-19 12:12 ` Jan Beulich
2026-05-19 13:24 ` Oleksii Kurochko
2026-05-19 13:40 ` Jan Beulich
2026-05-19 14:49 ` Oleksii Kurochko
2026-05-19 14:53 ` Jan Beulich
2026-05-19 15:17 ` Oleksii Kurochko
2026-05-19 15:56 ` Jan Beulich
2026-05-19 16:21 ` Oleksii Kurochko
2026-05-20 6:13 ` Jan Beulich
2026-05-20 7:28 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 06/26] xen/riscv: implement make_cpus_node() Oleksii Kurochko
2026-05-18 16:00 ` Jan Beulich
2026-05-19 13:33 ` Oleksii Kurochko
2026-05-19 13:42 ` Jan Beulich
2026-05-08 14:43 ` [PATCH v2 07/26] xen/riscv: implement make_timer_node() Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 08/26] xen/riscv: implement make_arch_nodes() Oleksii Kurochko
2026-05-21 13:20 ` Jan Beulich
2026-05-08 14:43 ` [PATCH v2 09/26] xen/riscv: introduce init interrupt controller operations Oleksii Kurochko
2026-05-21 13:25 ` Jan Beulich
2026-05-22 14:38 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 10/26] xen/riscv: implement make_intc_domU_node() Oleksii Kurochko
2026-05-21 13:30 ` Jan Beulich
2026-05-22 14:45 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 11/26] xen/riscv: introduce aia_init() and aia_usable() Oleksii Kurochko
2026-05-21 14:57 ` Jan Beulich
2026-05-22 14:55 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 12/26] xen/riscv: add basic VGEIN management for AIA guests Oleksii Kurochko
2026-05-21 15:11 ` Jan Beulich
2026-05-22 15:43 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 13/26] xen/riscv: introduce per-vCPU IMSIC state Oleksii Kurochko
2026-05-21 15:24 ` Jan Beulich
2026-05-22 15:50 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 14/26] xen/riscv: add very early virtual APLIC (vAPLIC) initialization support Oleksii Kurochko
2026-06-03 14:54 ` Jan Beulich
2026-06-04 11:29 ` Oleksii Kurochko
2026-06-05 7:22 ` Jan Beulich
2026-06-05 11:59 ` Oleksii Kurochko
2026-06-05 12:05 ` Jan Beulich
2026-05-08 14:43 ` [PATCH v2 15/26] xen/riscv: introduce (de)initialization helpers for vINTC Oleksii Kurochko
2026-06-03 15:00 ` Jan Beulich
2026-06-04 11:33 ` Oleksii Kurochko
2026-06-05 7:26 ` Jan Beulich
2026-06-05 9:25 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 16/26] xen/riscv: create APLIC DT node for guest domains Oleksii Kurochko
2026-06-03 15:10 ` Jan Beulich
2026-06-04 11:54 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 17/26] xen/riscv: generate IMSIC " Oleksii Kurochko
2026-06-03 15:21 ` Jan Beulich
2026-06-04 14:21 ` Oleksii Kurochko
2026-06-05 7:31 ` Jan Beulich
2026-06-05 9:29 ` Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 18/26] xen: move declaration of map_device_irqs_to_domain() to common header Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 19/26] xen/riscv: implement IRQ routing for device passthrough Oleksii Kurochko
2026-06-03 16:01 ` Jan Beulich
2026-06-04 15:35 ` Oleksii Kurochko
2026-06-05 7:38 ` Jan Beulich
2026-05-08 14:43 ` [PATCH v2 20/26] xen/riscv: add missing APLIC register offsets, masks to asm/aplic.h Oleksii Kurochko
2026-06-03 15:36 ` Jan Beulich
2026-06-05 8:48 ` Oleksii Kurochko
2026-06-05 9:07 ` Jan Beulich [this message]
2026-05-08 14:43 ` [PATCH v2 21/26] xen/riscv: implement virtual APLIC MMIO emulation Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 22/26] xen/riscv: implement init_intc_phandle() Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 23/26] xen/riscv: initialize RCU, scheduler, and system domains in start_xen() Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 24/26] xen/riscv: provide init_vuart() Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 25/26] xen/riscv: add initial dom0less infrastructure support Oleksii Kurochko
2026-05-08 14:43 ` [PATCH v2 26/26] xen/riscv: manage IRQ_DISABLED flag in APLIC irq enable/disable callbacks Oleksii Kurochko
2026-05-18 15:38 ` [PATCH v2 00/26] Introduce enablemenant of dom0less Jan Beulich
2026-05-19 9:26 ` Oleksii Kurochko
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