Re: [PATCH 1/6] drm/xe/migrate: allow larger chunk sizes for identity VRAM clears

["Thomas Hellström" <thomas.hellstrom@linux.intel.com>]

On Fri, 2026-10-30 at 11:49 +0000, Matthew Auld wrote:
> xe_migrate_clear() currently clamps every clear pass to 8M. On
> platforms
> with Xe2 blitter instructions and no separate CCS copy emission, VRAM
> clears use the identity map without dynamic PTE updates and execute
> on
> the dedicated migration engine, so clamping each pass to 8M splits
> a 1G+ clear into 100+ jobs. 1G VRAM pages look quite normal in real
> workloads like llama.py with even a small model.
> 
> It looks like the 8M limit comes from wanting a ~1ms preemption
> granularity, and dates back to i915. But consider:
> 
> 1. Xe has kernel reserved BCS engine just for migrations on newer hw,
>    so no need to duke it out with userspace jobs. Further, we now
> also
>    dropped the GPU VM_BIND path, so there is now only a single
> migration
>    queue, so the ~1ms preemption granularity is maybe not a big deal
>    anymore.
> 
> 2. It does not take ~1ms to clear 8M (single MEM_SET) of VRAM through
>    the identity map. Currently we just lump everything in the same
>    bucket, even though we have VRAM clearing with identity, VRAM
>    clearing with PTE emit, and then copying between VRAM and system
>    memory, which will have different characteristics and performance.
>    Applying the same 8M limit everywhere seems overly cautious.
> 
> With that be more optimistic and bump the fast path VRAM clearing
> through identity map to 128M per single MEM_SET instruction. This
> still
> only takes up to around < ~2ms, or < ~1ms if boosted. For very large
> clears, this massively lowers the number of GPU jobs, reducing
> pressure
> on the bb pool and as a bonus gives slightly lower CPU/GPU overhead.
> 
> Assisted-by: LLM
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>

Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

> ---
>  drivers/gpu/drm/xe/xe_migrate.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> b/drivers/gpu/drm/xe/xe_migrate.c
> index 70408fa0a606..1a216fb12d2b 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -246,6 +246,7 @@ struct xe_migrate {
>  
>  #define MAX_PREEMPTDISABLE_TRANSFER SZ_8M /* Around 1ms. */
>  #define MAX_CCS_LIMITED_TRANSFER SZ_4M /* XE_PAGE_SIZE *
> (FIELD_MAX(XE2_CCS_SIZE_MASK) + 1) */
> +#define MAX_IDENTITY_CLEAR_TRANSFER SZ_128M
>  #define NUM_PT_SLOTS 48
>  #define LEVEL0_PAGE_TABLE_ENCODE_SIZE SZ_2M
>  #define MAX_NUM_PTE 512
> @@ -1964,6 +1965,11 @@ struct dma_fence *xe_migrate_clear(struct
> xe_migrate *m,
>  		u32 avail_pts = max_mem_transfer_per_pass(xe) /
> LEVEL0_PAGE_TABLE_ENCODE_SIZE;
>  
>  		clear_L0 = xe_migrate_res_sizes(m, &src_it);
> +		if (clear_vram && !xe_migrate_needs_ccs_emit(xe) &&
> +		    gt->info.has_xe2_blt_instructions &&
> +		    xe_migrate_allow_identity(clear_L0, &src_it))
> +			clear_L0 = min_t(u64,
> MAX_IDENTITY_CLEAR_TRANSFER,
> +					 src_it.size);
>  
>  		/* Calculate final sizes and batch size.. */
>  		pte_flags = clear_vram ? PTE_UPDATE_FLAG_IS_VRAM :
> 0;