From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Roger Pau Monné" <roger.pau@citrix.com>,
"Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>,
Xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH] x86/tsx: Cope with RTM_ALWAYS_ABORT vs RTM mismatch
Date: Fri, 5 Apr 2024 14:01:50 +0100 [thread overview]
Message-ID: <ea554cd5-8578-49ae-adb6-e2dfab6cb946@citrix.com> (raw)
In-Reply-To: <071e8a23-6a16-4a61-aa42-1f85a9c98203@suse.com>
On 04/04/2024 2:32 pm, Jan Beulich wrote:
> On 04.04.2024 15:22, Andrew Cooper wrote:
>> On 04/04/2024 1:45 pm, Jan Beulich wrote:
>>> For the write-discard property, how was that determined? Does it affect all
>>> writable bits?
>> Marek kindly ran a debugging patch for me last night to try and figure
>> out what was going on.
>>
>> Currently, Xen tries to set 0x2 (TSX_CPUID_CLEAR) and debugging showed
>> it being read back as 0.
>>
>> I didn't check anything else, but I have a strong suspicion that I know
>> exactly what's going wrong here.
> Hmm, at the risk of upsetting you: Is a suspicion really enough for a
> firm statement in a comment?
The statement is all demonstrable properties.
The suspicion is about *why* we've ended up with the properties we have,
and is based on my involvement in the original planning for this.
>> The property the if() condition is mainly looking for is !RTM &&
>> !(MSR_TFA.CPUID_CLEAR) because that's an illegal state in a
>>
>>>> + * Spot this case, and treat it as if no TSX is available at all.
>>>> + * This will prevent Xen from thinking it's safe to offer HLE/RTM
>>>> + * to VMs.
>>>> + */
>>>> + if ( val == 0 && cpu_has_rtm_always_abort && !cpu_has_rtm )
>>>> + {
>>>> + printk(XENLOG_ERR
>>>> + "FIRMWARE BUG: CPU %02x-%02x-%02x, ucode 0x%08x: RTM_ALWAYS_ABORT vs RTM mismatch\n",
>>> This isn't really firmware, is it? At least I wouldn't call microcode
>>> (assuming that's where the bad behavior is rooted) firmware.
>> Microcode is absolutely part of the system firmware.
> The ucode ahead of being loaded into CPUs is, sure. But once in the CPU
> (and there may not be any loading at least in theory), it's not anymore.
You appear to have a very singular impression of what does and does not
constitute firmware.
If you can change Intel and AMD's mind on this matter, feel free to
submit a patch changing the wording here.
~Andrew
next prev parent reply other threads:[~2024-04-05 13:02 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-03 14:50 text-tsx fails on Intel core 8th gen system Marek Marczykowski-Górecki
2024-04-03 15:04 ` Jan Beulich
2024-04-03 16:41 ` Marek Marczykowski-Górecki
2024-04-04 6:07 ` Jan Beulich
2024-04-03 17:09 ` Andrew Cooper
2024-04-04 10:41 ` [PATCH] x86/tsx: Cope with RTM_ALWAYS_ABORT vs RTM mismatch Andrew Cooper
2024-04-04 11:02 ` Marek Marczykowski-Górecki
2024-04-04 12:45 ` Jan Beulich
2024-04-04 13:22 ` Andrew Cooper
2024-04-04 13:32 ` Jan Beulich
2024-04-05 13:01 ` Andrew Cooper [this message]
2024-04-05 13:25 ` Jan Beulich
2024-04-05 13:07 ` [PATCH v2] " Andrew Cooper
2024-04-05 13:40 ` Jan Beulich
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