[PATCH 0/4] Some more _types.h cleanups

[PATCH 0/4] Some more _types.h cleanups

[Michal Wajdeczko]

Promote xe_mmio and xe_tile definitions to own files.

Michal Wajdeczko (4):
  drm/xe: Move xe_root_tile_mmio() to xe_device.h
  drm/xe: Promote struct xe_mmio definition to own file
  drm/xe: Promote struct xe_tile definition to own file
  drm/xe: Drop unnecessary include from xe_tile.h

 drivers/gpu/drm/xe/xe_device.h       |   5 +
 drivers/gpu/drm/xe/xe_device_types.h | 197 +--------------------------
 drivers/gpu/drm/xe/xe_mmio.h         |   8 +-
 drivers/gpu/drm/xe/xe_mmio_types.h   |  53 +++++++
 drivers/gpu/drm/xe/xe_tile.h         |   3 +-
 drivers/gpu/drm/xe/xe_tile_sysfs.c   |   2 +-
 drivers/gpu/drm/xe/xe_tile_types.h   | 172 +++++++++++++++++++++++
 7 files changed, 236 insertions(+), 204 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_mmio_types.h
 create mode 100644 drivers/gpu/drm/xe/xe_tile_types.h

-- 
2.47.1

[PATCH 1/4] drm/xe: Move xe_root_tile_mmio() to xe_device.h

[Michal Wajdeczko]

It seems to be a better place for this helper function.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_device.h | 5 +++++
 drivers/gpu/drm/xe/xe_mmio.h   | 5 -----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 0bc3bc8e6803..884e8e4fddbf 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -117,6 +117,11 @@ static inline struct xe_gt *xe_root_mmio_gt(struct xe_device *xe)
 	return xe_device_get_root_tile(xe)->primary_gt;
 }
 
+static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)
+{
+	return &xe->tiles[0].mmio;
+}
+
 static inline bool xe_device_uc_enabled(struct xe_device *xe)
 {
 	return !xe->info.force_execlist;
diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
index c151ba569003..540bade24790 100644
--- a/drivers/gpu/drm/xe/xe_mmio.h
+++ b/drivers/gpu/drm/xe/xe_mmio.h
@@ -37,9 +37,4 @@ static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)
 	return addr;
 }
 
-static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)
-{
-	return &xe->tiles[0].mmio;
-}
-
 #endif
-- 
2.47.1

[PATCH 2/4] drm/xe: Promote struct xe_mmio definition to own file

[Michal Wajdeczko]

We already have separate .c and .h files for xe_mmio functions,
time to introduce _types.h to follow what other components do.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_device_types.h | 40 +--------------------
 drivers/gpu/drm/xe/xe_mmio.h         |  3 +-
 drivers/gpu/drm/xe/xe_mmio_types.h   | 53 ++++++++++++++++++++++++++++
 3 files changed, 56 insertions(+), 40 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_mmio_types.h

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index b93c04466637..831dd88a4c52 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -17,6 +17,7 @@
 #include "xe_heci_gsc.h"
 #include "xe_lmtt_types.h"
 #include "xe_memirq_types.h"
+#include "xe_mmio_types.h"
 #include "xe_oa_types.h"
 #include "xe_platform_types.h"
 #include "xe_pmu_types.h"
@@ -121,45 +122,6 @@ struct xe_vram_region {
 #endif
 };
 
-/**
- * struct xe_mmio - register mmio structure
- *
- * Represents an MMIO region that the CPU may use to access registers.  A
- * region may share its IO map with other regions (e.g., all GTs within a
- * tile share the same map with their parent tile, but represent different
- * subregions of the overall IO space).
- */
-struct xe_mmio {
-	/** @tile: Backpointer to tile, used for tracing */
-	struct xe_tile *tile;
-
-	/** @regs: Map used to access registers. */
-	void __iomem *regs;
-
-	/**
-	 * @sriov_vf_gt: Backpointer to GT.
-	 *
-	 * This pointer is only set for GT MMIO regions and only when running
-	 * as an SRIOV VF structure
-	 */
-	struct xe_gt *sriov_vf_gt;
-
-	/**
-	 * @regs_size: Length of the register region within the map.
-	 *
-	 * The size of the iomap set in *regs is generally larger than the
-	 * register mmio space since it includes unused regions and/or
-	 * non-register regions such as the GGTT PTEs.
-	 */
-	size_t regs_size;
-
-	/** @adj_limit: adjust MMIO address if address is below this value */
-	u32 adj_limit;
-
-	/** @adj_offset: offset to add to MMIO address when adjusting */
-	u32 adj_offset;
-};
-
 /**
  * struct xe_tile - hardware tile structure
  *
diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
index 540bade24790..4e794757b020 100644
--- a/drivers/gpu/drm/xe/xe_mmio.h
+++ b/drivers/gpu/drm/xe/xe_mmio.h
@@ -6,9 +6,10 @@
 #ifndef _XE_MMIO_H_
 #define _XE_MMIO_H_
 
-#include "xe_gt_types.h"
+#include "xe_mmio_types.h"
 
 struct xe_device;
+struct xe_mmio_range;
 struct xe_reg;
 
 int xe_mmio_probe_early(struct xe_device *xe);
diff --git a/drivers/gpu/drm/xe/xe_mmio_types.h b/drivers/gpu/drm/xe/xe_mmio_types.h
new file mode 100644
index 000000000000..67c535dd1248
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_mmio_types.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022-2025 Intel Corporation
+ */
+
+#ifndef _XE_MMIO_TYPES_H_
+#define _XE_MMIO_TYPES_H_
+
+#include <linux/types.h>
+
+struct xe_gt;
+struct xe_tile;
+
+/**
+ * struct xe_mmio - register mmio structure
+ *
+ * Represents an MMIO region that the CPU may use to access registers.  A
+ * region may share its IO map with other regions (e.g., all GTs within a
+ * tile share the same map with their parent tile, but represent different
+ * subregions of the overall IO space).
+ */
+struct xe_mmio {
+	/** @tile: Backpointer to tile, used for tracing */
+	struct xe_tile *tile;
+
+	/** @regs: Map used to access registers. */
+	void __iomem *regs;
+
+	/**
+	 * @sriov_vf_gt: Backpointer to GT.
+	 *
+	 * This pointer is only set for GT MMIO regions and only when running
+	 * as an SRIOV VF structure
+	 */
+	struct xe_gt *sriov_vf_gt;
+
+	/**
+	 * @regs_size: Length of the register region within the map.
+	 *
+	 * The size of the iomap set in *regs is generally larger than the
+	 * register mmio space since it includes unused regions and/or
+	 * non-register regions such as the GGTT PTEs.
+	 */
+	size_t regs_size;
+
+	/** @adj_limit: adjust MMIO address if address is below this value */
+	u32 adj_limit;
+
+	/** @adj_offset: offset to add to MMIO address when adjusting */
+	u32 adj_offset;
+};
+
+#endif
-- 
2.47.1

[PATCH 3/4] drm/xe: Promote struct xe_tile definition to own file

[Michal Wajdeczko]

We already have separate .c and .h files for xe_tile functions,
time to introduce _types.h to follow what other components do.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_device_types.h | 159 +------------------------
 drivers/gpu/drm/xe/xe_tile_types.h   | 172 +++++++++++++++++++++++++++
 2 files changed, 173 insertions(+), 158 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_tile_types.h

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 831dd88a4c52..c9401acb6710 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -10,14 +10,10 @@
 
 #include <drm/drm_device.h>
 #include <drm/drm_file.h>
-#include <drm/drm_pagemap.h>
 #include <drm/ttm/ttm_device.h>
 
 #include "xe_devcoredump_types.h"
 #include "xe_heci_gsc.h"
-#include "xe_lmtt_types.h"
-#include "xe_memirq_types.h"
-#include "xe_mmio_types.h"
 #include "xe_oa_types.h"
 #include "xe_platform_types.h"
 #include "xe_pmu_types.h"
@@ -25,14 +21,13 @@
 #include "xe_sriov_types.h"
 #include "xe_step_types.h"
 #include "xe_survivability_mode_types.h"
-#include "xe_ttm_vram_mgr_types.h"
+#include "xe_tile_types.h"
 
 #if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
 #define TEST_VM_OPS_ERROR
 #endif
 
 struct intel_display;
-struct xe_ggtt;
 struct xe_pat_ops;
 struct xe_pxp;
 
@@ -62,158 +57,6 @@ struct xe_pxp;
 	 (_xe)->info.step.graphics >= (min_step) &&			\
 	 (_xe)->info.step.graphics < (max_step))
 
-#define tile_to_xe(tile__)								\
-	_Generic(tile__,								\
-		 const struct xe_tile * : (const struct xe_device *)((tile__)->xe),	\
-		 struct xe_tile * : (tile__)->xe)
-
-/**
- * struct xe_vram_region - memory region structure
- * This is used to describe a memory region in xe
- * device, such as HBM memory or CXL extension memory.
- */
-struct xe_vram_region {
-	/** @io_start: IO start address of this VRAM instance */
-	resource_size_t io_start;
-	/**
-	 * @io_size: IO size of this VRAM instance
-	 *
-	 * This represents how much of this VRAM we can access
-	 * via the CPU through the VRAM BAR. This can be smaller
-	 * than @usable_size, in which case only part of VRAM is CPU
-	 * accessible (typically the first 256M). This
-	 * configuration is known as small-bar.
-	 */
-	resource_size_t io_size;
-	/** @dpa_base: This memory regions's DPA (device physical address) base */
-	resource_size_t dpa_base;
-	/**
-	 * @usable_size: usable size of VRAM
-	 *
-	 * Usable size of VRAM excluding reserved portions
-	 * (e.g stolen mem)
-	 */
-	resource_size_t usable_size;
-	/**
-	 * @actual_physical_size: Actual VRAM size
-	 *
-	 * Actual VRAM size including reserved portions
-	 * (e.g stolen mem)
-	 */
-	resource_size_t actual_physical_size;
-	/** @mapping: pointer to VRAM mappable space */
-	void __iomem *mapping;
-	/** @ttm: VRAM TTM manager */
-	struct xe_ttm_vram_mgr ttm;
-#if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR)
-	/** @pagemap: Used to remap device memory as ZONE_DEVICE */
-	struct dev_pagemap pagemap;
-	/**
-	 * @dpagemap: The struct drm_pagemap of the ZONE_DEVICE memory
-	 * pages of this tile.
-	 */
-	struct drm_pagemap dpagemap;
-	/**
-	 * @hpa_base: base host physical address
-	 *
-	 * This is generated when remap device memory as ZONE_DEVICE
-	 */
-	resource_size_t hpa_base;
-#endif
-};
-
-/**
- * struct xe_tile - hardware tile structure
- *
- * From a driver perspective, a "tile" is effectively a complete GPU, containing
- * an SGunit, 1-2 GTs, and (for discrete platforms) VRAM.
- *
- * Multi-tile platforms effectively bundle multiple GPUs behind a single PCI
- * device and designate one "root" tile as being responsible for external PCI
- * communication.  PCI BAR0 exposes the GGTT and MMIO register space for each
- * tile in a stacked layout, and PCI BAR2 exposes the local memory associated
- * with each tile similarly.  Device-wide interrupts can be enabled/disabled
- * at the root tile, and the MSTR_TILE_INTR register will report which tiles
- * have interrupts that need servicing.
- */
-struct xe_tile {
-	/** @xe: Backpointer to tile's PCI device */
-	struct xe_device *xe;
-
-	/** @id: ID of the tile */
-	u8 id;
-
-	/**
-	 * @primary_gt: Primary GT
-	 */
-	struct xe_gt *primary_gt;
-
-	/**
-	 * @media_gt: Media GT
-	 *
-	 * Only present on devices with media version >= 13.
-	 */
-	struct xe_gt *media_gt;
-
-	/**
-	 * @mmio: MMIO info for a tile.
-	 *
-	 * Each tile has its own 16MB space in BAR0, laid out as:
-	 * * 0-4MB: registers
-	 * * 4MB-8MB: reserved
-	 * * 8MB-16MB: global GTT
-	 */
-	struct xe_mmio mmio;
-
-	/** @mem: memory management info for tile */
-	struct {
-		/**
-		 * @mem.vram: VRAM info for tile.
-		 *
-		 * Although VRAM is associated with a specific tile, it can
-		 * still be accessed by all tiles' GTs.
-		 */
-		struct xe_vram_region vram;
-
-		/** @mem.ggtt: Global graphics translation table */
-		struct xe_ggtt *ggtt;
-
-		/**
-		 * @mem.kernel_bb_pool: Pool from which batchbuffers are allocated.
-		 *
-		 * Media GT shares a pool with its primary GT.
-		 */
-		struct xe_sa_manager *kernel_bb_pool;
-	} mem;
-
-	/** @sriov: tile level virtualization data */
-	union {
-		struct {
-			/** @sriov.pf.lmtt: Local Memory Translation Table. */
-			struct xe_lmtt lmtt;
-		} pf;
-		struct {
-			/** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
-			struct xe_ggtt_node *ggtt_balloon[2];
-		} vf;
-	} sriov;
-
-	/** @memirq: Memory Based Interrupts. */
-	struct xe_memirq memirq;
-
-	/** @pcode: tile's PCODE */
-	struct {
-		/** @pcode.lock: protecting tile's PCODE mailbox data */
-		struct mutex lock;
-	} pcode;
-
-	/** @migrate: Migration helper for vram blits and clearing */
-	struct xe_migrate *migrate;
-
-	/** @sysfs: sysfs' kobj used by xe_tile_sysfs */
-	struct kobject *sysfs;
-};
-
 /**
  * struct xe_device - Top level struct of XE device
  */
diff --git a/drivers/gpu/drm/xe/xe_tile_types.h b/drivers/gpu/drm/xe/xe_tile_types.h
new file mode 100644
index 000000000000..572b6c4b651d
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_tile_types.h
@@ -0,0 +1,172 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022-2025 Intel Corporation
+ */
+
+#ifndef _XE_TILE_TYPES_H_
+#define _XE_TILE_TYPES_H_
+
+#include <drm/drm_pagemap.h>
+
+#include "xe_lmtt_types.h"
+#include "xe_memirq_types.h"
+#include "xe_mmio_types.h"
+#include "xe_ttm_vram_mgr_types.h"
+
+struct xe_device;
+struct xe_ggtt;
+struct xe_gt;
+
+#define tile_to_xe(tile__)								\
+	_Generic(tile__,								\
+		 const struct xe_tile * : (const struct xe_device *)((tile__)->xe),	\
+		 struct xe_tile * : (tile__)->xe)
+
+/**
+ * struct xe_vram_region - memory region structure
+ * This is used to describe a memory region in xe
+ * device, such as HBM memory or CXL extension memory.
+ */
+struct xe_vram_region {
+	/** @io_start: IO start address of this VRAM instance */
+	resource_size_t io_start;
+	/**
+	 * @io_size: IO size of this VRAM instance
+	 *
+	 * This represents how much of this VRAM we can access
+	 * via the CPU through the VRAM BAR. This can be smaller
+	 * than @usable_size, in which case only part of VRAM is CPU
+	 * accessible (typically the first 256M). This
+	 * configuration is known as small-bar.
+	 */
+	resource_size_t io_size;
+	/** @dpa_base: This memory regions's DPA (device physical address) base */
+	resource_size_t dpa_base;
+	/**
+	 * @usable_size: usable size of VRAM
+	 *
+	 * Usable size of VRAM excluding reserved portions
+	 * (e.g stolen mem)
+	 */
+	resource_size_t usable_size;
+	/**
+	 * @actual_physical_size: Actual VRAM size
+	 *
+	 * Actual VRAM size including reserved portions
+	 * (e.g stolen mem)
+	 */
+	resource_size_t actual_physical_size;
+	/** @mapping: pointer to VRAM mappable space */
+	void __iomem *mapping;
+	/** @ttm: VRAM TTM manager */
+	struct xe_ttm_vram_mgr ttm;
+#if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR)
+	/** @pagemap: Used to remap device memory as ZONE_DEVICE */
+	struct dev_pagemap pagemap;
+	/**
+	 * @dpagemap: The struct drm_pagemap of the ZONE_DEVICE memory
+	 * pages of this tile.
+	 */
+	struct drm_pagemap dpagemap;
+	/**
+	 * @hpa_base: base host physical address
+	 *
+	 * This is generated when remap device memory as ZONE_DEVICE
+	 */
+	resource_size_t hpa_base;
+#endif
+};
+
+/**
+ * struct xe_tile - hardware tile structure
+ *
+ * From a driver perspective, a "tile" is effectively a complete GPU, containing
+ * an SGunit, 1-2 GTs, and (for discrete platforms) VRAM.
+ *
+ * Multi-tile platforms effectively bundle multiple GPUs behind a single PCI
+ * device and designate one "root" tile as being responsible for external PCI
+ * communication.  PCI BAR0 exposes the GGTT and MMIO register space for each
+ * tile in a stacked layout, and PCI BAR2 exposes the local memory associated
+ * with each tile similarly.  Device-wide interrupts can be enabled/disabled
+ * at the root tile, and the MSTR_TILE_INTR register will report which tiles
+ * have interrupts that need servicing.
+ */
+struct xe_tile {
+	/** @xe: Backpointer to tile's PCI device */
+	struct xe_device *xe;
+
+	/** @id: ID of the tile */
+	u8 id;
+
+	/**
+	 * @primary_gt: Primary GT
+	 */
+	struct xe_gt *primary_gt;
+
+	/**
+	 * @media_gt: Media GT
+	 *
+	 * Only present on devices with media version >= 13.
+	 */
+	struct xe_gt *media_gt;
+
+	/**
+	 * @mmio: MMIO info for a tile.
+	 *
+	 * Each tile has its own 16MB space in BAR0, laid out as:
+	 * * 0-4MB: registers
+	 * * 4MB-8MB: reserved
+	 * * 8MB-16MB: global GTT
+	 */
+	struct xe_mmio mmio;
+
+	/** @mem: memory management info for tile */
+	struct {
+		/**
+		 * @mem.vram: VRAM info for tile.
+		 *
+		 * Although VRAM is associated with a specific tile, it can
+		 * still be accessed by all tiles' GTs.
+		 */
+		struct xe_vram_region vram;
+
+		/** @mem.ggtt: Global graphics translation table */
+		struct xe_ggtt *ggtt;
+
+		/**
+		 * @mem.kernel_bb_pool: Pool from which batchbuffers are allocated.
+		 *
+		 * Media GT shares a pool with its primary GT.
+		 */
+		struct xe_sa_manager *kernel_bb_pool;
+	} mem;
+
+	/** @sriov: tile level virtualization data */
+	union {
+		struct {
+			/** @sriov.pf.lmtt: Local Memory Translation Table. */
+			struct xe_lmtt lmtt;
+		} pf;
+		struct {
+			/** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
+			struct xe_ggtt_node *ggtt_balloon[2];
+		} vf;
+	} sriov;
+
+	/** @memirq: Memory Based Interrupts. */
+	struct xe_memirq memirq;
+
+	/** @pcode: tile's PCODE */
+	struct {
+		/** @pcode.lock: protecting tile's PCODE mailbox data */
+		struct mutex lock;
+	} pcode;
+
+	/** @migrate: Migration helper for vram blits and clearing */
+	struct xe_migrate *migrate;
+
+	/** @sysfs: sysfs' kobj used by xe_tile_sysfs */
+	struct kobject *sysfs;
+};
+
+#endif
-- 
2.47.1

[PATCH 4/4] drm/xe: Drop unnecessary include from xe_tile.h

[Michal Wajdeczko]

We don't need to include xe_device_types.h there.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_tile.h       | 3 ++-
 drivers/gpu/drm/xe/xe_tile_sysfs.c | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_tile.h b/drivers/gpu/drm/xe/xe_tile.h
index eb939316d55b..5ade71bda89a 100644
--- a/drivers/gpu/drm/xe/xe_tile.h
+++ b/drivers/gpu/drm/xe/xe_tile.h
@@ -6,8 +6,9 @@
 #ifndef _XE_TILE_H_
 #define _XE_TILE_H_
 
-#include "xe_device_types.h"
+#include <linux/types.h>
 
+struct xe_device;
 struct xe_tile;
 
 int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id);
diff --git a/drivers/gpu/drm/xe/xe_tile_sysfs.c b/drivers/gpu/drm/xe/xe_tile_sysfs.c
index b804234a6551..6dcac829839d 100644
--- a/drivers/gpu/drm/xe/xe_tile_sysfs.c
+++ b/drivers/gpu/drm/xe/xe_tile_sysfs.c
@@ -7,8 +7,8 @@
 #include <linux/sysfs.h>
 #include <drm/drm_managed.h>
 
+#include "xe_device_types.h"
 #include "xe_pm.h"
-#include "xe_tile.h"
 #include "xe_tile_sysfs.h"
 #include "xe_vram_freq.h"
 
-- 
2.47.1

✓ CI.Patch_applied: success for Some more _types.h cleanups

[Patchwork]

== Series Details ==

Series: Some more _types.h cleanups
URL   : https://patchwork.freedesktop.org/series/149807/
State : success

== Summary ==

=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: ba486e3b10ce drm-tip: 2025y-06m-03d-16h-48m-17s UTC integration manifest
=== git am output follows ===
Applying: drm/xe: Move xe_root_tile_mmio() to xe_device.h
Applying: drm/xe: Promote struct xe_mmio definition to own file
Applying: drm/xe: Promote struct xe_tile definition to own file
Applying: drm/xe: Drop unnecessary include from xe_tile.h

✗ CI.checkpatch: warning for Some more _types.h cleanups

[Patchwork]

== Series Details ==

Series: Some more _types.h cleanups
URL   : https://patchwork.freedesktop.org/series/149807/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
202708c00696422fd217223bb679a353a5936e23
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 816c847264734fb5f55fe9d59b3f30cec16290b9
Author: Michal Wajdeczko <michal.wajdeczko@intel.com>
Date:   Tue Jun 3 22:28:26 2025 +0200

    drm/xe: Drop unnecessary include from xe_tile.h
    
    We don't need to include xe_device_types.h there.
    
    Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
    Cc: Lucas De Marchi <lucas.demarchi@intel.com>
+ /mt/dim checkpatch ba486e3b10ce5b4ee4d1ffc58aa4cc3b669c02a3 drm-intel
ad98c23df6f4 drm/xe: Move xe_root_tile_mmio() to xe_device.h
0f10bbea759c drm/xe: Promote struct xe_mmio definition to own file
-:88: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#88: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 116 lines checked
1e405379d958 drm/xe: Promote struct xe_tile definition to own file
-:208: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#208: 
new file mode 100644

-:232: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'tile__' - possible side-effects?
#232: FILE: drivers/gpu/drm/xe/xe_tile_types.h:20:
+#define tile_to_xe(tile__)								\
+	_Generic(tile__,								\
+		 const struct xe_tile * : (const struct xe_device *)((tile__)->xe),	\
+		 struct xe_tile * : (tile__)->xe)

total: 0 errors, 1 warnings, 1 checks, 359 lines checked
816c84726473 drm/xe: Drop unnecessary include from xe_tile.h

✗ CI.KUnit: failure for Some more _types.h cleanups

[Patchwork]

== Series Details ==

Series: Some more _types.h cleanups
URL   : https://patchwork.freedesktop.org/series/149807/
State : failure

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:33:44] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:33:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:34:14] Starting KUnit Kernel (1/1)...
[20:34:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:34:14] ================== guc_buf (11 subtests) ===================
[20:34:14] [PASSED] test_smallest
[20:34:14] [PASSED] test_largest
[20:34:14] [PASSED] test_granular
[20:34:14] [PASSED] test_unique
[20:34:14] [PASSED] test_overlap
[20:34:14] [PASSED] test_reusable
[20:34:14] [PASSED] test_too_big
[20:34:14] [PASSED] test_flush
[20:34:14] [PASSED] test_lookup
[20:34:14] [PASSED] test_data
[20:34:14] [PASSED] test_class
[20:34:14] ===================== [PASSED] guc_buf =====================
[20:34:14] =================== guc_dbm (7 subtests) ===================
[20:34:14] [PASSED] test_empty
[20:34:14] [PASSED] test_default
[20:34:14] ======================== test_size  ========================
[20:34:14] [PASSED] 4
[20:34:14] [PASSED] 8
[20:34:14] [PASSED] 32
[20:34:14] [PASSED] 256
[20:34:14] ==================== [PASSED] test_size ====================
[20:34:14] ======================= test_reuse  ========================
[20:34:14] [PASSED] 4
[20:34:14] [PASSED] 8
[20:34:14] [PASSED] 32
[20:34:14] [PASSED] 256
[20:34:14] =================== [PASSED] test_reuse ====================
[20:34:14] =================== test_range_overlap  ====================
[20:34:14] [PASSED] 4
[20:34:14] [PASSED] 8
[20:34:14] [PASSED] 32
[20:34:14] [PASSED] 256
[20:34:14] =============== [PASSED] test_range_overlap ================
[20:34:14] =================== test_range_compact  ====================
[20:34:14] [PASSED] 4
[20:34:14] [PASSED] 8
[20:34:14] [PASSED] 32
[20:34:14] [PASSED] 256
[20:34:14] =============== [PASSED] test_range_compact ================
[20:34:14] ==================== test_range_spare  =====================
[20:34:14] [PASSED] 4
[20:34:14] [PASSED] 8
[20:34:14] [PASSED] 32
[20:34:14] [PASSED] 256
[20:34:14] ================ [PASSED] test_range_spare =================
[20:34:14] ===================== [PASSED] guc_dbm =====================
[20:34:14] =================== guc_idm (6 subtests) ===================
[20:34:14] [PASSED] bad_init
[20:34:14] [PASSED] no_init
[20:34:14] [PASSED] init_fini
[20:34:14] [PASSED] check_used
[20:34:14] [PASSED] check_quota
[20:34:14] [PASSED] check_all
[20:34:14] ===================== [PASSED] guc_idm =====================
[20:34:14] ================== no_relay (3 subtests) ===================
[20:34:14] [PASSED] xe_drops_guc2pf_if_not_ready
[20:34:14] [PASSED] xe_drops_guc2vf_if_not_ready
[20:34:14] [PASSED] xe_rejects_send_if_not_ready
[20:34:14] ==================== [PASSED] no_relay =====================
[20:34:14] ================== pf_relay (14 subtests) ==================
[20:34:14] [PASSED] pf_rejects_guc2pf_too_short
[20:34:14] [PASSED] pf_rejects_guc2pf_too_long
[20:34:14] [PASSED] pf_rejects_guc2pf_no_payload
[20:34:14] [PASSED] pf_fails_no_payload
[20:34:14] [PASSED] pf_fails_bad_origin
[20:34:14] [PASSED] pf_fails_bad_type
[20:34:14] [PASSED] pf_txn_reports_error
[20:34:14] [PASSED] pf_txn_sends_pf2guc
[20:34:14] [PASSED] pf_sends_pf2guc
[20:34:14] [SKIPPED] pf_loopback_nop
[20:34:14] [SKIPPED] pf_loopback_echo
[20:34:14] [SKIPPED] pf_loopback_fail
[20:34:14] [SKIPPED] pf_loopback_busy
[20:34:14] [SKIPPED] pf_loopback_retry
[20:34:14] ==================== [PASSED] pf_relay =====================
[20:34:14] ================== vf_relay (3 subtests) ===================
[20:34:14] [PASSED] vf_rejects_guc2vf_too_short
[20:34:14] [PASSED] vf_rejects_guc2vf_too_long
[20:34:14] [PASSED] vf_rejects_guc2vf_no_payload
[20:34:14] ==================== [PASSED] vf_relay =====================
[20:34:14] ================= pf_service (11 subtests) =================
[20:34:14] [PASSED] pf_negotiate_any
[20:34:14] [PASSED] pf_negotiate_base_match
[20:34:14] [PASSED] pf_negotiate_base_newer
[20:34:14] [PASSED] pf_negotiate_base_next
[20:34:14] [SKIPPED] pf_negotiate_base_older
[20:34:14] [PASSED] pf_negotiate_base_prev
[20:34:14] [PASSED] pf_negotiate_latest_match
[20:34:14] [PASSED] pf_negotiate_latest_newer
[20:34:14] [PASSED] pf_negotiate_latest_next
[20:34:14] [SKIPPED] pf_negotiate_latest_older
[20:34:14] [SKIPPED] pf_negotiate_latest_prev
[20:34:14] =================== [PASSED] pf_service ====================
[20:34:14] ===================== lmtt (1 subtest) =====================
[20:34:14] ======================== test_ops  =========================
[20:34:14] [PASSED] 2-level
[20:34:14] [PASSED] multi-level
[20:34:14] ==================== [PASSED] test_ops =====================
[20:34:14] ====================== [PASSED] lmtt =======================
[20:34:14] =================== xe_mocs (2 subtests) ===================
[20:34:14] ================ xe_live_mocs_kernel_kunit  ================
[20:34:14] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:34:14] ================ xe_live_mocs_reset_kunit  =================
[20:34:14] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:34:14] ==================== [SKIPPED] xe_mocs =====================
[20:34:14] ================= xe_migrate (2 subtests) ==================
[20:34:14] ================= xe_migrate_sanity_kunit  =================
[20:34:14] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:34:14] ================== xe_validate_ccs_kunit  ==================
[20:34:14] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:34:14] =================== [SKIPPED] xe_migrate ===================
[20:34:14] ================== xe_dma_buf (1 subtest) ==================
[20:34:14] ==================== xe_dma_buf_kunit  =====================
[20:34:14] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:34:14] =================== [SKIPPED] xe_dma_buf ===================
[20:34:14] ================= xe_bo_shrink (1 subtest) =================
[20:34:14] =================== xe_bo_shrink_kunit  ====================
[20:34:14] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:34:14] ================== [SKIPPED] xe_bo_shrink ==================
[20:34:14] ==================== xe_bo (2 subtests) ====================
[20:34:14] ================== xe_ccs_migrate_kunit  ===================
[20:34:14] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:34:14] ==================== xe_bo_evict_kunit  ====================
[20:34:14] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:34:14] ===================== [SKIPPED] xe_bo ======================
[20:34:14] ==================== args (11 subtests) ====================
[20:34:14] [PASSED] count_args_test
[20:34:14] [PASSED] call_args_example
[20:34:14] [PASSED] call_args_test
[20:34:14] [PASSED] drop_first_arg_example
[20:34:14] [PASSED] drop_first_arg_test
[20:34:14] [PASSED] first_arg_example
[20:34:14] [PASSED] first_arg_test
[20:34:14] [PASSED] last_arg_example
[20:34:14] [PASSED] last_arg_test
[20:34:14] [PASSED] pick_arg_example
[20:34:14] [PASSED] sep_comma_example
[20:34:14] ====================== [PASSED] args =======================
[20:34:14] =================== xe_pci (2 subtests) ====================
[20:34:14] [PASSED] xe_gmdid_graphics_ip
[20:34:14] [PASSED] xe_gmdid_media_ip
[20:34:14] ===================== [PASSED] xe_pci ======================
[20:34:14] =================== xe_rtp (2 subtests) ====================
[20:34:14] =============== xe_rtp_process_to_sr_tests  ================
[20:34:14] [PASSED] coalesce-same-reg
[20:34:14] [PASSED] no-match-no-add
[20:34:14] [PASSED] match-or
[20:34:14] [PASSED] match-or-xfail
[20:34:14] [PASSED] no-match-no-add-multiple-rules
[20:34:14] [PASSED] two-regs-two-entries
[20:34:14] [PASSED] clr-one-set-other
[20:34:14] [PASSED] set-field
[20:34:14] [PASSED] conflict-duplicate
[20:34:14] [PASSED] conflict-not-disjoint
stty: 'standard input': Inappropriate ioctl for device
[20:34:14] [PASSED] conflict-reg-type
[20:34:14] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:34:14] ================== xe_rtp_process_tests  ===================
[20:34:14] [PASSED] active1
[20:34:14] [PASSED] active2
[20:34:14] [PASSED] active-inactive
[20:34:14] [PASSED] inactive-active
[20:34:14] [PASSED] inactive-1st_or_active-inactive
[20:34:14] [PASSED] inactive-2nd_or_active-inactive
[20:34:14] [PASSED] inactive-last_or_active-inactive
[20:34:14] [PASSED] inactive-no_or_active-inactive
[20:34:14] ============== [PASSED] xe_rtp_process_tests ===============
[20:34:14] ===================== [PASSED] xe_rtp ======================
[20:34:14] ==================== xe_wa (1 subtest) =====================
[20:34:14] ======================== xe_wa_gt  =========================
[20:34:14] [PASSED] TIGERLAKE (B0)
[20:34:14] [PASSED] DG1 (A0)
[20:34:14] [PASSED] DG1 (B0)
[20:34:14] [PASSED] ALDERLAKE_S (A0)
[20:34:14] [PASSED] ALDERLAKE_S (B0)
[20:34:14] [PASSED] ALDERLAKE_S (C0)
[20:34:14] [PASSED] ALDERLAKE_S (D0)
[20:34:14] [PASSED] ALDERLAKE_P (A0)
[20:34:14] [PASSED] ALDERLAKE_P (B0)
[20:34:14] [PASSED] ALDERLAKE_P (C0)
[20:34:14] [PASSED] ALDERLAKE_S_RPLS (D0)
[20:34:14] [PASSED] ALDERLAKE_P_RPLU (E0)
[20:34:14] [PASSED] DG2_G10 (C0)
[20:34:14] [PASSED] DG2_G11 (B1)
[20:34:14] [PASSED] DG2_G12 (A1)
[20:34:14] [PASSED] METEORLAKE (g:A0, m:A0)
[20:34:14] [PASSED] METEORLAKE (g:A0, m:A0)
[20:34:14] [PASSED] METEORLAKE (g:A0, m:A0)
[20:34:14] [PASSED] LUNARLAKE (g:A0, m:A0)
[20:34:14] [PASSED] LUNARLAKE (g:B0, m:A0)
[20:34:14] [PASSED] BATTLEMAGE (g:A0, m:A1)
[20:34:14] ==================== [PASSED] xe_wa_gt =====================
[20:34:14] ====================== [PASSED] xe_wa ======================
[20:34:14] ============================================================
[20:34:14] Testing complete. Ran 133 tests: passed: 117, skipped: 16
[20:34:14] Elapsed time: 30.820s total, 4.172s configuring, 26.333s building, 0.289s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:34:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:34:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:34:37] Starting KUnit Kernel (1/1)...
[20:34:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:34:38] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:34:38] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:34:38] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:34:38] =========== drm_validate_clone_mode (2 subtests) ===========
[20:34:38] ============== drm_test_check_in_clone_mode  ===============
[20:34:38] [PASSED] in_clone_mode
[20:34:38] [PASSED] not_in_clone_mode
[20:34:38] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:34:38] =============== drm_test_check_valid_clones  ===============
[20:34:38] [PASSED] not_in_clone_mode
[20:34:38] [PASSED] valid_clone
[20:34:38] [PASSED] invalid_clone
[20:34:38] =========== [PASSED] drm_test_check_valid_clones ===========
[20:34:38] ============= [PASSED] drm_validate_clone_mode =============
[20:34:38] ============= drm_validate_modeset (1 subtest) =============
[20:34:38] [PASSED] drm_test_check_connector_changed_modeset
[20:34:38] ============== [PASSED] drm_validate_modeset ===============
[20:34:38] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:34:38] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:34:38] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:34:38] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:34:38] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:34:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:34:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:34:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:34:38] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:34:38] ================== drm_buddy (7 subtests) ==================
[20:34:38] [PASSED] drm_test_buddy_alloc_limit
[20:34:38] [PASSED] drm_test_buddy_alloc_optimistic
[20:34:38] [PASSED] drm_test_buddy_alloc_pessimistic
[20:34:38] [PASSED] drm_test_buddy_alloc_pathological
[20:34:38] [PASSED] drm_test_buddy_alloc_contiguous
[20:34:38] [PASSED] drm_test_buddy_alloc_clear
[20:34:38] [PASSED] drm_test_buddy_alloc_range_bias
[20:34:38] ==================== [PASSED] drm_buddy ====================
[20:34:38] ============= drm_cmdline_parser (40 subtests) =============
[20:34:38] [PASSED] drm_test_cmdline_force_d_only
[20:34:38] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:34:38] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:34:38] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:34:38] [PASSED] drm_test_cmdline_force_e_only
[20:34:38] [PASSED] drm_test_cmdline_res
[20:34:38] [PASSED] drm_test_cmdline_res_vesa
[20:34:38] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:34:38] [PASSED] drm_test_cmdline_res_rblank
[20:34:38] [PASSED] drm_test_cmdline_res_bpp
[20:34:38] [PASSED] drm_test_cmdline_res_refresh
[20:34:38] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:34:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:34:38] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:34:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:34:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:34:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:34:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:34:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:34:38] [PASSED] drm_test_cmdline_res_margins_force_on
[20:34:38] [PASSED] drm_test_cmdline_res_vesa_margins
[20:34:38] [PASSED] drm_test_cmdline_name
[20:34:38] [PASSED] drm_test_cmdline_name_bpp
[20:34:38] [PASSED] drm_test_cmdline_name_option
[20:34:38] [PASSED] drm_test_cmdline_name_bpp_option
[20:34:38] [PASSED] drm_test_cmdline_rotate_0
[20:34:38] [PASSED] drm_test_cmdline_rotate_90
[20:34:38] [PASSED] drm_test_cmdline_rotate_180
[20:34:38] [PASSED] drm_test_cmdline_rotate_270
[20:34:38] [PASSED] drm_test_cmdline_hmirror
[20:34:38] [PASSED] drm_test_cmdline_vmirror
[20:34:38] [PASSED] drm_test_cmdline_margin_options
[20:34:38] [PASSED] drm_test_cmdline_multiple_options
[20:34:38] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:34:38] [PASSED] drm_test_cmdline_extra_and_option
[20:34:38] [PASSED] drm_test_cmdline_freestanding_options
[20:34:38] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:34:38] [PASSED] drm_test_cmdline_panel_orientation
[20:34:38] ================ drm_test_cmdline_invalid  =================
[20:34:38] [PASSED] margin_only
[20:34:38] [PASSED] interlace_only
[20:34:38] [PASSED] res_missing_x
[20:34:38] [PASSED] res_missing_y
[20:34:38] [PASSED] res_bad_y
[20:34:38] [PASSED] res_missing_y_bpp
[20:34:38] [PASSED] res_bad_bpp
[20:34:38] [PASSED] res_bad_refresh
[20:34:38] [PASSED] res_bpp_refresh_force_on_off
[20:34:38] [PASSED] res_invalid_mode
[20:34:38] [PASSED] res_bpp_wrong_place_mode
[20:34:38] [PASSED] name_bpp_refresh
[20:34:38] [PASSED] name_refresh
[20:34:38] [PASSED] name_refresh_wrong_mode
[20:34:38] [PASSED] name_refresh_invalid_mode
[20:34:38] [PASSED] rotate_multiple
[20:34:38] [PASSED] rotate_invalid_val
[20:34:38] [PASSED] rotate_truncated
[20:34:38] [PASSED] invalid_option
[20:34:38] [PASSED] invalid_tv_option
[20:34:38] [PASSED] truncated_tv_option
[20:34:38] ============ [PASSED] drm_test_cmdline_invalid =============
[20:34:38] =============== drm_test_cmdline_tv_options  ===============
[20:34:38] [PASSED] NTSC
[20:34:38] [PASSED] NTSC_443
[20:34:38] [PASSED] NTSC_J
[20:34:38] [PASSED] PAL
[20:34:38] [PASSED] PAL_M
[20:34:38] [PASSED] PAL_N
[20:34:38] [PASSED] SECAM
[20:34:38] [PASSED] MONO_525
[20:34:38] [PASSED] MONO_625
[20:34:38] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:34:38] =============== [PASSED] drm_cmdline_parser ================
[20:34:38] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:34:38] [PASSED] drm_test_connector_hdmi_init_valid
[20:34:38] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:34:38] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:34:38] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:34:38] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:34:38] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:34:38] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:34:38] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:34:38] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:34:38] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:34:38] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:34:38] [PASSED] supported_formats=0x3 yuv420_allowed=1
[20:34:38] [PASSED] supported_formats=0x3 yuv420_allowed=0
[20:34:38] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:34:38] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:34:38] [PASSED] drm_test_connector_hdmi_init_null_product
[20:34:38] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:34:38] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:34:38] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:34:38] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:34:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:34:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:34:38] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:34:38] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:34:38] [PASSED] HDMI-A
[20:34:38] [PASSED] HDMI-B
[20:34:38] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:34:38] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:34:38] [PASSED] Unknown
[20:34:38] [PASSED] VGA
[20:34:38] [PASSED] DVI-I
[20:34:38] [PASSED] DVI-D
[20:34:38] [PASSED] DVI-A
[20:34:38] [PASSED] Composite
[20:34:38] [PASSED] SVIDEO
[20:34:38] [PASSED] LVDS
[20:34:38] [PASSED] Component
[20:34:38] [PASSED] DIN
[20:34:38] [PASSED] DP
[20:34:38] [PASSED] TV
[20:34:38] [PASSED] eDP
[20:34:38] [PASSED] Virtual
[20:34:38] [PASSED] DSI
[20:34:38] [PASSED] DPI
[20:34:38] [PASSED] Writeback
[20:34:38] [PASSED] SPI
[20:34:38] [PASSED] USB
[20:34:38] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:34:38] ============ [PASSED] drmm_connector_hdmi_init =============
[20:34:38] ============= drmm_connector_init (3 subtests) =============
[20:34:38] [PASSED] drm_test_drmm_connector_init
[20:34:38] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:34:38] ========= drm_test_drmm_connector_init_type_valid  =========
[20:34:38] [PASSED] Unknown
[20:34:38] [PASSED] VGA
[20:34:38] [PASSED] DVI-I
[20:34:38] [PASSED] DVI-D
[20:34:38] [PASSED] DVI-A
[20:34:38] [PASSED] Composite
[20:34:38] [PASSED] SVIDEO
[20:34:38] [PASSED] LVDS
[20:34:38] [PASSED] Component
[20:34:38] [PASSED] DIN
[20:34:38] [PASSED] DP
[20:34:38] [PASSED] HDMI-A
[20:34:38] [PASSED] HDMI-B
[20:34:38] [PASSED] TV
[20:34:38] [PASSED] eDP
[20:34:38] [PASSED] Virtual
[20:34:38] [PASSED] DSI
[20:34:38] [PASSED] DPI
[20:34:38] [PASSED] Writeback
[20:34:38] [PASSED] SPI
[20:34:38] [PASSED] USB
[20:34:38] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:34:38] =============== [PASSED] drmm_connector_init ===============
[20:34:38] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_init
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:34:38] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:34:38] [PASSED] Unknown
[20:34:38] [PASSED] VGA
[20:34:38] [PASSED] DVI-I
[20:34:38] [PASSED] DVI-D
[20:34:38] [PASSED] DVI-A
[20:34:38] [PASSED] Composite
[20:34:38] [PASSED] SVIDEO
[20:34:38] [PASSED] LVDS
[20:34:38] [PASSED] Component
[20:34:38] [PASSED] DIN
[20:34:38] [PASSED] DP
[20:34:38] [PASSED] HDMI-A
[20:34:38] [PASSED] HDMI-B
[20:34:38] [PASSED] TV
[20:34:38] [PASSED] eDP
[20:34:38] [PASSED] Virtual
[20:34:38] [PASSED] DSI
[20:34:38] [PASSED] DPI
[20:34:38] [PASSED] Writeback
[20:34:38] [PASSED] SPI
[20:34:38] [PASSED] USB
[20:34:38] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:34:38] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:34:38] [PASSED] Unknown
[20:34:38] [PASSED] VGA
[20:34:38] [PASSED] DVI-I
[20:34:38] [PASSED] DVI-D
[20:34:38] [PASSED] DVI-A
[20:34:38] [PASSED] Composite
[20:34:38] [PASSED] SVIDEO
[20:34:38] [PASSED] LVDS
[20:34:38] [PASSED] Component
[20:34:38] [PASSED] DIN
[20:34:38] [PASSED] DP
[20:34:38] [PASSED] HDMI-A
[20:34:38] [PASSED] HDMI-B
[20:34:38] [PASSED] TV
[20:34:38] [PASSED] eDP
[20:34:38] [PASSED] Virtual
[20:34:38] [PASSED] DSI
[20:34:38] [PASSED] DPI
[20:34:38] [PASSED] Writeback
[20:34:38] [PASSED] SPI
[20:34:38] [PASSED] USB
[20:34:38] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:34:38] =========== [PASSED] drm_connector_dynamic_init ============
[20:34:38] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:34:38] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:34:38] ======= drm_connector_dynamic_register (7 subtests) ========
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:34:38] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:34:38] ========= [PASSED] drm_connector_dynamic_register ==========
[20:34:38] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:34:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:34:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:34:38] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:34:38] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:34:38] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:34:38] [PASSED] NTSC
[20:34:38] [PASSED] NTSC-443
[20:34:38] [PASSED] NTSC-J
[20:34:38] [PASSED] PAL
[20:34:38] [PASSED] PAL-M
[20:34:38] [PASSED] PAL-N
[20:34:38] [PASSED] SECAM
[20:34:38] [PASSED] Mono
[20:34:38] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:34:38] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:34:38] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:34:38] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:34:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:34:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:34:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:34:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:34:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:34:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:34:38] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:34:38] [PASSED] VIC 96
[20:34:38] [PASSED] VIC 97
[20:34:38] [PASSED] VIC 101
[20:34:38] [PASSED] VIC 102
[20:34:38] [PASSED] VIC 106
[20:34:38] [PASSED] VIC 107
[20:34:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:34:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:34:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:34:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:34:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:34:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:34:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:34:38] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:34:38] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:34:38] [PASSED] Automatic
[20:34:38] [PASSED] Full
[20:34:38] [PASSED] Limited 16:235
[20:34:38] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:34:38] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:34:38] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:34:38] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:34:38] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:34:38] [PASSED] RGB
[20:34:38] [PASSED] YUV 4:2:0
[20:34:38] [PASSED] YUV 4:2:2
[20:34:38] [PASSED] YUV 4:4:4
[20:34:38] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:34:38] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:34:38] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:34:38] ============= drm_damage_helper (21 subtests) ==============
[20:34:38] [PASSED] drm_test_damage_iter_no_damage
[20:34:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:34:38] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:34:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:34:38] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:34:38] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:34:38] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:34:38] [PASSED] drm_test_damage_iter_simple_damage
[20:34:38] [PASSED] drm_test_damage_iter_single_damage
[20:34:38] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:34:38] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:34:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:34:38] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:34:38] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:34:38] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:34:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:34:38] [PASSED] drm_test_damage_iter_damage
[20:34:38] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:34:38] [PASSED] drm_test_damage_iter_damage_one_outside
[20:34:38] [PASSED] drm_test_damage_iter_damage_src_moved
[20:34:38] [PASSED] drm_test_damage_iter_damage_not_visible
[20:34:38] ================ [PASSED] drm_damage_helper ================
[20:34:38] ============== drm_dp_mst_helper (3 subtests) ==============
[20:34:38] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:34:38] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:34:38] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:34:38] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:34:38] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:34:38] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:34:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:34:38] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:34:38] [PASSED] Link rate 2000000 lane count 4
[20:34:38] [PASSED] Link rate 2000000 lane count 2
[20:34:38] [PASSED] Link rate 2000000 lane count 1
[20:34:38] [PASSED] Link rate 1350000 lane count 4
[20:34:38] [PASSED] Link rate 1350000 lane count 2
[20:34:38] [PASSED] Link rate 1350000 lane count 1
[20:34:38] [PASSED] Link rate 1000000 lane count 4
[20:34:38] [PASSED] Link rate 1000000 lane count 2
[20:34:38] [PASSED] Link rate 1000000 lane count 1
[20:34:38] [PASSED] Link rate 810000 lane count 4
[20:34:38] [PASSED] Link rate 810000 lane count 2
[20:34:38] [PASSED] Link rate 810000 lane count 1
[20:34:38] [PASSED] Link rate 540000 lane count 4
[20:34:38] [PASSED] Link rate 540000 lane count 2
[20:34:38] [PASSED] Link rate 540000 lane count 1
[20:34:38] [PASSED] Link rate 270000 lane count 4
[20:34:38] [PASSED] Link rate 270000 lane count 2
[20:34:38] [PASSED] Link rate 270000 lane count 1
[20:34:38] [PASSED] Link rate 162000 lane count 4
[20:34:38] [PASSED] Link rate 162000 lane count 2
[20:34:38] [PASSED] Link rate 162000 lane count 1
[20:34:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:34:38] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:34:38] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:34:38] [PASSED] DP_POWER_UP_PHY with port number
[20:34:38] [PASSED] DP_POWER_DOWN_PHY with port number
[20:34:38] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:34:38] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:34:38] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:34:38] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:34:38] [PASSED] DP_QUERY_PAYLOAD with port number
[20:34:38] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:34:38] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:34:38] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:34:38] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:34:38] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:34:38] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:34:38] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:34:38] [PASSED] DP_REMOTE_I2C_READ with port number
[20:34:38] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:34:38] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:34:38] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:34:38] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:34:38] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:34:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:34:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:34:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:34:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:34:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:34:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:34:38] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:34:38] ================ [PASSED] drm_dp_mst_helper ================
[20:34:38] ================== drm_exec (7 subtests) ===================
[20:34:38] [PASSED] sanitycheck
[20:34:38] [PASSED] test_lock
[20:34:38] [PASSED] test_lock_unlock
[20:34:38] [PASSED] test_duplicates
[20:34:38] [PASSED] test_prepare
[20:34:38] [PASSED] test_prepare_array
[20:34:38] [PASSED] test_multiple_loops
[20:34:38] ==================== [PASSED] drm_exec =====================
[20:34:38] =========== drm_format_helper_test (18 subtests) ===========
[20:34:38] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:34:38] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:34:38] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:34:38] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:34:38] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:34:38] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:34:38] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:34:38] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:34:38] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:34:38] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:34:38] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:34:38] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:34:38] ==================== drm_test_fb_swab  =====================
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ================ [PASSED] drm_test_fb_swab =================
[20:34:38] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:34:38] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:34:38] [PASSED] single_pixel_source_buffer
[20:34:38] [PASSED] single_pixel_clip_rectangle
[20:34:38] [PASSED] well_known_colors
[20:34:38] [PASSED] destination_pitch
[20:34:38] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:34:38] ================= drm_test_fb_clip_offset  =================
[20:34:38] [PASSED] pass through
[20:34:38] [PASSED] horizontal offset
[20:34:38] [PASSED] vertical offset
[20:34:38] [PASSED] horizontal and vertical offset
[20:34:38] [PASSED] horizontal offset (custom pitch)
[20:34:38] [PASSED] vertical offset (custom pitch)
[20:34:38] [PASSED] horizontal and vertical offset (custom pitch)
[20:34:38] ============= [PASSED] drm_test_fb_clip_offset =============
[20:34:38] ============== drm_test_fb_build_fourcc_list  ==============
[20:34:38] [PASSED] no native formats
[20:34:38] [PASSED] XRGB8888 as native format
[20:34:38] [PASSED] remove duplicates
[20:34:38] [PASSED] convert alpha formats
[20:34:38] [PASSED] random formats
[20:34:38] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[20:34:38] =================== drm_test_fb_memcpy  ====================
[20:34:38] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:34:38] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:34:38] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:34:38] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:34:38] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:34:38] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:34:38] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:34:38] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:34:38] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:34:38] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:34:38] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:34:38] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:34:38] =============== [PASSED] drm_test_fb_memcpy ================
[20:34:38] ============= [PASSED] drm_format_helper_test ==============
[20:34:38] ================= drm_format (18 subtests) =================
[20:34:38] [PASSED] drm_test_format_block_width_invalid
[20:34:38] [PASSED] drm_test_format_block_width_one_plane
[20:34:38] [PASSED] drm_test_format_block_width_two_plane
[20:34:38] [PASSED] drm_test_format_block_width_three_plane
[20:34:38] [PASSED] drm_test_format_block_width_tiled
[20:34:38] [PASSED] drm_test_format_block_height_invalid
[20:34:38] [PASSED] drm_test_format_block_height_one_plane
[20:34:38] [PASSED] drm_test_format_block_height_two_plane
[20:34:38] [PASSED] drm_test_format_block_height_three_plane
[20:34:38] [PASSED] drm_test_format_block_height_tiled
[20:34:38] [PASSED] drm_test_format_min_pitch_invalid
[20:34:38] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:34:38] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:34:38] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:34:38] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:34:38] [PASSED] drm_test_format_min_pitch_two_plane
[20:34:38] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:34:38] [PASSED] drm_test_format_min_pitch_tiled
[20:34:38] =================== [PASSED] drm_format ====================
[20:34:38] ============== drm_framebuffer (10 subtests) ===============
[20:34:38] ========== drm_test_framebuffer_check_src_coords  ==========
[20:34:38] [PASSED] Success: source fits into fb
[20:34:38] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:34:38] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:34:38] [PASSED] Fail: overflowing fb with source width
[20:34:38] [PASSED] Fail: overflowing fb with source height
[20:34:38] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:34:38] [PASSED] drm_test_framebuffer_cleanup
[20:34:38] =============== drm_test_framebuffer_create  ===============
[20:34:38] [PASSED] ABGR8888 normal sizes
[20:34:38] [PASSED] ABGR8888 max sizes
[20:34:38] [PASSED] ABGR8888 pitch greater than min required
[20:34:38] [PASSED] ABGR8888 pitch less than min required
[20:34:38] [PASSED] ABGR8888 Invalid width
[20:34:38] [PASSED] ABGR8888 Invalid buffer handle
[20:34:38] [PASSED] No pixel format
[20:34:38] [PASSED] ABGR8888 Width 0
[20:34:38] [PASSED] ABGR8888 Height 0
[20:34:38] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:34:38] [PASSED] ABGR8888 Large buffer offset
[20:34:38] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:34:38] [PASSED] ABGR8888 Invalid flag
[20:34:38] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:34:38] [PASSED] ABGR8888 Valid buffer modifier
[20:34:38] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:34:38] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:34:38] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:34:38] [PASSED] NV12 Normal sizes
[20:34:38] [PASSED] NV12 Max sizes
[20:34:38] [PASSED] NV12 Invalid pitch
[20:34:38] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:34:38] [PASSED] NV12 different  modifier per-plane
[20:34:38] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:34:38] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:34:38] [PASSED] NV12 Modifier for inexistent plane
[20:34:38] [PASSED] NV12 Handle for inexistent plane
[20:34:38] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:34:38] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:34:38] [PASSED] YVU420 Normal sizes
[20:34:38] [PASSED] YVU420 Max sizes
[20:34:38] [PASSED] YVU420 Invalid pitch
[20:34:38] [PASSED] YVU420 Different pitches
[20:34:38] [PASSED] YVU420 Different buffer offsets/pitches
[20:34:38] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:34:38] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:34:38] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:34:38] [PASSED] YVU420 Valid modifier
[20:34:38] [PASSED] YVU420 Different modifiers per plane
[20:34:38] [PASSED] YVU420 Modifier for inexistent plane
[20:34:38] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:34:38] [PASSED] X0L2 Normal sizes
[20:34:38] [PASSED] X0L2 Max sizes
[20:34:38] [PASSED] X0L2 Invalid pitch
[20:34:38] [PASSED] X0L2 Pitch greater than minimum required
[20:34:38] [PASSED] X0L2 Handle for inexistent plane
[20:34:38] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:34:38] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:34:38] [PASSED] X0L2 Valid modifier
[20:34:38] [PASSED] X0L2 Modifier for inexistent plane
[20:34:38] =========== [PASSED] drm_test_framebuffer_create ===========
[20:34:38] [PASSED] drm_test_framebuffer_free
[20:34:38] [PASSED] drm_test_framebuffer_init
[20:34:38] [PASSED] drm_test_framebuffer_init_bad_format
[20:34:38] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:34:38] [PASSED] drm_test_framebuffer_lookup
[20:34:38] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:34:38] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:34:38] ================= [PASSED] drm_framebuffer =================
[20:34:38] ================ drm_gem_shmem (8 subtests) ================
[20:34:38] [PASSED] drm_gem_shmem_test_obj_create
[20:34:38] [PASSED] drm_gem_shmem_test_obj_create_private
[20:34:38] [PASSED] drm_gem_shmem_test_pin_pages
[20:34:38] [PASSED] drm_gem_shmem_test_vmap
[20:34:38] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:34:38] [PASSED] drm_gem_shmem_test_get_sg_table
[20:34:38] [PASSED] drm_gem_shmem_test_madvise
[20:34:38] [PASSED] drm_gem_shmem_test_purge
[20:34:38] ================== [PASSED] drm_gem_shmem ==================
[20:34:38] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:34:38] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:34:38] [PASSED] Automatic
[20:34:38] [PASSED] Full
[20:34:38] [PASSED] Limited 16:235
[20:34:38] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:34:38] [PASSED] drm_test_check_disable_connector
[20:34:38] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:34:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:34:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:34:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:34:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:34:38] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:34:38] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:34:38] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:34:38] [PASSED] drm_test_check_output_bpc_dvi
[20:34:38] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:34:38] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:34:38] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:34:38] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:34:38] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:34:38] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:34:38] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:34:38] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:34:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:34:38] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:34:38] [PASSED] drm_test_check_broadcast_rgb_value
[20:34:38] [PASSED] drm_test_check_bpc_8_value
[20:34:38] [PASSED] drm_test_check_bpc_10_value
[20:34:38] [PASSED] drm_test_check_bpc_12_value
[20:34:38] [PASSED] drm_test_check_format_value
[20:34:38] [PASSED] drm_test_check_tmds_char_value
[20:34:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:34:38] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:34:38] [PASSED] drm_test_check_mode_valid
[20:34:38] [PASSED] drm_test_check_mode_valid_reject
[20:34:38] [PASSED] drm_test_check_mode_valid_reject_rate
[20:34:38] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:34:38] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:34:38] ================= drm_managed (2 subtests) =================
[20:34:38] [PASSED] drm_test_managed_release_action
[20:34:38] [PASSED] drm_test_managed_run_action
[20:34:38] =================== [PASSED] drm_managed ===================
[20:34:38] =================== drm_mm (6 subtests) ====================
[20:34:38] [PASSED] drm_test_mm_init
[20:34:38] [PASSED] drm_test_mm_debug
[20:34:38] [PASSED] drm_test_mm_align32
[20:34:38] [PASSED] drm_test_mm_align64
[20:34:38] [PASSED] drm_test_mm_lowest
[20:34:38] [PASSED] drm_test_mm_highest
[20:34:38] ===================== [PASSED] drm_mm ======================
[20:34:38] ============= drm_modes_analog_tv (5 subtests) =============
[20:34:38] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:34:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:34:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:34:38] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:34:38] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:34:38] =============== [PASSED] drm_modes_analog_tv ===============
[20:34:38] ============== drm_plane_helper (2 subtests) ===============
[20:34:38] =============== drm_test_check_plane_state  ================
[20:34:38] [PASSED] clipping_simple
[20:34:38] [PASSED] clipping_rotate_reflect
[20:34:38] [PASSED] positioning_simple
[20:34:38] [PASSED] upscaling
[20:34:38] [PASSED] downscaling
[20:34:38] [PASSED] rounding1
[20:34:38] [PASSED] rounding2
[20:34:38] [PASSED] rounding3
[20:34:38] [PASSED] rounding4
[20:34:38] =========== [PASSED] drm_test_check_plane_state ============
[20:34:38] =========== drm_test_check_invalid_plane_state  ============
[20:34:38] [PASSED] positioning_invalid
[20:34:38] [PASSED] upscaling_invalid
[20:34:38] [PASSED] downscaling_invalid
[20:34:38] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:34:38] ================ [PASSED] drm_plane_helper =================
[20:34:38] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:34:38] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:34:38] [PASSED] None
[20:34:38] [PASSED] PAL
[20:34:38] [PASSED] NTSC
[20:34:38] [PASSED] Both, NTSC Default
[20:34:38] [PASSED] Both, PAL Default
[20:34:38] [PASSED] Both, NTSC Default, with PAL on command-line
[20:34:38] [PASSED] Both, PAL Default, with NTSC on command-line
[20:34:38] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:34:38] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:34:38] ================== drm_rect (9 subtests) ===================
[20:34:38] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:34:38] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:34:38] [PASSED] drm_test_rect_clip_scaled_clipped
[20:34:38] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:34:38] ================= drm_test_rect_intersect  =================
[20:34:38] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:34:38] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:34:38] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:34:38] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:34:38] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:34:38] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:34:38] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:34:38] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:34:38] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:34:38] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:34:38] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:34:38] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:34:38] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:34:38] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:34:38] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:34:38] ============= [PASSED] drm_test_rect_intersect =============
[20:34:38] ================ drm_test_rect_calc_hscale  ================
[20:34:38] [PASSED] normal use
[20:34:38] [PASSED] out of max range
[20:34:38] [PASSED] out of min range
[20:34:38] [PASSED] zero dst
[20:34:38] [PASSED] negative src
[20:34:38] [PASSED] negative dst
[20:34:38] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:34:38] ================ drm_test_rect_calc_vscale  ================
[20:34:38] [PASSED] normal use
[20:34:38] [PASSED] out of max range
[20:34:38] [PASSED] out of min range
[20:34:38] [PASSED] zero dst
[20:34:38] [PASSED] negative src
[20:34:38] [PASSED] negative dst
[20:34:38] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:34:38] ================== drm_test_rect_rotate  ===================
[20:34:38] [PASSED] reflect-x
[20:34:38] [PASSED] reflect-y
[20:34:38] [PASSED] rotate-0
[20:34:38] [PASSED] rotate-90
[20:34:38] [PASSED] rotate-180
stty: 'standard input': Inappropriate ioctl for device
[20:34:38] [PASSED] rotate-270
[20:34:38] ============== [PASSED] drm_test_rect_rotate ===============
[20:34:38] ================ drm_test_rect_rotate_inv  =================
[20:34:38] [PASSED] reflect-x
[20:34:38] [PASSED] reflect-y
[20:34:38] [PASSED] rotate-0
[20:34:38] [PASSED] rotate-90
[20:34:38] [PASSED] rotate-180
[20:34:38] [PASSED] rotate-270
[20:34:38] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:34:38] ==================== [PASSED] drm_rect =====================
[20:34:38] ============================================================
[20:34:38] Testing complete. Ran 614 tests: passed: 614
[20:34:38] Elapsed time: 23.132s total, 1.696s configuring, 21.268s building, 0.135s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
ERROR:root:../drivers/gpu/drm/ttm/ttm_pool.c: In function ‘ttm_pool_mgr_init’:
../drivers/gpu/drm/ttm/ttm_pool.c:1335:30: error: ‘TTM_SHRINKER_BATCH’ undeclared (first use in this function)
 1335 |         mm_shrinker->batch = TTM_SHRINKER_BATCH;
      |                              ^~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/ttm/ttm_pool.c:1335:30: note: each undeclared identifier is reported only once for each function it appears in
make[7]: *** [../scripts/Makefile.build:203: drivers/gpu/drm/ttm/ttm_pool.o] Error 1
make[7]: *** Waiting for unfinished jobs....
make[6]: *** [../scripts/Makefile.build:461: drivers/gpu/drm/ttm] Error 2
make[5]: *** [../scripts/Makefile.build:461: drivers/gpu/drm] Error 2
make[4]: *** [../scripts/Makefile.build:461: drivers/gpu] Error 2
make[3]: *** [../scripts/Makefile.build:461: drivers] Error 2
make[2]: *** [/kernel/Makefile:2003: .] Error 2
make[1]: *** [/kernel/Makefile:248: __sub-make] Error 2
make: *** [Makefile:248: __sub-make] Error 2

[20:34:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:34:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

Re: [PATCH 1/4] drm/xe: Move xe_root_tile_mmio() to xe_device.h

[Summers, Stuart]

On Tue, 2025-06-03 at 22:28 +0200, Michal Wajdeczko wrote:
> It seems to be a better place for this helper function.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>

Would be nice in the commit message to mention this is because the rest
of the mmio structures are per-tile. That said, why not move
xe_mmio_probe_early and xe_mmio_probe_tiles at the same time for a
similar reason?

Reviewed-by: Stuart Summers <stuart.summers@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_device.h | 5 +++++
>  drivers/gpu/drm/xe/xe_mmio.h   | 5 -----
>  2 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device.h
> b/drivers/gpu/drm/xe/xe_device.h
> index 0bc3bc8e6803..884e8e4fddbf 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -117,6 +117,11 @@ static inline struct xe_gt
> *xe_root_mmio_gt(struct xe_device *xe)
>         return xe_device_get_root_tile(xe)->primary_gt;
>  }
>  
> +static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device
> *xe)
> +{
> +       return &xe->tiles[0].mmio;
> +}
> +
>  static inline bool xe_device_uc_enabled(struct xe_device *xe)
>  {
>         return !xe->info.force_execlist;
> diff --git a/drivers/gpu/drm/xe/xe_mmio.h
> b/drivers/gpu/drm/xe/xe_mmio.h
> index c151ba569003..540bade24790 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.h
> +++ b/drivers/gpu/drm/xe/xe_mmio.h
> @@ -37,9 +37,4 @@ static inline u32 xe_mmio_adjusted_addr(const
> struct xe_mmio *mmio, u32 addr)
>         return addr;
>  }
>  
> -static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device
> *xe)
> -{
> -       return &xe->tiles[0].mmio;
> -}
> -
>  #endif

Re: [PATCH 2/4] drm/xe: Promote struct xe_mmio definition to own file

[Summers, Stuart]

On Tue, 2025-06-03 at 22:28 +0200, Michal Wajdeczko wrote:
> We already have separate .c and .h files for xe_mmio functions,
> time to introduce _types.h to follow what other components do.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Stuart Summers <stuart.summers@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_device_types.h | 40 +--------------------
>  drivers/gpu/drm/xe/xe_mmio.h         |  3 +-
>  drivers/gpu/drm/xe/xe_mmio_types.h   | 53
> ++++++++++++++++++++++++++++
>  3 files changed, 56 insertions(+), 40 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/xe_mmio_types.h
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h
> b/drivers/gpu/drm/xe/xe_device_types.h
> index b93c04466637..831dd88a4c52 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -17,6 +17,7 @@
>  #include "xe_heci_gsc.h"
>  #include "xe_lmtt_types.h"
>  #include "xe_memirq_types.h"
> +#include "xe_mmio_types.h"
>  #include "xe_oa_types.h"
>  #include "xe_platform_types.h"
>  #include "xe_pmu_types.h"
> @@ -121,45 +122,6 @@ struct xe_vram_region {
>  #endif
>  };
>  
> -/**
> - * struct xe_mmio - register mmio structure
> - *
> - * Represents an MMIO region that the CPU may use to access
> registers.  A
> - * region may share its IO map with other regions (e.g., all GTs
> within a
> - * tile share the same map with their parent tile, but represent
> different
> - * subregions of the overall IO space).
> - */
> -struct xe_mmio {
> -       /** @tile: Backpointer to tile, used for tracing */
> -       struct xe_tile *tile;
> -
> -       /** @regs: Map used to access registers. */
> -       void __iomem *regs;
> -
> -       /**
> -        * @sriov_vf_gt: Backpointer to GT.
> -        *
> -        * This pointer is only set for GT MMIO regions and only when
> running
> -        * as an SRIOV VF structure
> -        */
> -       struct xe_gt *sriov_vf_gt;
> -
> -       /**
> -        * @regs_size: Length of the register region within the map.
> -        *
> -        * The size of the iomap set in *regs is generally larger
> than the
> -        * register mmio space since it includes unused regions
> and/or
> -        * non-register regions such as the GGTT PTEs.
> -        */
> -       size_t regs_size;
> -
> -       /** @adj_limit: adjust MMIO address if address is below this
> value */
> -       u32 adj_limit;
> -
> -       /** @adj_offset: offset to add to MMIO address when adjusting
> */
> -       u32 adj_offset;
> -};
> -
>  /**
>   * struct xe_tile - hardware tile structure
>   *
> diff --git a/drivers/gpu/drm/xe/xe_mmio.h
> b/drivers/gpu/drm/xe/xe_mmio.h
> index 540bade24790..4e794757b020 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.h
> +++ b/drivers/gpu/drm/xe/xe_mmio.h
> @@ -6,9 +6,10 @@
>  #ifndef _XE_MMIO_H_
>  #define _XE_MMIO_H_
>  
> -#include "xe_gt_types.h"
> +#include "xe_mmio_types.h"
>  
>  struct xe_device;
> +struct xe_mmio_range;
>  struct xe_reg;
>  
>  int xe_mmio_probe_early(struct xe_device *xe);
> diff --git a/drivers/gpu/drm/xe/xe_mmio_types.h
> b/drivers/gpu/drm/xe/xe_mmio_types.h
> new file mode 100644
> index 000000000000..67c535dd1248
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_mmio_types.h
> @@ -0,0 +1,53 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022-2025 Intel Corporation
> + */
> +
> +#ifndef _XE_MMIO_TYPES_H_
> +#define _XE_MMIO_TYPES_H_
> +
> +#include <linux/types.h>
> +
> +struct xe_gt;
> +struct xe_tile;
> +
> +/**
> + * struct xe_mmio - register mmio structure
> + *
> + * Represents an MMIO region that the CPU may use to access
> registers.  A
> + * region may share its IO map with other regions (e.g., all GTs
> within a
> + * tile share the same map with their parent tile, but represent
> different
> + * subregions of the overall IO space).
> + */
> +struct xe_mmio {
> +       /** @tile: Backpointer to tile, used for tracing */
> +       struct xe_tile *tile;
> +
> +       /** @regs: Map used to access registers. */
> +       void __iomem *regs;
> +
> +       /**
> +        * @sriov_vf_gt: Backpointer to GT.
> +        *
> +        * This pointer is only set for GT MMIO regions and only when
> running
> +        * as an SRIOV VF structure
> +        */
> +       struct xe_gt *sriov_vf_gt;
> +
> +       /**
> +        * @regs_size: Length of the register region within the map.
> +        *
> +        * The size of the iomap set in *regs is generally larger
> than the
> +        * register mmio space since it includes unused regions
> and/or
> +        * non-register regions such as the GGTT PTEs.
> +        */
> +       size_t regs_size;
> +
> +       /** @adj_limit: adjust MMIO address if address is below this
> value */
> +       u32 adj_limit;
> +
> +       /** @adj_offset: offset to add to MMIO address when adjusting
> */
> +       u32 adj_offset;
> +};
> +
> +#endif

Re: [PATCH 1/4] drm/xe: Move xe_root_tile_mmio() to xe_device.h

[Michal Wajdeczko]

On 04.06.2025 02:12, Summers, Stuart wrote:
> On Tue, 2025-06-03 at 22:28 +0200, Michal Wajdeczko wrote:
>> It seems to be a better place for this helper function.
>>
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
> 
> Would be nice in the commit message to mention this is because the rest
> of the mmio structures are per-tile. That said, why not move
> xe_mmio_probe_early and xe_mmio_probe_tiles at the same time for a
> similar reason?

the main reason for this move alone was a problem with later move of
struct xe_mmio that is done in the next patch

and yes, it looks that both xe_mmio_probe_early() and
xe_mmio_probe_tiles are really at wrong place right now, will try to
move them later, likely with some renames

> 
> Reviewed-by: Stuart Summers <stuart.summers@intel.com>

thanks!

> 
>> ---
>>  drivers/gpu/drm/xe/xe_device.h | 5 +++++
>>  drivers/gpu/drm/xe/xe_mmio.h   | 5 -----
>>  2 files changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_device.h
>> b/drivers/gpu/drm/xe/xe_device.h
>> index 0bc3bc8e6803..884e8e4fddbf 100644
>> --- a/drivers/gpu/drm/xe/xe_device.h
>> +++ b/drivers/gpu/drm/xe/xe_device.h
>> @@ -117,6 +117,11 @@ static inline struct xe_gt
>> *xe_root_mmio_gt(struct xe_device *xe)
>>         return xe_device_get_root_tile(xe)->primary_gt;
>>  }
>>  
>> +static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device
>> *xe)
>> +{
>> +       return &xe->tiles[0].mmio;
>> +}
>> +
>>  static inline bool xe_device_uc_enabled(struct xe_device *xe)
>>  {
>>         return !xe->info.force_execlist;
>> diff --git a/drivers/gpu/drm/xe/xe_mmio.h
>> b/drivers/gpu/drm/xe/xe_mmio.h
>> index c151ba569003..540bade24790 100644
>> --- a/drivers/gpu/drm/xe/xe_mmio.h
>> +++ b/drivers/gpu/drm/xe/xe_mmio.h
>> @@ -37,9 +37,4 @@ static inline u32 xe_mmio_adjusted_addr(const
>> struct xe_mmio *mmio, u32 addr)
>>         return addr;
>>  }
>>  
>> -static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device
>> *xe)
>> -{
>> -       return &xe->tiles[0].mmio;
>> -}
>> -
>>  #endif
> 

✗ CI.Patch_applied: failure for Some more _types.h cleanups (rev2)

[Patchwork]

== Series Details ==

Series: Some more _types.h cleanups (rev2)
URL   : https://patchwork.freedesktop.org/series/149807/
State : failure

== Summary ==

=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: 573b98ac3ff9 drm-tip: 2025y-06m-04d-16h-13m-39s UTC integration manifest
=== git am output follows ===
error: patch failed: drivers/gpu/drm/xe/xe_device_types.h:25
error: drivers/gpu/drm/xe/xe_device_types.h: patch does not apply
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Applying: drm/xe: Move xe_root_tile_mmio() to xe_device.h
Applying: drm/xe: Promote struct xe_mmio definition to own file
Applying: drm/xe: Promote struct xe_tile definition to own file
Patch failed at 0003 drm/xe: Promote struct xe_tile definition to own file
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

Re: [PATCH 3/4] drm/xe: Promote struct xe_tile definition to own file

[Matt Roper]

On Tue, Jun 03, 2025 at 10:28:25PM +0200, Michal Wajdeczko wrote:
> We already have separate .c and .h files for xe_tile functions,
> time to introduce _types.h to follow what other components do.

Solely looking at today's code this movement makes sense, but looking
forward it might make sense to put the vram region in its own header
since it likely won't always be as closely tied to a tile.  See, for
example, this in-flight patch which is breaking some of the hard-coded
relationship between tile/vram:

https://lore.kernel.org/all/20250528074743.2027563-2-piotr.piorkowski@intel.com/


Matt

> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device_types.h | 159 +------------------------
>  drivers/gpu/drm/xe/xe_tile_types.h   | 172 +++++++++++++++++++++++++++
>  2 files changed, 173 insertions(+), 158 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/xe_tile_types.h
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 831dd88a4c52..c9401acb6710 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -10,14 +10,10 @@
>  
>  #include <drm/drm_device.h>
>  #include <drm/drm_file.h>
> -#include <drm/drm_pagemap.h>
>  #include <drm/ttm/ttm_device.h>
>  
>  #include "xe_devcoredump_types.h"
>  #include "xe_heci_gsc.h"
> -#include "xe_lmtt_types.h"
> -#include "xe_memirq_types.h"
> -#include "xe_mmio_types.h"
>  #include "xe_oa_types.h"
>  #include "xe_platform_types.h"
>  #include "xe_pmu_types.h"
> @@ -25,14 +21,13 @@
>  #include "xe_sriov_types.h"
>  #include "xe_step_types.h"
>  #include "xe_survivability_mode_types.h"
> -#include "xe_ttm_vram_mgr_types.h"
> +#include "xe_tile_types.h"
>  
>  #if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
>  #define TEST_VM_OPS_ERROR
>  #endif
>  
>  struct intel_display;
> -struct xe_ggtt;
>  struct xe_pat_ops;
>  struct xe_pxp;
>  
> @@ -62,158 +57,6 @@ struct xe_pxp;
>  	 (_xe)->info.step.graphics >= (min_step) &&			\
>  	 (_xe)->info.step.graphics < (max_step))
>  
> -#define tile_to_xe(tile__)								\
> -	_Generic(tile__,								\
> -		 const struct xe_tile * : (const struct xe_device *)((tile__)->xe),	\
> -		 struct xe_tile * : (tile__)->xe)
> -
> -/**
> - * struct xe_vram_region - memory region structure
> - * This is used to describe a memory region in xe
> - * device, such as HBM memory or CXL extension memory.
> - */
> -struct xe_vram_region {
> -	/** @io_start: IO start address of this VRAM instance */
> -	resource_size_t io_start;
> -	/**
> -	 * @io_size: IO size of this VRAM instance
> -	 *
> -	 * This represents how much of this VRAM we can access
> -	 * via the CPU through the VRAM BAR. This can be smaller
> -	 * than @usable_size, in which case only part of VRAM is CPU
> -	 * accessible (typically the first 256M). This
> -	 * configuration is known as small-bar.
> -	 */
> -	resource_size_t io_size;
> -	/** @dpa_base: This memory regions's DPA (device physical address) base */
> -	resource_size_t dpa_base;
> -	/**
> -	 * @usable_size: usable size of VRAM
> -	 *
> -	 * Usable size of VRAM excluding reserved portions
> -	 * (e.g stolen mem)
> -	 */
> -	resource_size_t usable_size;
> -	/**
> -	 * @actual_physical_size: Actual VRAM size
> -	 *
> -	 * Actual VRAM size including reserved portions
> -	 * (e.g stolen mem)
> -	 */
> -	resource_size_t actual_physical_size;
> -	/** @mapping: pointer to VRAM mappable space */
> -	void __iomem *mapping;
> -	/** @ttm: VRAM TTM manager */
> -	struct xe_ttm_vram_mgr ttm;
> -#if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR)
> -	/** @pagemap: Used to remap device memory as ZONE_DEVICE */
> -	struct dev_pagemap pagemap;
> -	/**
> -	 * @dpagemap: The struct drm_pagemap of the ZONE_DEVICE memory
> -	 * pages of this tile.
> -	 */
> -	struct drm_pagemap dpagemap;
> -	/**
> -	 * @hpa_base: base host physical address
> -	 *
> -	 * This is generated when remap device memory as ZONE_DEVICE
> -	 */
> -	resource_size_t hpa_base;
> -#endif
> -};
> -
> -/**
> - * struct xe_tile - hardware tile structure
> - *
> - * From a driver perspective, a "tile" is effectively a complete GPU, containing
> - * an SGunit, 1-2 GTs, and (for discrete platforms) VRAM.
> - *
> - * Multi-tile platforms effectively bundle multiple GPUs behind a single PCI
> - * device and designate one "root" tile as being responsible for external PCI
> - * communication.  PCI BAR0 exposes the GGTT and MMIO register space for each
> - * tile in a stacked layout, and PCI BAR2 exposes the local memory associated
> - * with each tile similarly.  Device-wide interrupts can be enabled/disabled
> - * at the root tile, and the MSTR_TILE_INTR register will report which tiles
> - * have interrupts that need servicing.
> - */
> -struct xe_tile {
> -	/** @xe: Backpointer to tile's PCI device */
> -	struct xe_device *xe;
> -
> -	/** @id: ID of the tile */
> -	u8 id;
> -
> -	/**
> -	 * @primary_gt: Primary GT
> -	 */
> -	struct xe_gt *primary_gt;
> -
> -	/**
> -	 * @media_gt: Media GT
> -	 *
> -	 * Only present on devices with media version >= 13.
> -	 */
> -	struct xe_gt *media_gt;
> -
> -	/**
> -	 * @mmio: MMIO info for a tile.
> -	 *
> -	 * Each tile has its own 16MB space in BAR0, laid out as:
> -	 * * 0-4MB: registers
> -	 * * 4MB-8MB: reserved
> -	 * * 8MB-16MB: global GTT
> -	 */
> -	struct xe_mmio mmio;
> -
> -	/** @mem: memory management info for tile */
> -	struct {
> -		/**
> -		 * @mem.vram: VRAM info for tile.
> -		 *
> -		 * Although VRAM is associated with a specific tile, it can
> -		 * still be accessed by all tiles' GTs.
> -		 */
> -		struct xe_vram_region vram;
> -
> -		/** @mem.ggtt: Global graphics translation table */
> -		struct xe_ggtt *ggtt;
> -
> -		/**
> -		 * @mem.kernel_bb_pool: Pool from which batchbuffers are allocated.
> -		 *
> -		 * Media GT shares a pool with its primary GT.
> -		 */
> -		struct xe_sa_manager *kernel_bb_pool;
> -	} mem;
> -
> -	/** @sriov: tile level virtualization data */
> -	union {
> -		struct {
> -			/** @sriov.pf.lmtt: Local Memory Translation Table. */
> -			struct xe_lmtt lmtt;
> -		} pf;
> -		struct {
> -			/** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
> -			struct xe_ggtt_node *ggtt_balloon[2];
> -		} vf;
> -	} sriov;
> -
> -	/** @memirq: Memory Based Interrupts. */
> -	struct xe_memirq memirq;
> -
> -	/** @pcode: tile's PCODE */
> -	struct {
> -		/** @pcode.lock: protecting tile's PCODE mailbox data */
> -		struct mutex lock;
> -	} pcode;
> -
> -	/** @migrate: Migration helper for vram blits and clearing */
> -	struct xe_migrate *migrate;
> -
> -	/** @sysfs: sysfs' kobj used by xe_tile_sysfs */
> -	struct kobject *sysfs;
> -};
> -
>  /**
>   * struct xe_device - Top level struct of XE device
>   */
> diff --git a/drivers/gpu/drm/xe/xe_tile_types.h b/drivers/gpu/drm/xe/xe_tile_types.h
> new file mode 100644
> index 000000000000..572b6c4b651d
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_tile_types.h
> @@ -0,0 +1,172 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022-2025 Intel Corporation
> + */
> +
> +#ifndef _XE_TILE_TYPES_H_
> +#define _XE_TILE_TYPES_H_
> +
> +#include <drm/drm_pagemap.h>
> +
> +#include "xe_lmtt_types.h"
> +#include "xe_memirq_types.h"
> +#include "xe_mmio_types.h"
> +#include "xe_ttm_vram_mgr_types.h"
> +
> +struct xe_device;
> +struct xe_ggtt;
> +struct xe_gt;
> +
> +#define tile_to_xe(tile__)								\
> +	_Generic(tile__,								\
> +		 const struct xe_tile * : (const struct xe_device *)((tile__)->xe),	\
> +		 struct xe_tile * : (tile__)->xe)
> +
> +/**
> + * struct xe_vram_region - memory region structure
> + * This is used to describe a memory region in xe
> + * device, such as HBM memory or CXL extension memory.
> + */
> +struct xe_vram_region {
> +	/** @io_start: IO start address of this VRAM instance */
> +	resource_size_t io_start;
> +	/**
> +	 * @io_size: IO size of this VRAM instance
> +	 *
> +	 * This represents how much of this VRAM we can access
> +	 * via the CPU through the VRAM BAR. This can be smaller
> +	 * than @usable_size, in which case only part of VRAM is CPU
> +	 * accessible (typically the first 256M). This
> +	 * configuration is known as small-bar.
> +	 */
> +	resource_size_t io_size;
> +	/** @dpa_base: This memory regions's DPA (device physical address) base */
> +	resource_size_t dpa_base;
> +	/**
> +	 * @usable_size: usable size of VRAM
> +	 *
> +	 * Usable size of VRAM excluding reserved portions
> +	 * (e.g stolen mem)
> +	 */
> +	resource_size_t usable_size;
> +	/**
> +	 * @actual_physical_size: Actual VRAM size
> +	 *
> +	 * Actual VRAM size including reserved portions
> +	 * (e.g stolen mem)
> +	 */
> +	resource_size_t actual_physical_size;
> +	/** @mapping: pointer to VRAM mappable space */
> +	void __iomem *mapping;
> +	/** @ttm: VRAM TTM manager */
> +	struct xe_ttm_vram_mgr ttm;
> +#if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR)
> +	/** @pagemap: Used to remap device memory as ZONE_DEVICE */
> +	struct dev_pagemap pagemap;
> +	/**
> +	 * @dpagemap: The struct drm_pagemap of the ZONE_DEVICE memory
> +	 * pages of this tile.
> +	 */
> +	struct drm_pagemap dpagemap;
> +	/**
> +	 * @hpa_base: base host physical address
> +	 *
> +	 * This is generated when remap device memory as ZONE_DEVICE
> +	 */
> +	resource_size_t hpa_base;
> +#endif
> +};
> +
> +/**
> + * struct xe_tile - hardware tile structure
> + *
> + * From a driver perspective, a "tile" is effectively a complete GPU, containing
> + * an SGunit, 1-2 GTs, and (for discrete platforms) VRAM.
> + *
> + * Multi-tile platforms effectively bundle multiple GPUs behind a single PCI
> + * device and designate one "root" tile as being responsible for external PCI
> + * communication.  PCI BAR0 exposes the GGTT and MMIO register space for each
> + * tile in a stacked layout, and PCI BAR2 exposes the local memory associated
> + * with each tile similarly.  Device-wide interrupts can be enabled/disabled
> + * at the root tile, and the MSTR_TILE_INTR register will report which tiles
> + * have interrupts that need servicing.
> + */
> +struct xe_tile {
> +	/** @xe: Backpointer to tile's PCI device */
> +	struct xe_device *xe;
> +
> +	/** @id: ID of the tile */
> +	u8 id;
> +
> +	/**
> +	 * @primary_gt: Primary GT
> +	 */
> +	struct xe_gt *primary_gt;
> +
> +	/**
> +	 * @media_gt: Media GT
> +	 *
> +	 * Only present on devices with media version >= 13.
> +	 */
> +	struct xe_gt *media_gt;
> +
> +	/**
> +	 * @mmio: MMIO info for a tile.
> +	 *
> +	 * Each tile has its own 16MB space in BAR0, laid out as:
> +	 * * 0-4MB: registers
> +	 * * 4MB-8MB: reserved
> +	 * * 8MB-16MB: global GTT
> +	 */
> +	struct xe_mmio mmio;
> +
> +	/** @mem: memory management info for tile */
> +	struct {
> +		/**
> +		 * @mem.vram: VRAM info for tile.
> +		 *
> +		 * Although VRAM is associated with a specific tile, it can
> +		 * still be accessed by all tiles' GTs.
> +		 */
> +		struct xe_vram_region vram;
> +
> +		/** @mem.ggtt: Global graphics translation table */
> +		struct xe_ggtt *ggtt;
> +
> +		/**
> +		 * @mem.kernel_bb_pool: Pool from which batchbuffers are allocated.
> +		 *
> +		 * Media GT shares a pool with its primary GT.
> +		 */
> +		struct xe_sa_manager *kernel_bb_pool;
> +	} mem;
> +
> +	/** @sriov: tile level virtualization data */
> +	union {
> +		struct {
> +			/** @sriov.pf.lmtt: Local Memory Translation Table. */
> +			struct xe_lmtt lmtt;
> +		} pf;
> +		struct {
> +			/** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
> +			struct xe_ggtt_node *ggtt_balloon[2];
> +		} vf;
> +	} sriov;
> +
> +	/** @memirq: Memory Based Interrupts. */
> +	struct xe_memirq memirq;
> +
> +	/** @pcode: tile's PCODE */
> +	struct {
> +		/** @pcode.lock: protecting tile's PCODE mailbox data */
> +		struct mutex lock;
> +	} pcode;
> +
> +	/** @migrate: Migration helper for vram blits and clearing */
> +	struct xe_migrate *migrate;
> +
> +	/** @sysfs: sysfs' kobj used by xe_tile_sysfs */
> +	struct kobject *sysfs;
> +};
> +
> +#endif
> -- 
> 2.47.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 4/4] drm/xe: Drop unnecessary include from xe_tile.h

[Matt Roper]

On Tue, Jun 03, 2025 at 10:28:26PM +0200, Michal Wajdeczko wrote:
> We don't need to include xe_device_types.h there.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>

I'm mostly relying on the compiler/CI to verify that we don't have any
other cases (aside from the one you fixed in xe_tile_sysfs.c) where the
code needed device_types and was relying on the implicit include from
xe_tile.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>


Matt

> ---
>  drivers/gpu/drm/xe/xe_tile.h       | 3 ++-
>  drivers/gpu/drm/xe/xe_tile_sysfs.c | 2 +-
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_tile.h b/drivers/gpu/drm/xe/xe_tile.h
> index eb939316d55b..5ade71bda89a 100644
> --- a/drivers/gpu/drm/xe/xe_tile.h
> +++ b/drivers/gpu/drm/xe/xe_tile.h
> @@ -6,8 +6,9 @@
>  #ifndef _XE_TILE_H_
>  #define _XE_TILE_H_
>  
> -#include "xe_device_types.h"
> +#include <linux/types.h>
>  
> +struct xe_device;
>  struct xe_tile;
>  
>  int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id);
> diff --git a/drivers/gpu/drm/xe/xe_tile_sysfs.c b/drivers/gpu/drm/xe/xe_tile_sysfs.c
> index b804234a6551..6dcac829839d 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sysfs.c
> +++ b/drivers/gpu/drm/xe/xe_tile_sysfs.c
> @@ -7,8 +7,8 @@
>  #include <linux/sysfs.h>
>  #include <drm/drm_managed.h>
>  
> +#include "xe_device_types.h"
>  #include "xe_pm.h"
> -#include "xe_tile.h"
>  #include "xe_tile_sysfs.h"
>  #include "xe_vram_freq.h"
>  
> -- 
> 2.47.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 1/4] drm/xe: Move xe_root_tile_mmio() to xe_device.h

[Matt Roper]

On Tue, Jun 03, 2025 at 10:28:23PM +0200, Michal Wajdeczko wrote:
> It seems to be a better place for this helper function.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_device.h | 5 +++++
>  drivers/gpu/drm/xe/xe_mmio.h   | 5 -----
>  2 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index 0bc3bc8e6803..884e8e4fddbf 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -117,6 +117,11 @@ static inline struct xe_gt *xe_root_mmio_gt(struct xe_device *xe)
>  	return xe_device_get_root_tile(xe)->primary_gt;
>  }
>  
> +static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)
> +{
> +	return &xe->tiles[0].mmio;
> +}
> +
>  static inline bool xe_device_uc_enabled(struct xe_device *xe)
>  {
>  	return !xe->info.force_execlist;
> diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
> index c151ba569003..540bade24790 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.h
> +++ b/drivers/gpu/drm/xe/xe_mmio.h
> @@ -37,9 +37,4 @@ static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)
>  	return addr;
>  }
>  
> -static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)
> -{
> -	return &xe->tiles[0].mmio;
> -}
> -
>  #endif
> -- 
> 2.47.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 2/4] drm/xe: Promote struct xe_mmio definition to own file

[Matt Roper]

On Tue, Jun 03, 2025 at 10:28:24PM +0200, Michal Wajdeczko wrote:
> We already have separate .c and .h files for xe_mmio functions,
> time to introduce _types.h to follow what other components do.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_device_types.h | 40 +--------------------
>  drivers/gpu/drm/xe/xe_mmio.h         |  3 +-
>  drivers/gpu/drm/xe/xe_mmio_types.h   | 53 ++++++++++++++++++++++++++++
>  3 files changed, 56 insertions(+), 40 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/xe_mmio_types.h
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index b93c04466637..831dd88a4c52 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -17,6 +17,7 @@
>  #include "xe_heci_gsc.h"
>  #include "xe_lmtt_types.h"
>  #include "xe_memirq_types.h"
> +#include "xe_mmio_types.h"
>  #include "xe_oa_types.h"
>  #include "xe_platform_types.h"
>  #include "xe_pmu_types.h"
> @@ -121,45 +122,6 @@ struct xe_vram_region {
>  #endif
>  };
>  
> -/**
> - * struct xe_mmio - register mmio structure
> - *
> - * Represents an MMIO region that the CPU may use to access registers.  A
> - * region may share its IO map with other regions (e.g., all GTs within a
> - * tile share the same map with their parent tile, but represent different
> - * subregions of the overall IO space).
> - */
> -struct xe_mmio {
> -	/** @tile: Backpointer to tile, used for tracing */
> -	struct xe_tile *tile;
> -
> -	/** @regs: Map used to access registers. */
> -	void __iomem *regs;
> -
> -	/**
> -	 * @sriov_vf_gt: Backpointer to GT.
> -	 *
> -	 * This pointer is only set for GT MMIO regions and only when running
> -	 * as an SRIOV VF structure
> -	 */
> -	struct xe_gt *sriov_vf_gt;
> -
> -	/**
> -	 * @regs_size: Length of the register region within the map.
> -	 *
> -	 * The size of the iomap set in *regs is generally larger than the
> -	 * register mmio space since it includes unused regions and/or
> -	 * non-register regions such as the GGTT PTEs.
> -	 */
> -	size_t regs_size;
> -
> -	/** @adj_limit: adjust MMIO address if address is below this value */
> -	u32 adj_limit;
> -
> -	/** @adj_offset: offset to add to MMIO address when adjusting */
> -	u32 adj_offset;
> -};
> -
>  /**
>   * struct xe_tile - hardware tile structure
>   *
> diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
> index 540bade24790..4e794757b020 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.h
> +++ b/drivers/gpu/drm/xe/xe_mmio.h
> @@ -6,9 +6,10 @@
>  #ifndef _XE_MMIO_H_
>  #define _XE_MMIO_H_
>  
> -#include "xe_gt_types.h"
> +#include "xe_mmio_types.h"
>  
>  struct xe_device;
> +struct xe_mmio_range;
>  struct xe_reg;
>  
>  int xe_mmio_probe_early(struct xe_device *xe);
> diff --git a/drivers/gpu/drm/xe/xe_mmio_types.h b/drivers/gpu/drm/xe/xe_mmio_types.h
> new file mode 100644
> index 000000000000..67c535dd1248
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_mmio_types.h
> @@ -0,0 +1,53 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022-2025 Intel Corporation
> + */
> +
> +#ifndef _XE_MMIO_TYPES_H_
> +#define _XE_MMIO_TYPES_H_
> +
> +#include <linux/types.h>
> +
> +struct xe_gt;
> +struct xe_tile;
> +
> +/**
> + * struct xe_mmio - register mmio structure
> + *
> + * Represents an MMIO region that the CPU may use to access registers.  A
> + * region may share its IO map with other regions (e.g., all GTs within a
> + * tile share the same map with their parent tile, but represent different
> + * subregions of the overall IO space).
> + */
> +struct xe_mmio {
> +	/** @tile: Backpointer to tile, used for tracing */
> +	struct xe_tile *tile;
> +
> +	/** @regs: Map used to access registers. */
> +	void __iomem *regs;
> +
> +	/**
> +	 * @sriov_vf_gt: Backpointer to GT.
> +	 *
> +	 * This pointer is only set for GT MMIO regions and only when running
> +	 * as an SRIOV VF structure
> +	 */
> +	struct xe_gt *sriov_vf_gt;
> +
> +	/**
> +	 * @regs_size: Length of the register region within the map.
> +	 *
> +	 * The size of the iomap set in *regs is generally larger than the
> +	 * register mmio space since it includes unused regions and/or
> +	 * non-register regions such as the GGTT PTEs.
> +	 */
> +	size_t regs_size;
> +
> +	/** @adj_limit: adjust MMIO address if address is below this value */
> +	u32 adj_limit;
> +
> +	/** @adj_offset: offset to add to MMIO address when adjusting */
> +	u32 adj_offset;
> +};
> +
> +#endif
> -- 
> 2.47.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

RE: [PATCH 4/4] drm/xe: Drop unnecessary include from xe_tile.h

[Upadhyay, Tejas]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Michal
> Wajdeczko
> Sent: 04 June 2025 01:58
> To: intel-xe@lists.freedesktop.org
> Cc: Wajdeczko, Michal <Michal.Wajdeczko@intel.com>; De Marchi, Lucas
> <lucas.demarchi@intel.com>
> Subject: [PATCH 4/4] drm/xe: Drop unnecessary include from xe_tile.h
> 
> We don't need to include xe_device_types.h there.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>

Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>

Tejas
> ---
>  drivers/gpu/drm/xe/xe_tile.h       | 3 ++-
>  drivers/gpu/drm/xe/xe_tile_sysfs.c | 2 +-
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_tile.h b/drivers/gpu/drm/xe/xe_tile.h index
> eb939316d55b..5ade71bda89a 100644
> --- a/drivers/gpu/drm/xe/xe_tile.h
> +++ b/drivers/gpu/drm/xe/xe_tile.h
> @@ -6,8 +6,9 @@
>  #ifndef _XE_TILE_H_
>  #define _XE_TILE_H_
> 
> -#include "xe_device_types.h"
> +#include <linux/types.h>
> 
> +struct xe_device;
>  struct xe_tile;
> 
>  int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id); diff --git
> a/drivers/gpu/drm/xe/xe_tile_sysfs.c b/drivers/gpu/drm/xe/xe_tile_sysfs.c
> index b804234a6551..6dcac829839d 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sysfs.c
> +++ b/drivers/gpu/drm/xe/xe_tile_sysfs.c
> @@ -7,8 +7,8 @@
>  #include <linux/sysfs.h>
>  #include <drm/drm_managed.h>
> 
> +#include "xe_device_types.h"
>  #include "xe_pm.h"
> -#include "xe_tile.h"
>  #include "xe_tile_sysfs.h"
>  #include "xe_vram_freq.h"
> 
> --
> 2.47.1