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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Georgi Djakov <georgi.djakov@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Mikko Perttunen <cyndis@kapsi.fi>,
	Viresh Kumar <vireshk@kernel.org>,
	Peter Geis <pgwipeout@gmail.com>,
	Nicolas Chauvet <kwizart@gmail.com>,
	Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v12 4/5] drm/tegra: dc: Support memory bandwidth management
Date: Mon, 25 Jan 2021 20:35:38 +0300	[thread overview]
Message-ID: <f19789d5-fdf2-8cae-9b54-db885873032a@gmail.com> (raw)
In-Reply-To: <20201228154920.18846-5-digetx@gmail.com>

28.12.2020 18:49, Dmitry Osipenko пишет:
> Display controller (DC) performs isochronous memory transfers, and thus,
> has a requirement for a minimum memory bandwidth that shall be fulfilled,
> otherwise framebuffer data can't be fetched fast enough and this results
> in a DC's data-FIFO underflow that follows by a visual corruption.
> 
> The Memory Controller drivers provide facility for memory bandwidth
> management via interconnect API. Let's wire up the interconnect API
> support to the DC driver in order to fix the distorted display output
> on T30 Ouya, T124 TK1 and other Tegra devices.
> 
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Tested-by: Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---

Thierry, I'm looking forward to yours review. Only DRM patches are left
unmerged yet in this series.

WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Georgi Djakov <georgi.djakov@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Mikko Perttunen <cyndis@kapsi.fi>,
	Viresh Kumar <vireshk@kernel.org>,
	Peter Geis <pgwipeout@gmail.com>,
	Nicolas Chauvet <kwizart@gmail.com>,
	Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-tegra@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-pm@vger.kernel.org
Subject: Re: [PATCH v12 4/5] drm/tegra: dc: Support memory bandwidth management
Date: Mon, 25 Jan 2021 20:35:38 +0300	[thread overview]
Message-ID: <f19789d5-fdf2-8cae-9b54-db885873032a@gmail.com> (raw)
In-Reply-To: <20201228154920.18846-5-digetx@gmail.com>

28.12.2020 18:49, Dmitry Osipenko пишет:
> Display controller (DC) performs isochronous memory transfers, and thus,
> has a requirement for a minimum memory bandwidth that shall be fulfilled,
> otherwise framebuffer data can't be fetched fast enough and this results
> in a DC's data-FIFO underflow that follows by a visual corruption.
> 
> The Memory Controller drivers provide facility for memory bandwidth
> management via interconnect API. Let's wire up the interconnect API
> support to the DC driver in order to fix the distorted display output
> on T30 Ouya, T124 TK1 and other Tegra devices.
> 
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Tested-by: Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---

Thierry, I'm looking forward to yours review. Only DRM patches are left
unmerged yet in this series.
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2021-01-25 17:37 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-28 15:49 [PATCH v12 0/5] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-12-28 15:49 ` Dmitry Osipenko
2020-12-28 15:49 ` [PATCH v12 1/5] memory: tegra124-emc: Make driver modular Dmitry Osipenko
2020-12-28 15:49   ` Dmitry Osipenko
2021-01-05 17:00   ` Krzysztof Kozlowski
2021-01-05 17:00     ` Krzysztof Kozlowski
2020-12-28 15:49 ` [PATCH v12 2/5] memory: tegra124-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-12-28 15:49   ` Dmitry Osipenko
2021-01-05 17:02   ` Krzysztof Kozlowski
2021-01-05 17:02     ` Krzysztof Kozlowski
2020-12-28 15:49 ` [PATCH v12 3/5] memory: tegra124: Support interconnect framework Dmitry Osipenko
2020-12-28 15:49   ` Dmitry Osipenko
2021-01-05 17:03   ` Krzysztof Kozlowski
2021-01-05 17:03     ` Krzysztof Kozlowski
2020-12-28 15:49 ` [PATCH v12 4/5] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
2020-12-28 15:49   ` Dmitry Osipenko
2021-01-25 17:35   ` Dmitry Osipenko [this message]
2021-01-25 17:35     ` Dmitry Osipenko
2020-12-28 15:49 ` [PATCH v12 5/5] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-12-28 15:49   ` Dmitry Osipenko

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