Re: [PATCH v4 3/4] KVM: TDX: Filter configurable CPUID bits

[Binbin Wu <binbin.wu@linux.intel.com>]

On 9/23/2026 8:34 AM, Edgecombe, Rick P wrote:
> On Wed, 2026-09-23 at 08:28 +0800, Binbin Wu wrote:
>> Xiaoyao mentioned it in v3 too.
>>
>> Sean suggested in v2 that "Realistically, CPUID.0x1.E{A,B}X are never going to be
>> repurposed to hold feature bits, and so generating a mask of allowed bits adds
>> unnecessary cognitive load and maintenance.  Ditto for CPUID 0x4, 0x18, and 0x1F."
>> https://lore.kernel.org/kvm/aj1fi_0SBxMK5WOB@google.com/
>>
>> If we really have concerns, I can change it to exclude reserved bits in the next
>> version.
> 
> Could we check the x86 arch folks real quick?

Still waiting on confirmation.

But per the Intel SDM and AMD APM definitions, the following leaves/registers
are defined for specific metadata/parameters and should not be repurposed for
feature flags::
- CPUID.0x1.EAX is defined for Version Information
- CPUID.0x4 is defined for Deterministic Cache Parameters.
- CPUID.0x18 is defined for Deterministic Address Translation Parameters.
- CPUID.0x1f is defined for V2 Extended Topology.
- CPUID.0x80000008.EAX is defined for Long Mode Size Identifiers.

Additionally, CPUID.0x1.EBX has no reserved bit.

> If Sean is ok betting on this
> though, I'm ok too.