Re: [PATCH net-next 2/3] net: ethernet: oa_tc6: deliver the PHY interrupt to phylib

[Parthiban Veerasooran <parthiban.veerasooran@microchip.com>]

On 03/09/26 7:24 pm, Andrew Lunn wrote:
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> On Thu, Sep 03, 2026 at 06:32:26PM +0530, Parthiban Veerasooran wrote:
>> Hi Andrew,
>>
>> Thank you for reviewing this patch series.
>>
>> On 02/09/26 6:13 am, Andrew Lunn wrote:
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>>> On Tue, Sep 01, 2026 at 06:39:47PM +0530, Parthiban Veerasooran wrote:
>>>> The integrated PHY has no dedicated interrupt line; its interrupt is
>>>> delivered in-band as the PHYINT bit in STATUS0, which raises the MAC-PHY
>>>> SPI interrupt via the extended status. phy_mac_interrupt() only triggers
>>>> a link-status re-read and cannot make the PHY driver read and acknowledge
>>>> its interrupt source registers, so expose the PHY interrupt to phylib as a
>>>> nested virtual IRQ instead.
>>>>
>>>> Use dummy_irq_chip as the irqchip, map a virtual IRQ and assign it to
>>>> phydev->irq before phy_connect_direct() so phylib enters interrupt mode
>>>> and uses the PHY driver's config_intr/handle_interrupt. Unmask PHYINT in
>>>> INT_MASK0, and when it is seen in the extended status, dispatch
>>>> handle_nested_irq() synchronously from the sleepable threaded IRQ. PHYINT
>>>> is level triggered, so acking the PHY source there clears it before the
>>>> next data chunk, avoiding a storm.
>>>
>>>
>>>      9.2.8.7 PHYINT
>>>
>>>      Physical Layer Interrupt. When set, this bit indicates a service
>>>      request from the underlying physical layer block.  Many physical
>>>      layer implementations support an interrupt output for signaling
>>>      events to the station controller. This bit is optional and will be
>>>      implemented only if the underlying physical layer supports
>>>      generating interrupts to a higher level. When implemented, this bit
>>>      shall be cleared by acknowledging the underlying physical layer
>>>      interrupt source(s). When not implemented, this bit shall be
>>>      reserved with a read- only value of zero.
>>>
>>> At the moment, phylib is polling the PHY. That is guaranteed to work.
>>>
>>> The standard indicates this interrupt is optional. It might not be
>>> implemented. phylib assumes that if there is an interrupt, the
>>> interrupt works, and it does not poll. So any hardware which does not
>>> implement this interrupt is now broken.
>>>
>>> Please find a way not to break other devices.
>> Thank you for pointing it out. PHYINT is optional per the OA TC6 standard
>> (section 9.2.8.7), and unconditionally setting up the virtual IRQ breaks
>> devices that do not implement it.
>>
>> I checked both the OA TC6 standard (V1.1) and the LAN8650/1 datasheet, and
>> there is no capability register bit to detect PHYINT support at runtime.
> 
> I also did a quick check of the standard and could not find an
> indication if interrupts were support. So a quirks flag does seem to
> be the correct solution.
Thank you for the confirmation. I will implement it in the next version.

Best regards,
Parthiban V>
>     Andrew