From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Cédric Le Goater" <clg@redhat.com>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
Jamin Lin <jamin_lin@aspeedtech.com>
Subject: Re: [PATCH] aspeed/smc: Reintroduce "dram-base" property for AST2700
Date: Mon, 27 May 2024 18:10:13 +0200 [thread overview]
Message-ID: <f8ef776b-3ae8-416f-ba73-bf141bbd33b8@linaro.org> (raw)
In-Reply-To: <20240527124315.35356-1-clg@redhat.com>
On 27/5/24 14:43, Cédric Le Goater wrote:
> The Aspeed SMC device model use to have a 'sdram_base' property. It
> was removed by commit d177892d4a48 ("aspeed/smc: Remove unused
> "sdram-base" property") because previous changes simplified the DMA
> transaction model to use an offset in RAM and not the physical
> address.
>
> The AST2700 SoC has larger address space (64-bit) and a new register
> DMA DRAM Side Address High Part (0x7C) is introduced to deal with the
> high bits of the DMA address. To be able to compute the offset of the
> DMA transaction, as done on the other SoCs, we will need to know where
> the DRAM is mapped in the address space. Re-introduce a "dram-base"
> property to hold this value.
>
> Signed-off-by: Cédric Le Goater <clg@redhat.com>
> ---
> include/hw/ssi/aspeed_smc.h | 1 +
> hw/ssi/aspeed_smc.c | 1 +
> 2 files changed, 2 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2024-05-27 16:10 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-27 12:43 [PATCH] aspeed/smc: Reintroduce "dram-base" property for AST2700 Cédric Le Goater
2024-05-27 16:10 ` Philippe Mathieu-Daudé [this message]
2024-05-28 1:31 ` Jamin Lin
2024-06-10 9:23 ` Cédric Le Goater
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