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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
	intel-gfx@lists.freedesktop.org,
	intel-gvt-dev@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: Re: [PATCH 5/7] drm/i915/gvt: Change for_each_pipe to use pipe_valid API
Date: Thu, 18 Dec 2025 12:36:11 +0200	[thread overview]
Message-ID: <fab98bc3d1034b8752a151a026c78370b6662ac3@intel.com> (raw)
In-Reply-To: <20251218082302.2327243-6-ankit.k.nautiyal@intel.com>

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Add a new API to check if a given pipe is valid using
> DISPLAY_RUNTIME_INFO() for GVT.
>
> Update GVT to use this API instead of accessing
> `DISPLAY_RUNTIME_INFO->pipe_mask` directly in the `for_each_pipe` macro.
>
> Since `for_each_pipe` is defined in i915/display/intel_display.h, which
> also contains other macros used by gvt/display.c, we cannot drop the
> intel_display.h header yet. This causes a build error because
> `for_each_pipe` is included from both i915/display/intel_display.h and
> gvt/display_helpers.h.
>
> To resolve this, rename the GVT macro to `gvt_for_each_pipe` and make it
> call the new API. This avoids exposing display internals and prepares for
> display modularization.
>
> v2:
>  - Expose API to check if pipe is valid rather than the runtime info
>    pipe mask. (Jani)
>  - Rename the macro to `gvt_for_each_pipe` to resolve build error.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_gvt_api.c | 11 +++++++++++
>  drivers/gpu/drm/i915/display/intel_gvt_api.h |  1 +
>  drivers/gpu/drm/i915/gvt/display.c           |  6 +++---
>  drivers/gpu/drm/i915/gvt/display_helpers.h   |  4 ++++
>  4 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> index 8abea318fbc2..45f12f239a2d 100644
> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.c
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> @@ -32,3 +32,14 @@ u32 intel_display_device_mmio_base(struct intel_display *display)
>  	return DISPLAY_MMIO_BASE(display);
>  }
>  EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
> +
> +bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe)
> +{
> +	u8 pipe_mask = DISPLAY_RUNTIME_INFO(display)->pipe_mask;
> +
> +	if (pipe < PIPE_A || pipe >= I915_MAX_PIPES)
> +		return false;
> +
> +	return !!(pipe_mask & BIT(pipe));

Nitpick, return pipe_mask & BIT(pipe); is sufficient, the !! is
superfluous.

> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_pipe_valid);

EXPORT_SYMBOL_NS_GPL(..., "I915_GVT");

> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> index e9a1122a988d..a53687f7d934 100644
> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.h
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> @@ -16,5 +16,6 @@ u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pi
>  u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
>  u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
>  u32 intel_display_device_mmio_base(struct intel_display *display);
> +bool intel_display_device_pipe_valid(struct intel_display *display, enum pipe pipe);
>  
>  #endif /* __INTEL_GVT_API_H__ */
> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
> index 9d6b22b2e4d0..11855c71e05e 100644
> --- a/drivers/gpu/drm/i915/gvt/display.c
> +++ b/drivers/gpu/drm/i915/gvt/display.c
> @@ -200,7 +200,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
>  			  GEN8_DE_PORT_HOTPLUG(HPD_PORT_B) |
>  			  GEN8_DE_PORT_HOTPLUG(HPD_PORT_C));
>  
> -		for_each_pipe(display, pipe) {
> +		gvt_for_each_pipe(display, pipe) {
>  			vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &=
>  				~(TRANSCONF_ENABLE | TRANSCONF_STATE_ENABLE);
>  			vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
> @@ -516,7 +516,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
>  		vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
>  
>  	/* Disable Primary/Sprite/Cursor plane */
> -	for_each_pipe(display, pipe) {
> +	gvt_for_each_pipe(display, pipe) {
>  		vgpu_vreg_t(vgpu, DSPCNTR(display, pipe)) &= ~DISP_ENABLE;
>  		vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
>  		vgpu_vreg_t(vgpu, CURCNTR(display, pipe)) &= ~MCURSOR_MODE_MASK;
> @@ -672,7 +672,7 @@ void intel_vgpu_emulate_vblank(struct intel_vgpu *vgpu)
>  	int pipe;
>  
>  	mutex_lock(&vgpu->vgpu_lock);
> -	for_each_pipe(display, pipe)
> +	gvt_for_each_pipe(display, pipe)
>  		emulate_vblank_on_pipe(vgpu, pipe);
>  	mutex_unlock(&vgpu->vgpu_lock);
>  }
> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
> index 3af878e3d78e..a910f8b8833d 100644
> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
> @@ -32,4 +32,8 @@
>  #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
>  	intel_display_device_cursor_offset((display), (pipe))
>  
> +#define gvt_for_each_pipe(display, __p) \
> +	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
> +		for_each_if(intel_display_device_pipe_valid((display), (enum pipe)(__p)))

I think the caller should use enum pipe instead of int pipe and casting
here.

BR,
Jani.

> +
>  #endif /* __DISPLAY_HELPERS_H__ */

-- 
Jani Nikula, Intel

  reply	other threads:[~2025-12-18 10:36 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-18  8:22 [PATCH 0/7] Prepare GVT for display modularization Ankit Nautiyal
2025-12-18  8:22 ` [PATCH 1/7] drm/i915/display: Abstract pipe/trans/cursor offset calculation Ankit Nautiyal
2025-12-18  8:22 ` [PATCH 2/7] drm/i915/display: Add APIs to be used by gvt to get the register offsets Ankit Nautiyal
2025-12-18 10:32   ` Jani Nikula
2025-12-18 12:09     ` Nautiyal, Ankit K
2025-12-18  8:22 ` [PATCH 3/7] drm/i915/gvt: Add header to use display offset functions in macros Ankit Nautiyal
2025-12-18 10:26   ` Jani Nikula
2025-12-18  8:22 ` [PATCH 4/7] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro Ankit Nautiyal
2025-12-18 10:25   ` Jani Nikula
2025-12-18 12:06     ` Nautiyal, Ankit K
2025-12-18  8:22 ` [PATCH 5/7] drm/i915/gvt: Change for_each_pipe to use pipe_valid API Ankit Nautiyal
2025-12-18 10:36   ` Jani Nikula [this message]
2025-12-18 11:57     ` Nautiyal, Ankit K
2025-12-18  8:22 ` [PATCH 6/7] drm/i915/gvt: Use the appropriate header for the DPLL macro Ankit Nautiyal
2025-12-18 10:36   ` Jani Nikula
2025-12-18  8:23 ` [PATCH 7/7] drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs Ankit Nautiyal
2025-12-18 10:37   ` Jani Nikula
2025-12-18  8:43 ` ✗ CI.checkpatch: warning for Prepare GVT for display modularization (rev2) Patchwork
2025-12-18  8:44 ` ✓ CI.KUnit: success " Patchwork
2025-12-18  9:00 ` ✗ CI.checksparse: warning " Patchwork
2025-12-18  9:38 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-18 10:36 ` ✓ i915.CI.BAT: " Patchwork
2025-12-18 10:57 ` [PATCH 0/7] Prepare GVT for display modularization Jani Nikula
2025-12-18 12:05   ` Nautiyal, Ankit K
2025-12-18 13:51 ` ✓ i915.CI.Full: success for Prepare GVT for display modularization (rev2) Patchwork
2025-12-19  4:17 ` ✗ Xe.CI.Full: failure " Patchwork
2025-12-29 12:47 ` [PATCH 0/7] Prepare GVT for display modularization Nautiyal, Ankit K
2025-12-31 10:35   ` Jani Nikula
2026-01-02  6:15     ` Nautiyal, Ankit K
2026-01-02 11:24       ` Jani Nikula

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