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From: "Yuslaimi, Alif Zakuan" <alif.zakuan.yuslaimi@altera.com>
To: "Chee, Tien Fong" <tien.fong.chee@altera.com>, u-boot@lists.denx.de
Cc: Tom Rini <trini@konsulko.com>, Marek Vasut <marex@denx.de>,
	Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>,
	Lukasz Majewski <lukma@denx.de>, Peng Fan <peng.fan@nxp.com>,
	Jaehoon Chung <jh80.chung@samsung.com>,
	Simon Glass <sjg@chromium.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Kory Maincent <kory.maincent@bootlin.com>, Yao Zi <me@ziyao.cc>
Subject: Re: [PATCH v2 5/9] arm: socfpga: s10: Enable system manager driver for Stratix10
Date: Thu, 14 May 2026 13:43:17 +0800	[thread overview]
Message-ID: <fd344893-b87f-4e68-b9e2-2519bf482ddf@altera.com> (raw)
In-Reply-To: <3f9e5302-2a58-4840-b304-41ee43926b34@altera.com>

Hi Tien Fong,

On 8/5/2026 12:18 pm, Chee, Tien Fong wrote:
> Hi Alif,
> 
> 
> On 28/4/2026 11:48 am, alif.zakuan.yuslaimi@altera.com wrote:
>> From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
>>
>> The base address of system manager can be retrieved
>> using DT framework through the system manager driver.
>>
>> Enable system manager support for Stratix10 by probing the
>> system manager driver to initialize during SPL boot up.
>>
>> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
>> ---
>>   MAINTAINERS                                |  1 +
>>   arch/arm/dts/socfpga_stratix10-u-boot.dtsi |  6 ++++++
>>   arch/arm/mach-socfpga/Makefile             |  1 +
>>   arch/arm/mach-socfpga/misc.c               |  3 ++-
>>   arch/arm/mach-socfpga/spl_s10.c            |  1 +
>>   board/altera/stratix10-socdk/Makefile      |  7 +++++++
>>   board/altera/stratix10-socdk/socfpga.c     | 12 ++++++++++++
>>   configs/socfpga_stratix10_defconfig        |  1 +
>>   8 files changed, 31 insertions(+), 1 deletion(-)
>>   create mode 100644 board/altera/stratix10-socdk/Makefile
>>   create mode 100644 board/altera/stratix10-socdk/socfpga.c
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 056902f6ef2..d1173126fc6 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -156,6 +156,7 @@ S:    Maintained
>>   T:    git https://source.denx.de/u-boot/custodians/u-boot-socfpga.git
>>   F:    arch/arm/dts/socfpga_*
>>   F:    arch/arm/mach-socfpga/
>> +F:    board/altera/stratix10-socdk/
>>   F:    board/intel/agilex-socdk/
>>   F:    configs/socfpga_*
>>   F:    drivers/ddr/altera/
>> diff --git a/arch/arm/dts/socfpga_stratix10-u-boot.dtsi b/arch/arm/ 
>> dts/socfpga_stratix10-u-boot.dtsi
>> index ad4b383f704..89fa0e829f6 100644
>> --- a/arch/arm/dts/socfpga_stratix10-u-boot.dtsi
>> +++ b/arch/arm/dts/socfpga_stratix10-u-boot.dtsi
>> @@ -13,6 +13,7 @@
>>       aliases {
>>           spi0 = &qspi;
>>           i2c0 = &i2c1;
>> +        sysmgr = &sysmgr;
>>           freeze_br0 = &freeze_controller;
>>       };
>> @@ -283,6 +284,11 @@
>>       };
>>   };
>> +&sysmgr {
>> +    compatible = "altr,sys-mgr", "syscon";
>> +    bootph-all;
>> +};
>> +
>>   &uart0 {
>>       bootph-all;
>>       clock-frequency = <100000000>;
>> diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/ 
>> Makefile
>> index b6f35ddacc4..962dce67c64 100644
>> --- a/arch/arm/mach-socfpga/Makefile
>> +++ b/arch/arm/mach-socfpga/Makefile
>> @@ -39,6 +39,7 @@ obj-y    += system_manager_soc64.o
>>   obj-y    += timer_s10.o
>>   obj-y    += wrap_handoff_soc64.o
>>   obj-y    += wrap_pll_config_soc64.o
>> +obj-y    += altera-sysmgr.o
>>   endif
>>   ifdef CONFIG_ARCH_SOCFPGA_AGILEX
>> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
>> index 1eef7893e54..418d7dfb572 100644
>> --- a/arch/arm/mach-socfpga/misc.c
>> +++ b/arch/arm/mach-socfpga/misc.c
>> @@ -263,7 +263,8 @@ void socfpga_get_managers_addr(void)
>>       if (!IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX) &&
>>           !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX7M) &&
>> -        !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX5)) {
>> +        !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX5) &&
>> +        !IS_ENABLED(CONFIG_ARCH_SOCFPGA_STRATIX10)) {
>>           ret = socfpga_get_base_addr("altr,sys-mgr",
>>                           &socfpga_sysmgr_base);
>>           if (ret)
>> diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/ 
>> spl_s10.c
>> index ce1d5d4c8ff..b05bec2cbc1 100644
>> --- a/arch/arm/mach-socfpga/spl_s10.c
>> +++ b/arch/arm/mach-socfpga/spl_s10.c
>> @@ -48,6 +48,7 @@ void board_init_f(ulong dummy)
>>       if (ret)
>>           hang();
>> +    socfpga_get_sys_mgr_addr();
>>       socfpga_get_managers_addr();
>>       /* Ensure watchdog is paused when debugging is happening */
>> diff --git a/board/altera/stratix10-socdk/Makefile b/board/altera/ 
>> stratix10-socdk/Makefile
>> new file mode 100644
>> index 00000000000..416c121406a
>> --- /dev/null
>> +++ b/board/altera/stratix10-socdk/Makefile
>> @@ -0,0 +1,7 @@
>> +#
>> +# Copyright (C) 2026 Altera Corporation <www.altera.com>
>> +#
>> +# SPDX-License-Identifier:    GPL-2.0
> 
> 
> SPDX-License-Identifier appears on line 4, not line 1
> 
> 
> Best regards,
> 
> Tien Fong
> 
Noted, I will correct this for v3 submission.

Thanks,
Alif



  reply	other threads:[~2026-05-14  5:43 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-28  3:48 [PATCH v2 0/9] SoCFPGA: Update Boot Support for Stratix10 in U-Boot alif.zakuan.yuslaimi
2026-04-28  3:48 ` [PATCH v2 1/9] arch: arm: dts: stratix10: Switch to using upstream Linux DT config alif.zakuan.yuslaimi
2026-05-07  8:37   ` Chee, Tien Fong
2026-05-14  5:35     ` Yuslaimi, Alif Zakuan
2026-05-14  6:45       ` Yuslaimi, Alif Zakuan
2026-04-28  3:48 ` [PATCH v2 2/9] configs: stratix10: Combine defconfig for all boot flashes alif.zakuan.yuslaimi
2026-05-07  9:31   ` Chee, Tien Fong
2026-05-14  5:42     ` Yuslaimi, Alif Zakuan
2026-04-28  3:48 ` [PATCH v2 3/9] arm: socfpga: Move firmware register settings from source code to device tree alif.zakuan.yuslaimi
2026-04-28  3:48 ` [PATCH v2 4/9] arm: socfpga: Update Stratix10 SPL data save and restore implementation alif.zakuan.yuslaimi
2026-04-28  3:48 ` [PATCH v2 5/9] arm: socfpga: s10: Enable system manager driver for Stratix10 alif.zakuan.yuslaimi
2026-05-08  4:18   ` Chee, Tien Fong
2026-05-14  5:43     ` Yuslaimi, Alif Zakuan [this message]
2026-04-28  3:48 ` [PATCH v2 6/9] ddr: altera: soc64: Add secure region support for ATF flow alif.zakuan.yuslaimi
2026-04-28  3:48 ` [PATCH v2 7/9] clk: s10: Refactor S10 clock driver alif.zakuan.yuslaimi
2026-05-08  5:48   ` Chee, Tien Fong
2026-05-14  5:47     ` Yuslaimi, Alif Zakuan
2026-04-28  3:48 ` [PATCH v2 8/9] mmc: socfpga_dw_mmc: Exclude S10 from legacy clkmgr address retrieval alif.zakuan.yuslaimi
2026-04-28  3:48 ` [PATCH v2 9/9] spl: s10: Enhance watchdog support in SPL for Stratix 10 alif.zakuan.yuslaimi

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