[PULL 0/4] tcg patch queue

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 562bae590f194fb590beb5c65da44fc35ab9f64a:

  Merge tag 's390x-20260826' of https://gitlab.com/efarman/qemu into staging (2026-08-26 13:40:41 -0700)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20260826

for you to fetch changes up to 01e1455139196cc8d6bcde7d2f918348a90f7f26:

  util/cpuinfo-aarch64: Fix build with older glibc headers (2026-08-26 21:25:04 -0700)

----------------------------------------------------------------
disas: Replace straggling CS_ARCH_SYSZ
tcg: Fix typo in tcg_gen_hswap_i64
tcg/aarch64: Use tgen_brcondi in tcg_out_qemu_ldst_i128
util/cpuinfo-aarch64: Fix build with older glibc headers

----------------------------------------------------------------
Eric Farman (1):
      disas: Replace straggling CS_ARCH_SYSZ

Richard Henderson (2):
      tcg: Fix typo in tcg_gen_hswap_i64
      tcg/aarch64: Use tgen_brcondi in tcg_out_qemu_ldst_i128

Tao Tang (1):
      util/cpuinfo-aarch64: Fix build with older glibc headers

 disas/disas-host.c           |  2 +-
 tcg/tcg-op.c                 |  2 +-
 util/cpuinfo-aarch64.c       |  3 +++
 tcg/aarch64/tcg-target.c.inc | 25 ++++++++++---------------
 4 files changed, 15 insertions(+), 17 deletions(-)

[PULL 1/4] tcg: Fix typo in tcg_gen_hswap_i64

[Richard Henderson]

Fixes: 288d39e26d ("tcg: Simplify bswap/hswap expansion using bitswap")
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4229
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/tcg-op.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 28d3b2a847c..2c88f4f7ca9 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -1887,7 +1887,7 @@ void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
  */
 void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg)
 {
-    gen_bitswap_i64(ret, ret, 0x0000ffff0000ffffull);
+    gen_bitswap_i64(ret, arg, 0x0000ffff0000ffffull);
     tcg_gen_wswap_i64(ret, ret);
 }
 
-- 
2.53.0

[PULL 2/4] disas: Replace straggling CS_ARCH_SYSZ

[Richard Henderson]

From: Eric Farman <farman@linux.ibm.com>

When updating to capstone v6, the define CS_ARCH_SYSZ was replaced
with CS_ARCH_SYSTEMZ, except here. On systems without capstone-devel
installed, this causes a compile error:

  ../disas/disas-host.c: In function ‘initialize_debug_host’:
  ../disas/disas-host.c:78:24: error: ‘CS_ARCH_SYSZ’ undeclared (first use in this function); did you mean ‘CS_ARCH_SH’?
     78 |     s->info.cap_arch = CS_ARCH_SYSZ;
        |                        ^~~~~~~~~~~~
        |                        CS_ARCH_SH
  ../disas/disas-host.c:78:24: note: each undeclared identifier is reported only once for each function it appears in

Rather than making capstone required, replace the constant
with the same one used elsewhere after that change.

Fixes: c8220a096f ("target/s390x: Update capstone disassembly to v6")
Signed-off-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260824143033.306201-1-farman@linux.ibm.com>
---
 disas/disas-host.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/disas/disas-host.c b/disas/disas-host.c
index d41235250a0..799f5e86c40 100644
--- a/disas/disas-host.c
+++ b/disas/disas-host.c
@@ -75,7 +75,7 @@ static void initialize_debug_host(CPUDebug *s)
 #elif defined(__m68k__)
     s->info.print_insn = print_insn_m68k;
 #elif defined(__s390x__)
-    s->info.cap_arch = CS_ARCH_SYSZ;
+    s->info.cap_arch = CS_ARCH_SYSTEMZ;
     s->info.cap_insn_unit = 2;
     s->info.cap_insn_split = 6;
 #elif defined(__hppa__)
-- 
2.53.0

[PULL 3/4] tcg/aarch64: Use tgen_brcondi in tcg_out_qemu_ldst_i128

[Richard Henderson]

Allow tgen_brcondi to choose between TBNZ and TST+B.cond for
implementing a particular mask.

Suggested-by: yujun <yujun@kylinos.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/aarch64/tcg-target.c.inc | 25 ++++++++++---------------
 1 file changed, 10 insertions(+), 15 deletions(-)

diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 1e64c5994e0..4ebdef7e077 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1916,23 +1916,18 @@ static void tcg_out_qemu_ldst_i128(TCGContext *s, TCGReg datalo, TCGReg datahi,
     use_pair = h.aa.atom < MO_128 || have_lse2;
 
     if (!use_pair) {
-        tcg_insn_unit *branch = NULL;
+        TCGLabel *label = NULL;
         TCGReg ll, lh, sl, sh;
-
         /*
-         * If we have already checked for 16-byte alignment, that's all
-         * we need. Otherwise we have determined that misaligned atomicity
-         * may be handled with two 8-byte loads.
+         * Check for 16-byte alignment, taking into consideration the
+         * alignment that has already been checked.
          */
-        if (h.aa.align < MO_128) {
-            /*
-             * TODO: align should be MO_64, so we only need test bit 3,
-             * which means we could use TBNZ instead of ANDS+B_C.
-             */
-            tcg_out_logicali(s, Ilogic_imm_ANDSI, 0, TCG_REG_XZR, addr_reg,
-                             15);
-            branch = s->code_ptr;
-            tcg_out_insn(s, bcond_imm, B_C, TCG_COND_NE, 0);
+        int a_mask = 16 - (1 << h.aa.align);
+
+        if (a_mask > 0) {
+            label = gen_new_label();
+            tgen_brcondi(s, TCG_TYPE_I32, TCG_COND_TSTNE,
+                         addr_reg, a_mask, label);
             use_pair = true;
         }
 
@@ -1971,7 +1966,7 @@ static void tcg_out_qemu_ldst_i128(TCGContext *s, TCGReg datalo, TCGReg datahi,
         if (use_pair) {
             /* "b .+8", branching across the one insn of use_pair. */
             tcg_out_insn(s, branch, B, 2);
-            reloc_pc19(branch, tcg_splitwx_to_rx(s->code_ptr));
+            tcg_out_label(s, label);
         }
     }
 
-- 
2.53.0

[PULL 4/4] util/cpuinfo-aarch64: Fix build with older glibc headers

[Richard Henderson]

From: Tao Tang <tangtao1634@phytium.com.cn>

Commit 761bfe07b2c9 ("util/cpuinfo-aarch64: Detect FEAT_CSSC")
started using HWCAP2_CSSC unconditionally. This macro was added to
glibc's AArch64 bits/hwcap.h during the glibc 2.38 development cycle,
so AArch64 hosts with older headers fail to build.

Follow the existing HWCAP2_BTI handling and define HWCAP2_CSSC to
zero when it is not provided by system headers. Such environments
simply do not use FEAT_CSSC host optimizations.

This has been tested on an Ubuntu 22.04 aarch64 host with glibc 2.35.

Fixes: 761bfe07b2c9 ("util/cpuinfo-aarch64: Detect FEAT_CSSC")
Signed-off-by: Tao Tang <tangtao1634@phytium.com.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260826163753.459661-1-tangtao1634@phytium.com.cn>
---
 util/cpuinfo-aarch64.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/util/cpuinfo-aarch64.c b/util/cpuinfo-aarch64.c
index 4ce6deb7c82..e3446762149 100644
--- a/util/cpuinfo-aarch64.c
+++ b/util/cpuinfo-aarch64.c
@@ -16,6 +16,9 @@
 # ifndef HWCAP2_BTI
 #  define HWCAP2_BTI 0  /* added in glibc 2.32 */
 # endif
+# ifndef HWCAP2_CSSC
+#  define HWCAP2_CSSC 0  /* added in glibc 2.38 */
+# endif
 #endif
 #ifdef CONFIG_ELF_AUX_INFO
 #include <sys/auxv.h>
-- 
2.53.0

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 8/26/26 21:44, Richard Henderson wrote:
> The following changes since commit 562bae590f194fb590beb5c65da44fc35ab9f64a:
> 
>    Merge tag 's390x-20260826' ofhttps://gitlab.com/efarman/qemu into staging (2026-08-26 13:40:41 -0700)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20260826
> 
> for you to fetch changes up to 01e1455139196cc8d6bcde7d2f918348a90f7f26:
> 
>    util/cpuinfo-aarch64: Fix build with older glibc headers (2026-08-26 21:25:04 -0700)
> 
> ----------------------------------------------------------------
> disas: Replace straggling CS_ARCH_SYSZ
> tcg: Fix typo in tcg_gen_hswap_i64
> tcg/aarch64: Use tgen_brcondi in tcg_out_qemu_ldst_i128
> util/cpuinfo-aarch64: Fix build with older glibc headers

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

[PULL 0/4] tcg patch queue

[Richard Henderson]

Pretty small still, but there are two patches that ought
to get backported to stable, so no point in delaying.

r~

The following changes since commit a5ba0a7e4e150d1350a041f0d0ef9ca6c8d7c307:

  Merge tag 'pull-aspeed-20241211' of https://github.com/legoater/qemu into staging (2024-12-11 15:16:47 +0000)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241212

for you to fetch changes up to 7ac87b14a92234b6a89b701b4043ad6cf8bdcccf:

  target/sparc: Use memcpy() and remove memcpy32() (2024-12-12 14:28:38 -0600)

----------------------------------------------------------------
tcg: Reset free_temps before tcg_optimize
tcg/riscv: Fix StoreStore barrier generation
include/exec: Introduce fpst alias in helper-head.h.inc
target/sparc: Use memcpy() and remove memcpy32()

----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
      target/sparc: Use memcpy() and remove memcpy32()

Richard Henderson (2):
      tcg: Reset free_temps before tcg_optimize
      include/exec: Introduce fpst alias in helper-head.h.inc

Roman Artemev (1):
      tcg/riscv: Fix StoreStore barrier generation

 include/tcg/tcg-temp-internal.h |  6 ++++++
 accel/tcg/plugin-gen.c          |  2 +-
 target/sparc/win_helper.c       | 26 ++++++++------------------
 tcg/tcg.c                       |  5 ++++-
 include/exec/helper-head.h.inc  |  3 +++
 tcg/riscv/tcg-target.c.inc      |  2 +-
 6 files changed, 23 insertions(+), 21 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

Re: [PULL 0/4] tcg patch queue

[Philippe Mathieu-Daudé]

Hi Stefan,

On 13/12/24 02:21, Stefan Hajnoczi wrote:
> Applied, thanks.

I guess you are pushing to the 'master' of your personal
repository, not the QEMU project's one.

Re: [PULL 0/4] tcg patch queue

[Stefan Hajnoczi]

On Fri, 13 Dec 2024 at 05:42, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> Hi Stefan,
>
> On 13/12/24 02:21, Stefan Hajnoczi wrote:
> > Applied, thanks.
>
> I guess you are pushing to the 'master' of your personal
> repository, not the QEMU project's one.

You're right. Thanks for letting me know!

Stefan

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 34eac35f893664eb8545b98142e23d9954722766:

  Merge tag 'pull-riscv-to-apply-20240110' of https://github.com/alistair23/qemu into staging (2024-01-10 11:41:56 +0000)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240111

for you to fetch changes up to 1d513e06d96697f44de4a1b85c6ff627c443e306:

  util: fix build with musl libc on ppc64le (2024-01-11 08:48:16 +1100)

----------------------------------------------------------------
tcg/i386: Use more 8-bit immediate forms for add, sub, or, xor
tcg/ppc: Use new registers for LQ destination
util: fix build with musl libc on ppc64le

----------------------------------------------------------------
Natanael Copa (1):
      util: fix build with musl libc on ppc64le

Paolo Bonzini (2):
      tcg/i386: convert add/sub of 128 to sub/add of -128
      tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates

Richard Henderson (1):
      tcg/ppc: Use new registers for LQ destination

 tcg/ppc/tcg-target-con-set.h |  2 +-
 tcg/tcg.c                    | 21 ++++++++++++----
 util/cpuinfo-ppc.c           |  6 ++---
 tcg/i386/tcg-target.c.inc    | 60 +++++++++++++++++++++++++++++++++-----------
 tcg/ppc/tcg-target.c.inc     |  3 ++-
 5 files changed, 67 insertions(+), 25 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Wed, 10 Jan 2024 at 21:52, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 34eac35f893664eb8545b98142e23d9954722766:
>
>   Merge tag 'pull-riscv-to-apply-20240110' of https://github.com/alistair23/qemu into staging (2024-01-10 11:41:56 +0000)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240111
>
> for you to fetch changes up to 1d513e06d96697f44de4a1b85c6ff627c443e306:
>
>   util: fix build with musl libc on ppc64le (2024-01-11 08:48:16 +1100)
>
> ----------------------------------------------------------------
> tcg/i386: Use more 8-bit immediate forms for add, sub, or, xor
> tcg/ppc: Use new registers for LQ destination
> util: fix build with musl libc on ppc64le
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0
for any user-visible changes.

-- PMM

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 813bac3d8d70d85cb7835f7945eb9eed84c2d8d0:

  Merge tag '2023q3-bsd-user-pull-request' of https://gitlab.com/bsdimp/qemu into staging (2023-08-29 08:58:00 -0400)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230829

for you to fetch changes up to dad2f2f5afbaf58d6056f31dfd4b9edd0854b8ab:

  tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32 (2023-08-29 09:57:39 -0700)

----------------------------------------------------------------
softmmu: Use async_run_on_cpu in tcg_commit
tcg: Remove vecop_list check from tcg_gen_not_vec
tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32

----------------------------------------------------------------
Richard Henderson (4):
      softmmu: Assert data in bounds in iotlb_to_section
      softmmu: Use async_run_on_cpu in tcg_commit
      tcg: Remove vecop_list check from tcg_gen_not_vec
      tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32

 include/exec/cpu-common.h    |  1 -
 tcg/sparc64/tcg-target.h     |  2 +-
 accel/tcg/cpu-exec-common.c  | 30 --------------------------
 softmmu/physmem.c            | 50 ++++++++++++++++++++++++++++++++------------
 tcg/tcg-op-vec.c             |  7 +++----
 tcg/sparc64/tcg-target.c.inc | 11 ----------
 6 files changed, 41 insertions(+), 60 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 8/29/23 10:02, Richard Henderson wrote:
> The following changes since commit 813bac3d8d70d85cb7835f7945eb9eed84c2d8d0:
> 
>    Merge tag '2023q3-bsd-user-pull-request' of https://gitlab.com/bsdimp/qemu into staging (2023-08-29 08:58:00 -0400)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230829
> 
> for you to fetch changes up to dad2f2f5afbaf58d6056f31dfd4b9edd0854b8ab:
> 
>    tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32 (2023-08-29 09:57:39 -0700)
> 
> ----------------------------------------------------------------
> softmmu: Use async_run_on_cpu in tcg_commit
> tcg: Remove vecop_list check from tcg_gen_not_vec
> tcg/sparc64: Disable TCG_TARGET_HAS_extr_i64_i32
> 

Disregard this PR.  I will re-issue with the abi_ptr change reverted.


r~

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 2d20a57453f6a206938cbbf77bed0b378c806c1f:

  Merge tag 'pull-fixes-for-7.1-200422-1' of https://github.com/stsquad/qemu into staging (2022-04-20 11:13:08 -0700)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220420

for you to fetch changes up to a61532faa5a4d5e021e35b6a4a1e180c72d4a22f:

  tcg: Add tcg_constant_ptr (2022-04-20 12:12:47 -0700)

----------------------------------------------------------------
Cleanup sysemu/tcg.h usage.
Fix indirect lowering vs cond branches
Remove ATOMIC_MMU_IDX
Add tcg_constant_ptr

----------------------------------------------------------------
Richard Henderson (3):
      tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH
      accel/tcg: Remove ATOMIC_MMU_IDX
      tcg: Add tcg_constant_ptr

Thomas Huth (1):
      Don't include sysemu/tcg.h if it is not necessary

 include/tcg/tcg.h                |  4 ++++
 accel/tcg/cputlb.c               |  1 -
 accel/tcg/hmp.c                  |  1 -
 accel/tcg/tcg-accel-ops-icount.c |  1 -
 accel/tcg/user-exec.c            |  1 -
 bsd-user/main.c                  |  1 -
 hw/virtio/vhost.c                |  1 -
 linux-user/main.c                |  1 -
 monitor/misc.c                   |  1 -
 target/arm/helper.c              |  1 -
 target/s390x/cpu_models_sysemu.c |  1 -
 target/s390x/helper.c            |  1 -
 tcg/tcg.c                        | 34 +++++++++++++++++++++++++++-------
 13 files changed, 31 insertions(+), 18 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 4/20/22 12:16, Richard Henderson wrote:
> The following changes since commit 2d20a57453f6a206938cbbf77bed0b378c806c1f:
> 
>    Merge tag 'pull-fixes-for-7.1-200422-1' of https://github.com/stsquad/qemu into staging (2022-04-20 11:13:08 -0700)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220420
> 
> for you to fetch changes up to a61532faa5a4d5e021e35b6a4a1e180c72d4a22f:
> 
>    tcg: Add tcg_constant_ptr (2022-04-20 12:12:47 -0700)
> 
> ----------------------------------------------------------------
> Cleanup sysemu/tcg.h usage.
> Fix indirect lowering vs cond branches
> Remove ATOMIC_MMU_IDX
> Add tcg_constant_ptr

Applied, thanks.  Please update the wiki changelog for 7.1 as appropriate.


r~

> 
> ----------------------------------------------------------------
> Richard Henderson (3):
>        tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH
>        accel/tcg: Remove ATOMIC_MMU_IDX
>        tcg: Add tcg_constant_ptr
> 
> Thomas Huth (1):
>        Don't include sysemu/tcg.h if it is not necessary
> 
>   include/tcg/tcg.h                |  4 ++++
>   accel/tcg/cputlb.c               |  1 -
>   accel/tcg/hmp.c                  |  1 -
>   accel/tcg/tcg-accel-ops-icount.c |  1 -
>   accel/tcg/user-exec.c            |  1 -
>   bsd-user/main.c                  |  1 -
>   hw/virtio/vhost.c                |  1 -
>   linux-user/main.c                |  1 -
>   monitor/misc.c                   |  1 -
>   target/arm/helper.c              |  1 -
>   target/s390x/cpu_models_sysemu.c |  1 -
>   target/s390x/helper.c            |  1 -
>   tcg/tcg.c                        | 34 +++++++++++++++++++++++++++-------
>   13 files changed, 31 insertions(+), 18 deletions(-)

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 15df33ceb73cb6bb3c6736cf4d2cff51129ed4b4:

  Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20220312-1' into staging (2022-03-13 17:29:18 +0000)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220314

for you to fetch changes up to 76cff100beeae8d3676bb658cccd45ef5ced8aa9:

  tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1 (2022-03-14 10:31:51 -0700)

----------------------------------------------------------------
Fixes for s390x host vectors
Fix for arm ldrd unpredictable case

----------------------------------------------------------------
Richard Henderson (4):
      tcg/s390x: Fix tcg_out_dupi_vec vs VGM
      tcg/s390x: Fix INDEX_op_bitsel_vec vs VSEL
      tcg/s390x: Fix tcg_out_dup_vec vs general registers
      tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1

 tcg/arm/tcg-target.c.inc   | 17 +++++++++++++++--
 tcg/s390x/tcg-target.c.inc |  7 ++++---
 2 files changed, 19 insertions(+), 5 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Mon, 14 Mar 2022 at 17:36, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 15df33ceb73cb6bb3c6736cf4d2cff51129ed4b4:
>
>   Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20220312-1' into staging (2022-03-13 17:29:18 +0000)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220314
>
> for you to fetch changes up to 76cff100beeae8d3676bb658cccd45ef5ced8aa9:
>
>   tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1 (2022-03-14 10:31:51 -0700)
>
> ----------------------------------------------------------------
> Fixes for s390x host vectors
> Fix for arm ldrd unpredictable case
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/7.0
for any user-visible changes.

-- PMM

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 67e41fe0cfb62e6cdfa659f0155417d17e5274ea:

  Merge tag 'pull-ppc-20220104' of https://github.com/legoater/qemu into staging (2022-01-04 07:23:27 -0800)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220104

for you to fetch changes up to d7478d4229f0a2b2817a55487e6b17081099fae4:

  common-user: Fix tail calls to safe_syscall_set_errno_tail (2022-01-04 15:41:03 -0800)

----------------------------------------------------------------
Fix for safe_syscall_base.
Fix for folding of vector add/sub.
Fix build on loongarch64 with gcc 8.
Remove decl for qemu_run_machine_init_done_notifiers.

----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
      linux-user: Fix trivial build error on loongarch64 hosts

Richard Henderson (2):
      tcg/optimize: Fix folding of vector ops
      common-user: Fix tail calls to safe_syscall_set_errno_tail

Xiaoyao Li (1):
      sysemu: Cleanup qemu_run_machine_init_done_notifiers()

 include/sysemu/sysemu.h                    |  1 -
 linux-user/host/loongarch64/host-signal.h  |  4 +--
 tcg/optimize.c                             | 49 +++++++++++++++++++++++-------
 common-user/host/i386/safe-syscall.inc.S   |  1 +
 common-user/host/mips/safe-syscall.inc.S   |  1 +
 common-user/host/x86_64/safe-syscall.inc.S |  1 +
 6 files changed, 42 insertions(+), 15 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 1/4/22 4:40 PM, Richard Henderson wrote:
> The following changes since commit 67e41fe0cfb62e6cdfa659f0155417d17e5274ea:
> 
>    Merge tag 'pull-ppc-20220104' of https://github.com/legoater/qemu into staging (2022-01-04 07:23:27 -0800)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220104
> 
> for you to fetch changes up to d7478d4229f0a2b2817a55487e6b17081099fae4:
> 
>    common-user: Fix tail calls to safe_syscall_set_errno_tail (2022-01-04 15:41:03 -0800)
> 
> ----------------------------------------------------------------
> Fix for safe_syscall_base.
> Fix for folding of vector add/sub.
> Fix build on loongarch64 with gcc 8.
> Remove decl for qemu_run_machine_init_done_notifiers.
> 
> ----------------------------------------------------------------
> Philippe Mathieu-Daudé (1):
>        linux-user: Fix trivial build error on loongarch64 hosts
> 
> Richard Henderson (2):
>        tcg/optimize: Fix folding of vector ops
>        common-user: Fix tail calls to safe_syscall_set_errno_tail
> 
> Xiaoyao Li (1):
>        sysemu: Cleanup qemu_run_machine_init_done_notifiers()
> 
>   include/sysemu/sysemu.h                    |  1 -
>   linux-user/host/loongarch64/host-signal.h  |  4 +--
>   tcg/optimize.c                             | 49 +++++++++++++++++++++++-------
>   common-user/host/i386/safe-syscall.inc.S   |  1 +
>   common-user/host/mips/safe-syscall.inc.S   |  1 +
>   common-user/host/x86_64/safe-syscall.inc.S |  1 +
>   6 files changed, 42 insertions(+), 15 deletions(-)

Applied.

r~

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 1b9fc6d8ba6667ceb56a3392e84656dcaed0d676:

  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2021-11-11 09:56:22 +0100)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211111

for you to fetch changes up to d58f01733b94845b0c2232018a2bedb6a2347ec5:

  tcg/s390x: Fix tcg_out_vec_op argument type (2021-11-11 11:47:58 +0100)

----------------------------------------------------------------
appease coverity vs extract2
update docs for ctpop opcodes
tcg/s390x build fix for gcc11

----------------------------------------------------------------
Miroslav Rezanina (1):
      tcg/s390x: Fix tcg_out_vec_op argument type

Philippe Mathieu-Daudé (1):
      tcg: Remove TCI experimental status

Richard Henderson (2):
      tcg/optimize: Add an extra cast to fold_extract2
      tcg: Document ctpop opcodes

 docs/about/build-platforms.rst | 10 ++++++----
 meson.build                    |  4 ++--
 tcg/optimize.c                 |  2 +-
 tcg/s390x/tcg-target.c.inc     |  3 ++-
 meson_options.txt              |  2 +-
 scripts/meson-buildoptions.sh  |  3 +--
 tcg/README                     |  6 ++++++
 7 files changed, 19 insertions(+), 11 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Richard Henderson]

On 11/11/21 12:06 PM, Richard Henderson wrote:
> The following changes since commit 1b9fc6d8ba6667ceb56a3392e84656dcaed0d676:
> 
>    Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2021-11-11 09:56:22 +0100)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211111
> 
> for you to fetch changes up to d58f01733b94845b0c2232018a2bedb6a2347ec5:
> 
>    tcg/s390x: Fix tcg_out_vec_op argument type (2021-11-11 11:47:58 +0100)
> 
> ----------------------------------------------------------------
> appease coverity vs extract2
> update docs for ctpop opcodes
> tcg/s390x build fix for gcc11
> 
> ----------------------------------------------------------------
> Miroslav Rezanina (1):
>        tcg/s390x: Fix tcg_out_vec_op argument type
> 
> Philippe Mathieu-Daudé (1):
>        tcg: Remove TCI experimental status
> 
> Richard Henderson (2):
>        tcg/optimize: Add an extra cast to fold_extract2
>        tcg: Document ctpop opcodes
> 
>   docs/about/build-platforms.rst | 10 ++++++----
>   meson.build                    |  4 ++--
>   tcg/optimize.c                 |  2 +-
>   tcg/s390x/tcg-target.c.inc     |  3 ++-
>   meson_options.txt              |  2 +-
>   scripts/meson-buildoptions.sh  |  3 +--
>   tcg/README                     |  6 ++++++
>   7 files changed, 19 insertions(+), 11 deletions(-)

Applied, thanks.

r~

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:

  Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513

for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:

  tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)

----------------------------------------------------------------
Minor gen-icount.h fix.
BSD cpu_signal_handler fix.
Add missing tcg_constant_tl symbol.

----------------------------------------------------------------
Matheus Ferst (1):
      tcg: Add tcg_constant_tl

Philippe Mathieu-Daudé (2):
      MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section
      exec/gen-icount.h: Add missing "exec/exec-all.h" include

Warner Losh (1):
      tcg: Use correct trap number for page faults on *BSD systems

 include/exec/gen-icount.h |  1 +
 include/tcg/tcg-op.h      |  2 ++
 accel/tcg/user-exec.c     | 14 ++++++++++++--
 MAINTAINERS               |  1 +
 4 files changed, 16 insertions(+), 2 deletions(-)

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Thu, 13 May 2021 at 13:20, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:
>
>   Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513
>
> for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:
>
>   tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)
>
> ----------------------------------------------------------------
> Minor gen-icount.h fix.
> BSD cpu_signal_handler fix.
> Add missing tcg_constant_tl symbol.
>

Fails to build on FreeBSD and OpenBSD:


../src/accel/tcg/user-exec.c:358:46: error: use of undeclared
identifier 'T_PAGEFLT'
                             TRAP_sig(uc) == PAGE_FAULT_TRAP ?
                                             ^
../src/accel/tcg/user-exec.c:334:31: note: expanded from macro 'PAGE_FAULT_TRAP'
#define PAGE_FAULT_TRAP       T_PAGEFLT
                              ^

thanks
-- PMM

Re: [PULL 0/4] tcg patch queue

[Philippe Mathieu-Daudé]

On 5/14/21 1:03 PM, Peter Maydell wrote:
> On Thu, 13 May 2021 at 13:20, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:
>>
>>   Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)
>>
>> are available in the Git repository at:
>>
>>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513
>>
>> for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:
>>
>>   tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)
>>
>> ----------------------------------------------------------------
>> Minor gen-icount.h fix.
>> BSD cpu_signal_handler fix.
>> Add missing tcg_constant_tl symbol.
>>
> 
> Fails to build on FreeBSD and OpenBSD:
> 
> 
> ../src/accel/tcg/user-exec.c:358:46: error: use of undeclared
> identifier 'T_PAGEFLT'
>                              TRAP_sig(uc) == PAGE_FAULT_TRAP ?
>                                              ^
> ../src/accel/tcg/user-exec.c:334:31: note: expanded from macro 'PAGE_FAULT_TRAP'
> #define PAGE_FAULT_TRAP       T_PAGEFLT

Good excuse to highlight my "gitlab-ci: Allow using FreeBSD runners"
series :)
https://www.mail-archive.com/qemu-devel@nongnu.org/msg806537.html

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 654efcb511d394c1d3f5292c28503d1d19e5b1d3:

  Merge remote-tracking branch 'remotes/vivier/tags/q800-branch-pull-request' into staging (2019-11-11 09:23:46 +0000)

are available in the Git repository at:

  https://github.com/rth7680/qemu.git tags/pull-tcg-20191111

for you to fetch changes up to cb974c95df0e1c9e73a37facd3e13894bd3eedc2:

  tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing (2019-11-11 15:11:21 +0100)

----------------------------------------------------------------
Remove no-longer-true statement that TCG is BSD-licensed

----------------------------------------------------------------
Peter Maydell (4):
      tcg/aarch64/tcg-target.opc.h: Add copyright/license
      tcg/i386/tcg-target.opc.h: Add copyright/license
      tcg/ppc/tcg-target.opc.h: Add copyright/license
      tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing

 tcg/aarch64/tcg-target.opc.h | 15 ++++++++++++---
 tcg/i386/tcg-target.opc.h    | 28 +++++++++++++++++++++++++---
 tcg/ppc/tcg-target.opc.h     | 20 ++++++++++++++++++++
 LICENSE                      |  5 +++--
 tcg/LICENSE                  |  3 ---
 5 files changed, 60 insertions(+), 11 deletions(-)
 delete mode 100644 tcg/LICENSE

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Mon, 11 Nov 2019 at 15:56, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 654efcb511d394c1d3f5292c28503d1d19e5b1d3:
>
>   Merge remote-tracking branch 'remotes/vivier/tags/q800-branch-pull-request' into staging (2019-11-11 09:23:46 +0000)
>
> are available in the Git repository at:
>
>   https://github.com/rth7680/qemu.git tags/pull-tcg-20191111
>
> for you to fetch changes up to cb974c95df0e1c9e73a37facd3e13894bd3eedc2:
>
>   tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing (2019-11-11 15:11:21 +0100)
>
> ----------------------------------------------------------------
> Remove no-longer-true statement that TCG is BSD-licensed
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.2
for any user-visible changes.

-- PMM