From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <anup@brainfault.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
Jason Cooper <jason@lakedaemon.net>,
Anup Patel <anup.patel@wdc.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>, Atish Patra <atish.patra@wdc.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Thomas Gleixner <tglx@linutronix.de>,
linux-riscv <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v6 3/6] irqchip: RISC-V per-HART local interrupt controller driver
Date: Mon, 01 Jun 2020 08:41:00 +0100 [thread overview]
Message-ID: <ffeba9a68e72cf2cb97759c5fb496fac@kernel.org> (raw)
In-Reply-To: <CAAhSdy3-dr1URn1mGu3n9D-h+wjsU18nbWPYMRNAtitMa58rwA@mail.gmail.com>
On 2020-06-01 05:09, Anup Patel wrote:
> On Sun, May 31, 2020 at 4:23 PM Marc Zyngier <maz@kernel.org> wrote:
>>
>> On 2020-05-31 11:06, Anup Patel wrote:
[...]
> Also, the PLIC spec is now owned by RISC-V foundation (not SiFive) so
> we will have to rename the driver to "irq-riscv-plic" and will have a
> new
> generic compatible string "riscv,plic-1.0.0". One of us (me or Palmer)
> will
> send separate patches for this renaming. I hope you will be fine with
> this??
> (Refer, https://github.com/riscv/riscv-plic-spec)
Do we really need the churn of a renaming? A new compatible, and maybe
a new config option should be enough, no? What does the renaming give
us?
Thanks,
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <anup@brainfault.org>
Cc: Anup Patel <anup.patel@wdc.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
Palmer Dabbelt <palmerdabbelt@google.com>
Subject: Re: [PATCH v6 3/6] irqchip: RISC-V per-HART local interrupt controller driver
Date: Mon, 01 Jun 2020 08:41:00 +0100 [thread overview]
Message-ID: <ffeba9a68e72cf2cb97759c5fb496fac@kernel.org> (raw)
In-Reply-To: <CAAhSdy3-dr1URn1mGu3n9D-h+wjsU18nbWPYMRNAtitMa58rwA@mail.gmail.com>
On 2020-06-01 05:09, Anup Patel wrote:
> On Sun, May 31, 2020 at 4:23 PM Marc Zyngier <maz@kernel.org> wrote:
>>
>> On 2020-05-31 11:06, Anup Patel wrote:
[...]
> Also, the PLIC spec is now owned by RISC-V foundation (not SiFive) so
> we will have to rename the driver to "irq-riscv-plic" and will have a
> new
> generic compatible string "riscv,plic-1.0.0". One of us (me or Palmer)
> will
> send separate patches for this renaming. I hope you will be fine with
> this??
> (Refer, https://github.com/riscv/riscv-plic-spec)
Do we really need the churn of a renaming? A new compatible, and maybe
a new config option should be enough, no? What does the renaming give
us?
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2020-06-01 7:41 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-30 10:07 [PATCH v6 0/6] New RISC-V Local Interrupt Controller Driver Anup Patel
2020-05-30 10:07 ` Anup Patel
2020-05-30 10:07 ` [PATCH v6 1/6] RISC-V: self-contained IPI handling routine Anup Patel
2020-05-30 10:07 ` Anup Patel
2020-05-30 10:07 ` [PATCH v6 2/6] RISC-V: Rename and move plic_find_hart_id() to arch directory Anup Patel
2020-05-30 10:07 ` Anup Patel
2020-05-30 10:07 ` [PATCH v6 3/6] irqchip: RISC-V per-HART local interrupt controller driver Anup Patel
2020-05-30 10:07 ` Anup Patel
2020-05-30 12:01 ` Marc Zyngier
2020-05-30 12:01 ` Marc Zyngier
2020-05-31 5:36 ` Anup Patel
2020-05-31 5:36 ` Anup Patel
2020-05-31 9:33 ` Marc Zyngier
2020-05-31 9:33 ` Marc Zyngier
2020-05-31 10:06 ` Anup Patel
2020-05-31 10:06 ` Anup Patel
2020-05-31 10:53 ` Marc Zyngier
2020-05-31 10:53 ` Marc Zyngier
2020-06-01 4:09 ` Anup Patel
2020-06-01 4:09 ` Anup Patel
2020-06-01 7:41 ` Marc Zyngier [this message]
2020-06-01 7:41 ` Marc Zyngier
2020-06-01 9:13 ` Anup Patel
2020-06-01 9:13 ` Anup Patel
2020-06-01 9:33 ` Guo Ren
2020-06-01 9:33 ` Guo Ren
2020-05-30 10:07 ` [PATCH v6 4/6] clocksource/drivers/timer-riscv: Use per-CPU timer interrupt Anup Patel
2020-05-30 10:07 ` Anup Patel
2020-05-30 11:41 ` Marc Zyngier
2020-05-30 11:41 ` Marc Zyngier
2020-05-31 5:52 ` Anup Patel
2020-05-31 5:52 ` Anup Patel
2020-05-30 10:07 ` [PATCH v6 5/6] RISC-V: Remove do_IRQ() function Anup Patel
2020-05-30 10:07 ` Anup Patel
2020-05-30 10:07 ` [PATCH v6 6/6] RISC-V: Force select RISCV_INTC for CONFIG_RISCV Anup Patel
2020-05-30 10:07 ` Anup Patel
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