From: "Maksim E. Kozlov" <m.kozlov@samsung.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v3 02/14] ARM: exynos4210: CMU support
Date: Wed, 14 Dec 2011 20:08:39 +0300 [thread overview]
Message-ID: <jcahv8$7qj$1@dough.gmane.org> (raw)
In-Reply-To: <CAFEAcA_kSShKPpuk+OtER9fQi+ddo7g2EwWqHohn8axTEe0X=w@mail.gmail.com>
>> +
>> +/*
>> + * There are five CMUs:
>> + *
>> + * CMU_LEFTBUS
>> + * CMU_RIGHTBUS
>> + * CMU_TOP
>> + * CMU_DMC
>> + * CMU_CPU
>> + *
>> + * each of them uses 16KB address space for SFRs
>> + *
>> + * + 0x4000 because SFR region for CMUs starts at 0x10030000,
>> + * but the first CMU (CMU_LEFTBUS) starts with this offset
>> + *
>> + */
>> +#define EXYNOS4210_CMU_REGS_MEM_SIZE (0x4000 * 5 + 0x4000)
>
> It seems a bit unlikely to me that there's really a single indivisble
> bit of hardware with 23 kilobytes worth of register area. Is there
> a better way of structuring this so that there are a number of
> sub-memory-regions that cover this space each with their own
> read/write functions (and perhaps with their own state structs)?
> (eg instantiate five CPUs at the right locations.)
>
Dear Peter,
Sorry, but I don't quite understand what do you mean. Which 23 kilobytes
you have in mind?
And what benefits we get from division whole region into some
sub-regions? Current approach seems quite simple and clear. Isn't it?
next prev parent reply other threads:[~2011-12-14 16:13 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-12 6:43 [Qemu-devel] [PATCH v3 00/14] ARM: Samsung Exynos4210-based boards support Evgeny Voevodin
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 01/14] ARM: Samsung exynos4210-based boards emulation Evgeny Voevodin
2011-12-12 22:17 ` Peter Maydell
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 02/14] ARM: exynos4210: CMU support Evgeny Voevodin
2011-12-12 22:44 ` Peter Maydell
2011-12-14 12:10 ` Maksim E. Kozlov
2011-12-14 11:43 ` Peter Maydell
2011-12-14 17:08 ` Maksim E. Kozlov [this message]
2011-12-14 16:25 ` Peter Maydell
2011-12-15 7:11 ` Dmitry Solodkiy
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 03/14] ARM: exynos4210: UART support Evgeny Voevodin
2011-12-12 22:55 ` Peter Maydell
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 04/14] hw/sysbus.h: Increase maximum number of device IRQs Evgeny Voevodin
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 05/14] ARM: exynos4210: IRQ subsystem support Evgeny Voevodin
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 06/14] ARM: exynos4210: PWM support Evgeny Voevodin
2011-12-13 10:51 ` Peter Maydell
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 07/14] hw/arm_boot.c: Add new secondary CPU bootloader Evgeny Voevodin
2011-12-13 11:28 ` Peter Maydell
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 08/14] ARM: exynos4210: MCT support Evgeny Voevodin
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 09/14] hw/exynos4210.c: Boot secondary CPU Evgeny Voevodin
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 10/14] hw/lan9118: Add basic 16-bit mode support Evgeny Voevodin
2011-12-13 11:54 ` Peter Maydell
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 11/14] hw/exynos4210.c: Add LAN support for SMDKC210 Evgeny Voevodin
2011-12-13 12:01 ` Peter Maydell
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 12/14] hw/sd.c, hw/sd.h: add receive ready query routine to SD/MMC API Evgeny Voevodin
2011-12-13 15:11 ` Peter Maydell
2011-12-13 16:22 ` Peter Maydell
2011-12-14 8:29 ` Mitsyanko Igor
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 13/14] ARM: exynos4210: added SD/MMC host controller Evgeny Voevodin
2011-12-13 14:56 ` Peter Maydell
2011-12-13 16:23 ` Mitsyanko Igor
2011-12-12 6:43 ` [Qemu-devel] [PATCH v3 14/14] ARM: exynos4210: added display controller implementation Evgeny Voevodin
2011-12-12 7:22 ` [Qemu-devel] [PATCH v3 00/14] ARM: Samsung Exynos4210-based boards support Stefan Weil
2011-12-13 10:14 ` Peter Maydell
2011-12-13 10:37 ` Dmitry Solodkiy
2011-12-13 10:59 ` Peter Maydell
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