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From: khalasa@piap.pl (Krzysztof Hałasa)
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Koen Vandeputte <koen.vandeputte@ncentric.com>,
	linux-arm-kernel@lists.infradead.org,
	Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	Tim Harvey <tharvey@gateworks.com>,
	Russell King <linux@armlinux.org.uk>,
	stable@vger.kernel.org, Robin Leblon <robin.leblon@ncentric.com>,
	Olof Johansson <olof@lixom.net>,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH] arm: cns3xxx: fix writing to wrong PCI registers after alignment
Date: Mon, 31 Dec 2018 11:14:28 +0100	[thread overview]
Message-ID: <m336qegfzv.fsf@t19.piap.pl> (raw)
In-Reply-To: <20181230010625.GC159477@google.com> (Bjorn Helgaas's message of "Sat, 29 Dec 2018 19:06:26 -0600")

Hi,

Bjorn Helgaas <helgaas@kernel.org> writes:

> 802b7c06adc7 replaced cns3xxx_pci_write_config(), which always used
> __raw_writel() so it only did 32-bit accesses, with
> pci_generic_config_write(), which uses writeb/writew/writel()
> depending on the size.
>
> 802b7c06adc7 also converted cns3xxx_pci_read_config() from always
> using __raw_readl() (a 32-bit access) to using
> pci_generic_config_read32(), which also always does a 32-bit access.
>
> This makes me think the cnx3xxx hardware is only capable of 32-bit
> accesses, and this patch should change the driver to use
> pci_generic_config_write32() instead of pci_generic_config_write() in
> addition to the mapping fix above.

Hasn't it already been verified that the CNS3xxx can do 8-bit accesses
(and probably 16-bit ones as well), and that the docs don't mention any
such limitation?

> I don't think hardware that only supports 32-bit PCI writes can be
> quite spec-compliant (see the comments in
> pci_generic_config_write32()).  So (1) you may see an additional
> dmesg warning when you convert to use it, and (2) it's possible that
> there may still be instability related to the corruption caused by
> using a 32-bit write when an 8-bit write was intended.

Right. I think IDE/SATA controllers are affected, for example.
-- 
Krzysztof Halasa

Industrial Research Institute for Automation and Measurements PIAP
Al. Jerozolimskie 202, 02-486 Warsaw, Poland

WARNING: multiple messages have this Message-ID (diff)
From: khalasa@piap.pl (Krzysztof Hałasa)
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	linux-pci@vger.kernel.org, Tim Harvey <tharvey@gateworks.com>,
	Russell King <linux@armlinux.org.uk>,
	stable@vger.kernel.org, Robin Leblon <robin.leblon@ncentric.com>,
	Koen Vandeputte <koen.vandeputte@ncentric.com>,
	Olof Johansson <olof@lixom.net>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm: cns3xxx: fix writing to wrong PCI registers after alignment
Date: Mon, 31 Dec 2018 11:14:28 +0100	[thread overview]
Message-ID: <m336qegfzv.fsf@t19.piap.pl> (raw)
In-Reply-To: <20181230010625.GC159477@google.com> (Bjorn Helgaas's message of "Sat, 29 Dec 2018 19:06:26 -0600")

Hi,

Bjorn Helgaas <helgaas@kernel.org> writes:

> 802b7c06adc7 replaced cns3xxx_pci_write_config(), which always used
> __raw_writel() so it only did 32-bit accesses, with
> pci_generic_config_write(), which uses writeb/writew/writel()
> depending on the size.
>
> 802b7c06adc7 also converted cns3xxx_pci_read_config() from always
> using __raw_readl() (a 32-bit access) to using
> pci_generic_config_read32(), which also always does a 32-bit access.
>
> This makes me think the cnx3xxx hardware is only capable of 32-bit
> accesses, and this patch should change the driver to use
> pci_generic_config_write32() instead of pci_generic_config_write() in
> addition to the mapping fix above.

Hasn't it already been verified that the CNS3xxx can do 8-bit accesses
(and probably 16-bit ones as well), and that the docs don't mention any
such limitation?

> I don't think hardware that only supports 32-bit PCI writes can be
> quite spec-compliant (see the comments in
> pci_generic_config_write32()).  So (1) you may see an additional
> dmesg warning when you convert to use it, and (2) it's possible that
> there may still be instability related to the corruption caused by
> using a 32-bit write when an 8-bit write was intended.

Right. I think IDE/SATA controllers are affected, for example.
-- 
Krzysztof Halasa

Industrial Research Institute for Automation and Measurements PIAP
Al. Jerozolimskie 202, 02-486 Warsaw, Poland

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2018-12-31 10:21 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-18 11:17 [PATCH] arm: cns3xxx: fix writing to wrong PCI registers after alignment Koen Vandeputte
2018-12-18 11:17 ` Koen Vandeputte
2018-12-18 16:04 ` Tim Harvey
2018-12-18 16:04   ` Tim Harvey
2018-12-20  5:34 ` Krzysztof Hałasa
2018-12-20  5:34   ` Krzysztof Hałasa
2018-12-29 14:40 ` Koen Vandeputte
2018-12-29 14:40   ` Koen Vandeputte
2018-12-30  1:06 ` Bjorn Helgaas
2018-12-30  1:06   ` Bjorn Helgaas
2018-12-31 10:14   ` Krzysztof Hałasa [this message]
2018-12-31 10:14     ` Krzysztof Hałasa
2018-12-31 15:29     ` Bjorn Helgaas
2018-12-31 15:29       ` Bjorn Helgaas
2019-01-07  8:58       ` Koen Vandeputte
2019-01-07  8:58         ` Koen Vandeputte
2019-01-07 13:24         ` Bjorn Helgaas
2019-01-07 13:24           ` Bjorn Helgaas

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