From: khalasa@piap.pl (Krzysztof Hałasa)
To: Koen Vandeputte <koen.vandeputte@ncentric.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
Robin Leblon <robin.leblon@ncentric.com>,
Rob Herring <robh@kernel.org>,
Russell King <linux@armlinux.org.uk>,
Tim Harvey <tharvey@gateworks.com>,
stable@vger.kernel.org
Subject: Re: [PATCH v2 2/2] arm: cns3xxx: use actual size reads for PCIe
Date: Tue, 08 Jan 2019 07:10:26 +0100 [thread overview]
Message-ID: <m37efffzn1.fsf@t19.piap.pl> (raw)
In-Reply-To: <20190107134510.32494-2-koen.vandeputte@ncentric.com> (Koen Vandeputte's message of "Mon, 7 Jan 2019 14:45:10 +0100")
Koen Vandeputte <koen.vandeputte@ncentric.com> writes:
> commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
> reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(),
> which preserved the property of only doing 32-bit reads.
>
> It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(),
> so it changed writes from always being 32 bits to being the actual size,
> which works just fine.
>
> Due to:
> - The documentation does not mention that only 32 bit access is allowed.
> - Writes are already executed using the actual size
> - Extensive testing shows that 8b, 16b and 32b reads work as intended
>
> It makes perfectly sense to also swap 32 bit reading in favor of actual size.
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
> --- a/arch/arm/mach-cns3xxx/pcie.c
> +++ b/arch/arm/mach-cns3xxx/pcie.c
> @@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
> u32 mask = (0x1ull << (size * 8)) - 1;
> int shift = (where % 4) * 8;
>
> - ret = pci_generic_config_read32(bus, devfn, where, size, val);
> + ret = pci_generic_config_read(bus, devfn, where, size, val);
>
> if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn &&
> (where & 0xffc) == PCI_CLASS_REVISION)
--
Krzysztof Halasa
Industrial Research Institute for Automation and Measurements PIAP
Al. Jerozolimskie 202, 02-486 Warsaw, Poland
WARNING: multiple messages have this Message-ID (diff)
From: khalasa@piap.pl (Krzysztof Hałasa)
To: Koen Vandeputte <koen.vandeputte@ncentric.com>
Cc: Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
linux-pci@vger.kernel.org, Tim Harvey <tharvey@gateworks.com>,
Russell King <linux@armlinux.org.uk>,
stable@vger.kernel.org, Robin Leblon <robin.leblon@ncentric.com>,
Olof Johansson <olof@lixom.net>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/2] arm: cns3xxx: use actual size reads for PCIe
Date: Tue, 08 Jan 2019 07:10:26 +0100 [thread overview]
Message-ID: <m37efffzn1.fsf@t19.piap.pl> (raw)
In-Reply-To: <20190107134510.32494-2-koen.vandeputte@ncentric.com> (Koen Vandeputte's message of "Mon, 7 Jan 2019 14:45:10 +0100")
Koen Vandeputte <koen.vandeputte@ncentric.com> writes:
> commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
> reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(),
> which preserved the property of only doing 32-bit reads.
>
> It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(),
> so it changed writes from always being 32 bits to being the actual size,
> which works just fine.
>
> Due to:
> - The documentation does not mention that only 32 bit access is allowed.
> - Writes are already executed using the actual size
> - Extensive testing shows that 8b, 16b and 32b reads work as intended
>
> It makes perfectly sense to also swap 32 bit reading in favor of actual size.
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
> --- a/arch/arm/mach-cns3xxx/pcie.c
> +++ b/arch/arm/mach-cns3xxx/pcie.c
> @@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
> u32 mask = (0x1ull << (size * 8)) - 1;
> int shift = (where % 4) * 8;
>
> - ret = pci_generic_config_read32(bus, devfn, where, size, val);
> + ret = pci_generic_config_read(bus, devfn, where, size, val);
>
> if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn &&
> (where & 0xffc) == PCI_CLASS_REVISION)
--
Krzysztof Halasa
Industrial Research Institute for Automation and Measurements PIAP
Al. Jerozolimskie 202, 02-486 Warsaw, Poland
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next prev parent reply other threads:[~2019-01-08 6:10 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-07 13:45 [PATCH v2 1/2] arm: cns3xxx: fix writing to wrong PCI registers after alignment Koen Vandeputte
2019-01-07 13:45 ` Koen Vandeputte
2019-01-07 13:45 ` [PATCH v2 2/2] arm: cns3xxx: use actual size reads for PCIe Koen Vandeputte
2019-01-07 13:45 ` Koen Vandeputte
2019-01-08 6:10 ` Krzysztof Hałasa [this message]
2019-01-08 6:10 ` Krzysztof Hałasa
2019-01-25 10:55 ` Krzysztof Hałasa
2019-01-25 10:55 ` Krzysztof Hałasa
2019-01-24 11:56 ` [PATCH v2 1/2] arm: cns3xxx: fix writing to wrong PCI registers after alignment Lorenzo Pieralisi
2019-01-24 11:56 ` Lorenzo Pieralisi
2019-01-24 15:23 ` Koen Vandeputte
2019-01-24 15:23 ` Koen Vandeputte
2019-01-24 16:27 ` Lorenzo Pieralisi
2019-01-24 16:27 ` Lorenzo Pieralisi
2019-01-30 22:08 ` Arnd Bergmann
2019-01-30 22:08 ` Arnd Bergmann
2019-01-30 23:06 ` Bjorn Helgaas
2019-01-30 23:06 ` Bjorn Helgaas
2019-01-31 8:00 ` Arnd Bergmann
2019-01-31 8:00 ` Arnd Bergmann
2019-01-31 21:16 ` Bjorn Helgaas
2019-01-31 21:16 ` Bjorn Helgaas
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