From: Alexander Hoogerhuis <alexh@ihatent.com>
To: linux-kernel@vger.kernel.org
Subject: CPU/cache detection wrong
Date: 28 Sep 2002 14:29:31 +0200 [thread overview]
Message-ID: <m3hegaxpp0.fsf@lapper.ihatent.com> (raw)
Accroding to my kernel, this is what i got:
CPU: Before vendor init, caps: 3febf9ff 00000000 00000000, vendor = 0
CPU: L1 I cache: 0K, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: After vendor init, caps: 3febf9ff 00000000 00000000 00000000
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#0.
CPU: After generic, caps: 3febf9ff 00000000 00000000 00000000
CPU: Common caps: 3febf9ff 00000000 00000000 00000000
CPU: Intel(R) Pentium(R) 4 Mobile CPU 1.70GHz stepping 04
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Checking 'hlt' instruction... OK.
The machine is a Comapq Evo n800c with a 1.7GHz P4-M in it, and
according to the BIOS I've got 16kb/512Kb L1/L2-cache. Accroding to
the 2.4.20-pre7-ac3-kernel. It's been like this at least since
2.4.19-pre4 or so.
mvh,
A
--
Alexander Hoogerhuis | alexh@ihatent.com
CCNP - CCDP - MCNE - CCSE | +47 908 21 485
"You have zero privacy anyway. Get over it." --Scott McNealy
next reply other threads:[~2002-09-30 15:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-09-28 12:29 Alexander Hoogerhuis [this message]
2002-09-30 16:34 ` CPU/cache detection wrong Alan Cox
2002-09-30 17:43 ` Alexander Hoogerhuis
2002-09-30 22:15 ` Dave Jones
2002-10-01 7:21 ` Alexander Hoogerhuis
2002-10-01 11:06 ` Dave Jones
2002-10-01 15:31 ` Alexander Hoogerhuis
2002-10-01 17:01 ` Vojtech Pavlik
-- strict thread matches above, loose matches on Subject: below --
2002-10-01 1:06 David L. DeGeorge
2002-10-01 11:18 ` Dave Jones
2002-10-01 13:35 ` Maciej W. Rozycki
2002-10-01 15:15 ` Dave Jones
2002-10-01 16:03 ` Maciej W. Rozycki
2002-10-01 16:31 ` Dave Jones
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