From: Pratyush Yadav <pratyush@kernel.org>
To: Luke Wang <ziniu.wang_1@nxp.com>
Cc: "pratyush@kernel.org" <pratyush@kernel.org>,
"tudor.ambarus@linaro.org" <tudor.ambarus@linaro.org>,
"mwalle@kernel.org" <mwalle@kernel.org>,
"miquel.raynal@bootlin.com" <miquel.raynal@bootlin.com>,
"richard@nod.at" <richard@nod.at>,
"vigneshr@ti.com" <vigneshr@ti.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Bough Chen <haibo.chen@nxp.com>, Han Xu <han.xu@nxp.com>
Subject: Re: [PATCH v3 2/2] mtd: spi-nor: core: avoid odd length/address writes in 8D-8D-8D mode
Date: Wed, 13 Aug 2025 14:46:08 +0200 [thread overview]
Message-ID: <mafs0jz37wfsf.fsf@kernel.org> (raw)
In-Reply-To: <PAXPR04MB85749F748DD87CE41452AEBBED2AA@PAXPR04MB8574.eurprd04.prod.outlook.com>
Hi Luke,
On Wed, Aug 13 2025, Luke Wang wrote:
> Gentle ping on this, are there any comments or issues?
I plan to review it this in the next couple weeks (hopefully this one).
>>
>> On Octal DTR capable flashes like Micron Xcella the writes cannot start
>> or end at an odd address in Octal DTR mode. Extra 0xff bytes need to be
>> appended or prepended to make sure the start address and end address are
>> even. 0xff is used because on NOR flashes a program operation can only
>> flip bits from 1 to 0, not the other way round. 0 to 1 flip needs to
>> happen via erases.
>>
>> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
>> Reviewed-by: Michael Walle <michael@walle.cc>
>> Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
[...]
--
Regards,
Pratyush Yadav
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <pratyush@kernel.org>
To: Luke Wang <ziniu.wang_1@nxp.com>
Cc: "pratyush@kernel.org" <pratyush@kernel.org>,
"tudor.ambarus@linaro.org" <tudor.ambarus@linaro.org>,
"mwalle@kernel.org" <mwalle@kernel.org>,
"miquel.raynal@bootlin.com" <miquel.raynal@bootlin.com>,
"richard@nod.at" <richard@nod.at>,
"vigneshr@ti.com" <vigneshr@ti.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Bough Chen <haibo.chen@nxp.com>, Han Xu <han.xu@nxp.com>
Subject: Re: [PATCH v3 2/2] mtd: spi-nor: core: avoid odd length/address writes in 8D-8D-8D mode
Date: Wed, 13 Aug 2025 14:46:08 +0200 [thread overview]
Message-ID: <mafs0jz37wfsf.fsf@kernel.org> (raw)
In-Reply-To: <PAXPR04MB85749F748DD87CE41452AEBBED2AA@PAXPR04MB8574.eurprd04.prod.outlook.com>
Hi Luke,
On Wed, Aug 13 2025, Luke Wang wrote:
> Gentle ping on this, are there any comments or issues?
I plan to review it this in the next couple weeks (hopefully this one).
>>
>> On Octal DTR capable flashes like Micron Xcella the writes cannot start
>> or end at an odd address in Octal DTR mode. Extra 0xff bytes need to be
>> appended or prepended to make sure the start address and end address are
>> even. 0xff is used because on NOR flashes a program operation can only
>> flip bits from 1 to 0, not the other way round. 0 to 1 flip needs to
>> happen via erases.
>>
>> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
>> Reviewed-by: Michael Walle <michael@walle.cc>
>> Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
[...]
--
Regards,
Pratyush Yadav
next prev parent reply other threads:[~2025-08-13 13:20 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-08 9:16 [PATCH v3 1/2] mtd: spi-nor: core: avoid odd length/address reads on 8D-8D-8D mode ziniu.wang_1
2025-07-08 9:16 ` ziniu.wang_1
2025-07-08 9:16 ` [PATCH v3 2/2] mtd: spi-nor: core: avoid odd length/address writes in " ziniu.wang_1
2025-07-08 9:16 ` ziniu.wang_1
2025-08-13 2:49 ` Luke Wang
2025-08-13 2:49 ` Luke Wang
2025-08-13 12:46 ` Pratyush Yadav [this message]
2025-08-13 12:46 ` Pratyush Yadav
2025-09-01 14:19 ` [PATCH v3 1/2] mtd: spi-nor: core: avoid odd length/address reads on " Pratyush Yadav
2025-09-01 14:19 ` Pratyush Yadav
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