From: Jes Sorensen <jes@linuxcare.com>
To: linux-ia64@vger.kernel.org
Subject: Re: [Linux-ia64] CONFIG_IA64_L1_CACHE_SHIFT
Date: Thu, 01 Mar 2001 23:18:48 +0000 [thread overview]
Message-ID: <marc-linux-ia64-105590693005238@msgid-missing> (raw)
In-Reply-To: <marc-linux-ia64-105590693005236@msgid-missing>
>>>>> "David" = David Mosberger <davidm@hpl.hp.com> writes:
>>>>> On 01 Mar 2001 20:29:28 +0100, Jes Sorensen <jes@linuxcare.com> said:
Jes> in the config file? We already have SMP_CACHE_BYTES and L1_CACHE
Jes> bytes for all architectures, it doesn't make a whole lot of sense
Jes> to me ot invent yet another alignment rule.
David> $ fgrep CONFIG_IA64_L1 include/asm-ia64/cache.h #define
David> L1_CACHE_SHIFT CONFIG_IA64_L1_CACHE_SHIFT
Hmmm ok
It just seemed weird to have it in the config.in file. Btw. shouldn't
the acpi code use SMP_CACHE_BYTES for alignment? It doesn't buy you a
whole lot to align on L1 cache boundaries if you're trying to be SMP
aware - or is it rather a DMA vs CPU alignment issue?
Jes
next prev parent reply other threads:[~2001-03-01 23:18 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-03-01 19:29 [Linux-ia64] CONFIG_IA64_L1_CACHE_SHIFT Jes Sorensen
2001-03-01 22:35 ` David Mosberger
2001-03-01 23:18 ` Jes Sorensen [this message]
2001-03-02 1:00 ` Mallick, Asit K
2001-03-02 15:51 ` David Mosberger
2001-03-02 23:30 ` Grover, Andrew
2001-03-05 19:37 ` David Mosberger
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