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From: Andreas Schwab <schwab@suse.de>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	 Albert Ou <aou@eecs.berkeley.edu>,
	 Atish Patra <atishp@rivosinc.com>,
	 linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: head: use 0 as the default text_offset
Date: Mon, 28 Nov 2022 17:03:46 +0100	[thread overview]
Message-ID: <mvm35a383rx.fsf@suse.de> (raw)
In-Reply-To: <20221128152442.3403-1-jszhang@kernel.org> (Jisheng Zhang's message of "Mon, 28 Nov 2022 23:24:42 +0800")

On Nov 28 2022, Jisheng Zhang wrote:

> Commit 0f327f2aaad6 ("RISC-V: Add an Image header that boot loader can
> parse.") adds an image header which "is based on ARM64 boot image
> header and provides an opportunity to combine both ARM64 & RISC-V
> image headers in future.". At that time, arm64's default text_offset
> is 0x80000, this is to give "512 KB of guaranteed BSS space to put
> the swapper page tables" as commit cfa7ede20f13 ("arm64: set TEXT_OFFSET
> to 0x0 in preparation for removing it entirely") pointed out, but
> riscv doesn't need the space, so use 0 as the default text_offset.

Doesn't that clash with the memory reserved for openSBI?

-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

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WARNING: multiple messages have this Message-ID (diff)
From: Andreas Schwab <schwab@suse.de>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atishp@rivosinc.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: head: use 0 as the default text_offset
Date: Mon, 28 Nov 2022 17:03:46 +0100	[thread overview]
Message-ID: <mvm35a383rx.fsf@suse.de> (raw)
In-Reply-To: <20221128152442.3403-1-jszhang@kernel.org> (Jisheng Zhang's message of "Mon, 28 Nov 2022 23:24:42 +0800")

On Nov 28 2022, Jisheng Zhang wrote:

> Commit 0f327f2aaad6 ("RISC-V: Add an Image header that boot loader can
> parse.") adds an image header which "is based on ARM64 boot image
> header and provides an opportunity to combine both ARM64 & RISC-V
> image headers in future.". At that time, arm64's default text_offset
> is 0x80000, this is to give "512 KB of guaranteed BSS space to put
> the swapper page tables" as commit cfa7ede20f13 ("arm64: set TEXT_OFFSET
> to 0x0 in preparation for removing it entirely") pointed out, but
> riscv doesn't need the space, so use 0 as the default text_offset.

Doesn't that clash with the memory reserved for openSBI?

-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

  reply	other threads:[~2022-11-28 16:04 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-28 15:24 [PATCH] riscv: head: use 0 as the default text_offset Jisheng Zhang
2022-11-28 15:24 ` Jisheng Zhang
2022-11-28 16:03 ` Andreas Schwab [this message]
2022-11-28 16:03   ` Andreas Schwab
2022-11-28 20:11 ` Atish Kumar Patra
2022-11-28 20:11   ` Atish Kumar Patra
2022-11-29  5:04   ` Samuel Holland
2022-11-29  5:04     ` Samuel Holland
2022-11-29  5:33     ` Alexandre Ghiti
2022-11-29  5:33       ` Alexandre Ghiti
2022-11-29  6:19     ` Palmer Dabbelt
2022-11-29  6:19       ` Palmer Dabbelt
2022-11-29  6:55       ` Samuel Holland
2022-11-29  6:55         ` Samuel Holland
2022-11-29  9:15         ` Atish Kumar Patra
2022-11-29  9:15           ` Atish Kumar Patra
2022-11-29 18:33         ` Palmer Dabbelt
2022-11-29 18:33           ` Palmer Dabbelt
2022-11-29  9:18       ` Anup Patel
2022-11-29  9:18         ` Anup Patel
2022-11-29 15:07         ` Jisheng Zhang
2022-11-29 15:07           ` Jisheng Zhang

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