Re: 5.2-rc1 boot on Unleashed

From: Andreas Schwab <schwab@suse.de>
To: Atish Patra <atish.patra@wdc.com>
Cc: "Björn Töpel" <bjorn.topel@gmail.com>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"Palmer Dabbelt" <palmer@sifive.com>,
	"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>
Subject: Re: 5.2-rc1 boot on Unleashed
Date: Wed, 22 May 2019 09:31:51 +0200	[thread overview]
Message-ID: <mvm5zq3hrmg.fsf@suse.de> (raw)
In-Reply-To: <636f53d9-1800-df14-896d-c95737203b2d@wdc.com> (Atish Patra's message of "Tue, 21 May 2019 11:14:00 -0700")

On Mai 21 2019, Atish Patra <atish.patra@wdc.com> wrote:

> On 5/21/19 2:40 AM, Andreas Schwab wrote:
>> On Mai 20 2019, Atish Patra <atish.patra@wdc.com> wrote:
>>
>>> 1. Thanks to Paul, uart & clock drivers are merged. However,
>>> 	a. upstream clock drivers require DT changes
>>
>> How does it look like?
>>
>> Andreas.
>>
>
>
> Here is prci dt entry in Paul's patch series.
>
> 		prci: clock-controller at 10000000 {
> 			compatible = "sifive,fu540-c000-prci";
> 			reg = <0x0 0x10000000 0x0 0x1000>;
> 			clocks = <&hfclk>, <&rtcclk>;
> 			#clock-cells = <1>;
> 		};

But how about the clocks?

Andreas.

-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
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