From: Andreas Schwab <schwab@linux-m68k.org>
To: Atish Patra <Atish.Patra@wdc.com>
Cc: "aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"anup@brainfault.org" <anup@brainfault.org>,
"palmer@sifive.com" <palmer@sifive.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"hch@infradead.org" <hch@infradead.org>,
"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"allison@lohutok.net" <allison@lohutok.net>
Subject: Re: [v2 PATCH] RISC-V: Optimize tlb flush path.
Date: Tue, 20 Aug 2019 10:51:07 +0200 [thread overview]
Message-ID: <mvma7c4kyo4.fsf@linux-m68k.org> (raw)
In-Reply-To: <b2510462b55ffd93dba0c1b7cc28f9eef3089b50.camel@wdc.com> (Atish Patra's message of "Tue, 20 Aug 2019 08:42:19 +0000")
On Aug 20 2019, Atish Patra <Atish.Patra@wdc.com> wrote:
> +
> + cpuid = get_cpu();
> + if (!cmask) {
> + riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask);
> + goto issue_sfence;
> + }
> +
> +
> + if (cpumask_test_cpu(cpuid, cmask) && cpumask_weight(cmask) ==
> 1) {
> + /* Save trap cost by issuing a local tlb flush here */
> + if ((start == 0 && size == -1) || (size > PAGE_SIZE))
> + local_flush_tlb_all();
> + else if (size == PAGE_SIZE)
> + local_flush_tlb_page(start);
> + goto done;
> + }
> +
> riscv_cpuid_to_hartid_mask(cmask, &hmask);
> +
> +issue_sfence:
> sbi_remote_sfence_vma(hmask.bits, start, size);
> +done:
> + put_cpu();
> }
>
> This is much simpler than what I had done in v2. I will address the if
> condition around size as well.
I still think that this function should be moved out of the header.
Andreas.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
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WARNING: multiple messages have this Message-ID (diff)
From: Andreas Schwab <schwab@linux-m68k.org>
To: Atish Patra <Atish.Patra@wdc.com>
Cc: "linux-riscv\@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"paul.walmsley\@sifive.com" <paul.walmsley@sifive.com>,
"aou\@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"allison\@lohutok.net" <allison@lohutok.net>,
"anup\@brainfault.org" <anup@brainfault.org>,
"linux-kernel\@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"hch\@infradead.org" <hch@infradead.org>,
"palmer\@sifive.com" <palmer@sifive.com>
Subject: Re: [v2 PATCH] RISC-V: Optimize tlb flush path.
Date: Tue, 20 Aug 2019 10:51:07 +0200 [thread overview]
Message-ID: <mvma7c4kyo4.fsf@linux-m68k.org> (raw)
In-Reply-To: <b2510462b55ffd93dba0c1b7cc28f9eef3089b50.camel@wdc.com> (Atish Patra's message of "Tue, 20 Aug 2019 08:42:19 +0000")
On Aug 20 2019, Atish Patra <Atish.Patra@wdc.com> wrote:
> +
> + cpuid = get_cpu();
> + if (!cmask) {
> + riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask);
> + goto issue_sfence;
> + }
> +
> +
> + if (cpumask_test_cpu(cpuid, cmask) && cpumask_weight(cmask) ==
> 1) {
> + /* Save trap cost by issuing a local tlb flush here */
> + if ((start == 0 && size == -1) || (size > PAGE_SIZE))
> + local_flush_tlb_all();
> + else if (size == PAGE_SIZE)
> + local_flush_tlb_page(start);
> + goto done;
> + }
> +
> riscv_cpuid_to_hartid_mask(cmask, &hmask);
> +
> +issue_sfence:
> sbi_remote_sfence_vma(hmask.bits, start, size);
> +done:
> + put_cpu();
> }
>
> This is much simpler than what I had done in v2. I will address the if
> condition around size as well.
I still think that this function should be moved out of the header.
Andreas.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
next prev parent reply other threads:[~2019-08-20 8:53 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-20 0:47 [v2 PATCH] RISC-V: Optimize tlb flush path Atish Patra
2019-08-20 0:47 ` Atish Patra
2019-08-20 3:06 ` hch
2019-08-20 3:06 ` hch
2019-08-20 7:14 ` Andreas Schwab
2019-08-20 7:14 ` Andreas Schwab
2019-08-20 7:16 ` hch
2019-08-20 7:16 ` hch
2019-08-20 7:46 ` Andreas Schwab
2019-08-20 7:46 ` Andreas Schwab
2019-08-20 8:42 ` Atish Patra
2019-08-20 8:42 ` Atish Patra
2019-08-20 8:51 ` Andreas Schwab [this message]
2019-08-20 8:51 ` Andreas Schwab
2019-08-20 9:22 ` hch
2019-08-20 9:22 ` hch
2019-08-20 20:28 ` Atish Patra
2019-08-20 20:28 ` Atish Patra
2019-08-20 22:18 ` hch
2019-08-20 22:18 ` hch
2019-08-20 22:24 ` Atish Patra
2019-08-20 22:24 ` Atish Patra
2019-08-21 1:29 ` Alan Kao
2019-08-21 1:29 ` Alan Kao
2019-08-21 1:40 ` hch
2019-08-21 1:40 ` hch
2019-08-21 3:52 ` Anup Patel
2019-08-21 3:52 ` Anup Patel
2019-08-21 7:18 ` hch
2019-08-21 7:18 ` hch
2019-08-20 8:51 ` Anup Patel
2019-08-20 8:51 ` Anup Patel
2019-08-20 20:29 ` Atish Patra
2019-08-20 20:29 ` Atish Patra
2019-08-21 14:41 ` hch
2019-08-21 14:41 ` hch
2019-08-21 14:45 ` hch
2019-08-21 14:45 ` hch
2019-08-21 17:36 ` Atish Patra
2019-08-21 17:36 ` Atish Patra
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