[PATCH] errata/sifive: remove unreliable warn_miss_errata

[PATCH] errata/sifive: remove unreliable warn_miss_errata

[Andreas Schwab]

When both the SiFive and MIPS errata are enabled then
sifive_errata_patch_func emits a wrong and misleading warning claiming
that the SiFive errata haven't been applied.  This happens because
sifive_errata_patch_func is being called twice, once for the kernel image
and once for the vdso image.  The vdso image has alternative entries
for the MIPS errata, but none for the SiFive errata.

Signed-off-by: Andreas Schwab <schwab@suse.de>
---
 arch/riscv/errata/sifive/errata.c | 18 ------------------
 1 file changed, 18 deletions(-)

diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c
index 38aac2c47845..d0c61f86cba3 100644
--- a/arch/riscv/errata/sifive/errata.c
+++ b/arch/riscv/errata/sifive/errata.c
@@ -75,26 +75,12 @@ static u32 __init_or_module sifive_errata_probe(unsigned long archid,
 	return cpu_req_errata;
 }
 
-static void __init_or_module warn_miss_errata(u32 miss_errata)
-{
-	int i;
-
-	pr_warn("----------------------------------------------------------------\n");
-	pr_warn("WARNING: Missing the following errata may cause potential issues\n");
-	for (i = 0; i < ERRATA_SIFIVE_NUMBER; i++)
-		if (miss_errata & 0x1 << i)
-			pr_warn("\tSiFive Errata[%d]:%s\n", i, errata_list[i].name);
-	pr_warn("Please enable the corresponding Kconfig to apply them\n");
-	pr_warn("----------------------------------------------------------------\n");
-}
-
 void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
 			      unsigned long archid, unsigned long impid,
 			      unsigned int stage)
 {
 	struct alt_entry *alt;
 	u32 cpu_req_errata;
-	u32 cpu_apply_errata = 0;
 	u32 tmp;
 
 	BUILD_BUG_ON(ERRATA_SIFIVE_NUMBER >= RISCV_VENDOR_EXT_ALTERNATIVES_BASE);
@@ -118,10 +104,6 @@ void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
 			patch_text_nosync(ALT_OLD_PTR(alt), ALT_ALT_PTR(alt),
 					  alt->alt_len);
 			mutex_unlock(&text_mutex);
-			cpu_apply_errata |= tmp;
 		}
 	}
-	if (stage != RISCV_ALTERNATIVES_MODULE &&
-	    cpu_apply_errata != cpu_req_errata)
-		warn_miss_errata(cpu_req_errata - cpu_apply_errata);
 }
-- 
2.52.0


-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
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Re: [PATCH] errata/sifive: remove unreliable warn_miss_errata

[patchwork-bot+linux-riscv]

Hello:

This patch was applied to riscv/linux.git (for-next)
by Paul Walmsley <pjw@kernel.org>:

On Mon, 15 Dec 2025 12:40:31 +0100 you wrote:
> When both the SiFive and MIPS errata are enabled then
> sifive_errata_patch_func emits a wrong and misleading warning claiming
> that the SiFive errata haven't been applied.  This happens because
> sifive_errata_patch_func is being called twice, once for the kernel image
> and once for the vdso image.  The vdso image has alternative entries
> for the MIPS errata, but none for the SiFive errata.
> 
> [...]

Here is the summary with links:
  - errata/sifive: remove unreliable warn_miss_errata
    https://git.kernel.org/riscv/c/45862b586936

You are awesome, thank you!
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