* Re: peth0 received packet on own address
From: Nivedita Singhvi @ 2006-04-29 23:41 UTC (permalink / raw)
To: Nivedita Singhvi; +Cc: Ian Pratt, xen-devel, Kirk Allan
In-Reply-To: <4453A9BE.5000702@us.ibm.com>
Nivedita Singhvi wrote:
> Ian Pratt wrote:
>
>>> I've been looking into an issue were in the message file I see: Apr
>>> 28 11:43:10 kdell kernel: peth0: received packet with own address as
>>> source address
>>>
>>> Trying to match the time stamp in the message file to a packet trace
>>> captured by ethereal, I found that the offending packets are of the type
>>> ICMPv6 Multicast Listener Report Message v2, ICMPv6 Neighbor
>>> Solicitation, or ICMPv6 Router Solicitation packets. It looks like
[snip]
> Not compiling in support for MLDv2, etc in the kernel
I should have also mentioned, although this is somewhat
tangential to main issue - that if you are not using
IPv6, and the default for your distro happens to be on,
you might want to turn it off per interface by configuring
it in the network interface configuration file..
This is distro-specific, but for example, in FC* you'd
place a NETWORKING_IPV6=no in ifcfg-ethN, for instance.
thanks,
Nivedita
^ permalink raw reply
* Re: Re : module allocation
From: Ralf Baechle @ 2006-04-29 20:39 UTC (permalink / raw)
To: moreau francis; +Cc: linux-mips
In-Reply-To: <20060429094101.90843.qmail@web25806.mail.ukl.yahoo.com>
On Sat, Apr 29, 2006 at 11:41:01AM +0200, moreau francis wrote:
> maybe that would make sense to do some benchmarks ?
It would be interesting to actually have some numbers, yes. I expect the
impact to be significantly less than of the PIC code used for userspace.
Ralf
^ permalink raw reply
* [PATCH 13/13] cell: set SPU interrupt affinity in spu_priv1 code
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
From: Geoff Levand <geoffrey.levand@am.sony.com>
This changes the hypervisor abstraction of setting cpu affinity to a
higher level to avoid platform dependent interrupt controller
routines. I replaced spu_priv1_ops:spu_int_route_set() with a
new routine spu_priv1_ops:spu_cpu_affinity_set().
As a by-product, this change eliminated what looked like an
existing bug in the set affinity code where spu_int_route_set()
mistakenly called int_stat_get().
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_base.c 2006-04-29 22:54:59.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_base.c 2006-04-29 22:57:08.000000000 +0200
@@ -522,14 +522,6 @@
return ret;
}
-void spu_irq_setaffinity(struct spu *spu, int cpu)
-{
- u64 target = iic_get_target_id(cpu);
- u64 route = target << 48 | target << 32 | target << 16;
- spu_int_route_set(spu, route);
-}
-EXPORT_SYMBOL_GPL(spu_irq_setaffinity);
-
static void __iomem * __init map_spe_prop(struct device_node *n,
const char *name)
{
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_priv1_mmio.c 2006-04-29 22:54:59.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c 2006-04-29 22:56:37.000000000 +0200
@@ -24,6 +24,8 @@
#include <asm/spu.h>
#include <asm/spu_priv1.h>
+#include "interrupt.h"
+
static void int_mask_and(struct spu *spu, int class, u64 mask)
{
u64 old_mask;
@@ -60,8 +62,10 @@
return in_be64(&spu->priv1->int_stat_RW[class]);
}
-static void int_route_set(struct spu *spu, u64 route)
+static void cpu_affinity_set(struct spu *spu, int cpu)
{
+ u64 target = iic_get_target_id(cpu);
+ u64 route = target << 48 | target << 32 | target << 16;
out_be64(&spu->priv1->int_route_RW, route);
}
@@ -138,7 +142,7 @@
.int_mask_get = int_mask_get,
.int_stat_clear = int_stat_clear,
.int_stat_get = int_stat_get,
- .int_route_set = int_route_set,
+ .cpu_affinity_set = cpu_affinity_set,
.mfc_dar_get = mfc_dar_get,
.mfc_dsisr_get = mfc_dsisr_get,
.mfc_dsisr_set = mfc_dsisr_set,
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/sched.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/sched.c 2006-04-29 22:53:50.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/sched.c 2006-04-29 22:56:37.000000000 +0200
@@ -43,6 +43,7 @@
#include <asm/mmu_context.h>
#include <asm/spu.h>
#include <asm/spu_csa.h>
+#include <asm/spu_priv1.h>
#include "spufs.h"
#define SPU_MIN_TIMESLICE (100 * HZ / 1000)
@@ -363,7 +364,7 @@
* We're likely to wait for interrupts on the same
* CPU that we are now on, so send them here.
*/
- spu_irq_setaffinity(spu, raw_smp_processor_id());
+ spu_cpu_affinity_set(spu, raw_smp_processor_id());
put_active_spu(spu);
return 0;
}
Index: linus-2.6/include/asm-powerpc/spu_priv1.h
===================================================================
--- linus-2.6.orig/include/asm-powerpc/spu_priv1.h 2006-04-29 22:54:59.000000000 +0200
+++ linus-2.6/include/asm-powerpc/spu_priv1.h 2006-04-29 22:56:37.000000000 +0200
@@ -33,7 +33,7 @@
u64 (*int_mask_get) (struct spu *spu, int class);
void (*int_stat_clear) (struct spu *spu, int class, u64 stat);
u64 (*int_stat_get) (struct spu *spu, int class);
- void (*int_route_set) (struct spu *spu, u64 route);
+ void (*cpu_affinity_set) (struct spu *spu, int cpu);
u64 (*mfc_dar_get) (struct spu *spu);
u64 (*mfc_dsisr_get) (struct spu *spu);
void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
@@ -89,9 +89,9 @@
}
static inline void
-spu_int_route_set (struct spu *spu, u64 route)
+spu_cpu_affinity_set (struct spu *spu, int cpu)
{
- spu_priv1_ops->int_stat_get(spu, route);
+ spu_priv1_ops->cpu_affinity_set(spu, cpu);
}
static inline u64
--
^ permalink raw reply
* [PATCH 12/13] cell: abstract priviledge-1 SPU registers for hypervisors
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
From: Geoff Levand <geoffrey.levand@am.sony.com>
To support multi-platform binaries the spu hypervisor accessor
routines must have runtime binding.
I removed the existing statically linked routines in spu.h
and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h
that operate indirectly through an ops struct spu_priv1_ops.
spu_priv1_mmio.c contains the instance of the accessor routines
for running on raw hardware.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/setup.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/setup.c 2006-04-29 23:12:15.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/setup.c 2006-04-29 23:13:06.000000000 +0200
@@ -46,6 +46,7 @@
#include <asm/cputable.h>
#include <asm/ppc-pci.h>
#include <asm/irq.h>
+#include <asm/spu_priv1.h>
#include "interrupt.h"
#include "iommu.h"
@@ -149,6 +150,9 @@
{
ppc_md.init_IRQ = iic_init_IRQ;
ppc_md.get_irq = iic_get_irq;
+#ifdef CONFIG_SPU_BASE
+ spu_priv1_ops = &spu_priv1_mmio_ops;
+#endif
#ifdef CONFIG_SMP
smp_init_cell();
Index: linus-2.6/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_base.c 2006-04-29 23:12:16.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_base.c 2006-04-29 23:13:06.000000000 +0200
@@ -34,10 +34,15 @@
#include <asm/prom.h>
#include <linux/mutex.h>
#include <asm/spu.h>
+#include <asm/spu_priv1.h>
#include <asm/mmu_context.h>
#include "interrupt.h"
+const struct spu_priv1_ops *spu_priv1_ops;
+
+EXPORT_SYMBOL_GPL(spu_priv1_ops);
+
static int __spu_trap_invalid_dma(struct spu *spu)
{
pr_debug("%s\n", __FUNCTION__);
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_priv1_mmio.c 2006-04-29 23:12:55.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c 2006-04-29 23:13:06.000000000 +0200
@@ -1,133 +1,155 @@
/*
- * access to SPU privileged registers
+ * spu hypervisor abstraction for direct hardware access.
+ *
+ * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
+ * Copyright 2006 Sony Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+
#include <linux/module.h>
#include <asm/io.h>
#include <asm/spu.h>
+#include <asm/spu_priv1.h>
-void spu_int_mask_and(struct spu *spu, int class, u64 mask)
+static void int_mask_and(struct spu *spu, int class, u64 mask)
{
u64 old_mask;
old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
}
-EXPORT_SYMBOL_GPL(spu_int_mask_and);
-void spu_int_mask_or(struct spu *spu, int class, u64 mask)
+static void int_mask_or(struct spu *spu, int class, u64 mask)
{
u64 old_mask;
old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
}
-EXPORT_SYMBOL_GPL(spu_int_mask_or);
-void spu_int_mask_set(struct spu *spu, int class, u64 mask)
+static void int_mask_set(struct spu *spu, int class, u64 mask)
{
out_be64(&spu->priv1->int_mask_RW[class], mask);
}
-EXPORT_SYMBOL_GPL(spu_int_mask_set);
-u64 spu_int_mask_get(struct spu *spu, int class)
+static u64 int_mask_get(struct spu *spu, int class)
{
return in_be64(&spu->priv1->int_mask_RW[class]);
}
-EXPORT_SYMBOL_GPL(spu_int_mask_get);
-void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
+static void int_stat_clear(struct spu *spu, int class, u64 stat)
{
out_be64(&spu->priv1->int_stat_RW[class], stat);
}
-EXPORT_SYMBOL_GPL(spu_int_stat_clear);
-u64 spu_int_stat_get(struct spu *spu, int class)
+static u64 int_stat_get(struct spu *spu, int class)
{
return in_be64(&spu->priv1->int_stat_RW[class]);
}
-EXPORT_SYMBOL_GPL(spu_int_stat_get);
-void spu_int_route_set(struct spu *spu, u64 route)
+static void int_route_set(struct spu *spu, u64 route)
{
out_be64(&spu->priv1->int_route_RW, route);
}
-EXPORT_SYMBOL_GPL(spu_int_route_set);
-u64 spu_mfc_dar_get(struct spu *spu)
+static u64 mfc_dar_get(struct spu *spu)
{
return in_be64(&spu->priv1->mfc_dar_RW);
}
-EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
-u64 spu_mfc_dsisr_get(struct spu *spu)
+static u64 mfc_dsisr_get(struct spu *spu)
{
return in_be64(&spu->priv1->mfc_dsisr_RW);
}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
-void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
+static void mfc_dsisr_set(struct spu *spu, u64 dsisr)
{
out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
-void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
+static void mfc_sdr_set(struct spu *spu, u64 sdr)
{
out_be64(&spu->priv1->mfc_sdr_RW, sdr);
}
-EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
-void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
+static void mfc_sr1_set(struct spu *spu, u64 sr1)
{
out_be64(&spu->priv1->mfc_sr1_RW, sr1);
}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
-u64 spu_mfc_sr1_get(struct spu *spu)
+static u64 mfc_sr1_get(struct spu *spu)
{
return in_be64(&spu->priv1->mfc_sr1_RW);
}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
-void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
+static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
{
out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
-u64 spu_mfc_tclass_id_get(struct spu *spu)
+static u64 mfc_tclass_id_get(struct spu *spu)
{
return in_be64(&spu->priv1->mfc_tclass_id_RW);
}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
-void spu_tlb_invalidate(struct spu *spu)
+static void tlb_invalidate(struct spu *spu)
{
out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
}
-EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
-void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
+static void resource_allocation_groupID_set(struct spu *spu, u64 id)
{
out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
-u64 spu_resource_allocation_groupID_get(struct spu *spu)
+static u64 resource_allocation_groupID_get(struct spu *spu)
{
return in_be64(&spu->priv1->resource_allocation_groupID_RW);
}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
-void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
+static void resource_allocation_enable_set(struct spu *spu, u64 enable)
{
out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
-u64 spu_resource_allocation_enable_get(struct spu *spu)
+static u64 resource_allocation_enable_get(struct spu *spu)
{
return in_be64(&spu->priv1->resource_allocation_enable_RW);
}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
+
+const struct spu_priv1_ops spu_priv1_mmio_ops =
+{
+ .int_mask_and = int_mask_and,
+ .int_mask_or = int_mask_or,
+ .int_mask_set = int_mask_set,
+ .int_mask_get = int_mask_get,
+ .int_stat_clear = int_stat_clear,
+ .int_stat_get = int_stat_get,
+ .int_route_set = int_route_set,
+ .mfc_dar_get = mfc_dar_get,
+ .mfc_dsisr_get = mfc_dsisr_get,
+ .mfc_dsisr_set = mfc_dsisr_set,
+ .mfc_sdr_set = mfc_sdr_set,
+ .mfc_sr1_set = mfc_sr1_set,
+ .mfc_sr1_get = mfc_sr1_get,
+ .mfc_tclass_id_set = mfc_tclass_id_set,
+ .mfc_tclass_id_get = mfc_tclass_id_get,
+ .tlb_invalidate = tlb_invalidate,
+ .resource_allocation_groupID_set = resource_allocation_groupID_set,
+ .resource_allocation_groupID_get = resource_allocation_groupID_get,
+ .resource_allocation_enable_set = resource_allocation_enable_set,
+ .resource_allocation_enable_get = resource_allocation_enable_get,
+};
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/hw_ops.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/hw_ops.c 2006-04-29 23:12:15.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/hw_ops.c 2006-04-29 23:13:06.000000000 +0200
@@ -32,6 +32,7 @@
#include <asm/io.h>
#include <asm/spu.h>
+#include <asm/spu_priv1.h>
#include <asm/spu_csa.h>
#include <asm/mmu_context.h>
#include "spufs.h"
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/switch.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/switch.c 2006-04-29 23:12:15.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/switch.c 2006-04-29 23:13:06.000000000 +0200
@@ -46,6 +46,7 @@
#include <asm/io.h>
#include <asm/spu.h>
+#include <asm/spu_priv1.h>
#include <asm/spu_csa.h>
#include <asm/mmu_context.h>
Index: linus-2.6/include/asm-powerpc/spu.h
===================================================================
--- linus-2.6.orig/include/asm-powerpc/spu.h 2006-04-29 23:12:16.000000000 +0200
+++ linus-2.6/include/asm-powerpc/spu.h 2006-04-29 23:13:06.000000000 +0200
@@ -181,29 +181,6 @@
#endif /* MODULE */
-/* access to priv1 registers */
-void spu_int_mask_and(struct spu *spu, int class, u64 mask);
-void spu_int_mask_or(struct spu *spu, int class, u64 mask);
-void spu_int_mask_set(struct spu *spu, int class, u64 mask);
-u64 spu_int_mask_get(struct spu *spu, int class);
-void spu_int_stat_clear(struct spu *spu, int class, u64 stat);
-u64 spu_int_stat_get(struct spu *spu, int class);
-void spu_int_route_set(struct spu *spu, u64 route);
-u64 spu_mfc_dar_get(struct spu *spu);
-u64 spu_mfc_dsisr_get(struct spu *spu);
-void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr);
-void spu_mfc_sdr_set(struct spu *spu, u64 sdr);
-void spu_mfc_sr1_set(struct spu *spu, u64 sr1);
-u64 spu_mfc_sr1_get(struct spu *spu);
-void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id);
-u64 spu_mfc_tclass_id_get(struct spu *spu);
-void spu_tlb_invalidate(struct spu *spu);
-void spu_resource_allocation_groupID_set(struct spu *spu, u64 id);
-u64 spu_resource_allocation_groupID_get(struct spu *spu);
-void spu_resource_allocation_enable_set(struct spu *spu, u64 enable);
-u64 spu_resource_allocation_enable_get(struct spu *spu);
-
-
/*
* This defines the Local Store, Problem Area and Privlege Area of an SPU.
*/
Index: linus-2.6/include/asm-powerpc/spu_priv1.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linus-2.6/include/asm-powerpc/spu_priv1.h 2006-04-29 23:13:06.000000000 +0200
@@ -0,0 +1,189 @@
+/*
+ * Defines an spu hypervisor abstraction layer.
+ *
+ * Copyright 2006 Sony Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#if !defined(_SPU_PRIV1_H)
+#define _SPU_PRIV1_H
+#if defined(__KERNEL__)
+
+struct spu;
+
+/* access to priv1 registers */
+
+struct spu_priv1_ops
+{
+ void (*int_mask_and) (struct spu *spu, int class, u64 mask);
+ void (*int_mask_or) (struct spu *spu, int class, u64 mask);
+ void (*int_mask_set) (struct spu *spu, int class, u64 mask);
+ u64 (*int_mask_get) (struct spu *spu, int class);
+ void (*int_stat_clear) (struct spu *spu, int class, u64 stat);
+ u64 (*int_stat_get) (struct spu *spu, int class);
+ void (*int_route_set) (struct spu *spu, u64 route);
+ u64 (*mfc_dar_get) (struct spu *spu);
+ u64 (*mfc_dsisr_get) (struct spu *spu);
+ void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
+ void (*mfc_sdr_set) (struct spu *spu, u64 sdr);
+ void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
+ u64 (*mfc_sr1_get) (struct spu *spu);
+ void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id);
+ u64 (*mfc_tclass_id_get) (struct spu *spu);
+ void (*smm_pgsz_set) (struct spu *spu, u64 pgsz);
+ void (*tlb_invalidate) (struct spu *spu);
+ void (*resource_allocation_groupID_set) (struct spu *spu, u64 id);
+ u64 (*resource_allocation_groupID_get) (struct spu *spu);
+ void (*resource_allocation_enable_set) (struct spu *spu, u64 enable);
+ u64 (*resource_allocation_enable_get) (struct spu *spu);
+};
+
+extern const struct spu_priv1_ops* spu_priv1_ops;
+
+static inline void
+spu_int_mask_and (struct spu *spu, int class, u64 mask)
+{
+ spu_priv1_ops->int_mask_and(spu, class, mask);
+}
+
+static inline void
+spu_int_mask_or (struct spu *spu, int class, u64 mask)
+{
+ spu_priv1_ops->int_mask_or(spu, class, mask);
+}
+
+static inline void
+spu_int_mask_set (struct spu *spu, int class, u64 mask)
+{
+ spu_priv1_ops->int_mask_set(spu, class, mask);
+}
+
+static inline u64
+spu_int_mask_get (struct spu *spu, int class)
+{
+ return spu_priv1_ops->int_mask_get(spu, class);
+}
+
+static inline void
+spu_int_stat_clear (struct spu *spu, int class, u64 stat)
+{
+ spu_priv1_ops->int_stat_clear(spu, class, stat);
+}
+
+static inline u64
+spu_int_stat_get (struct spu *spu, int class)
+{
+ return spu_priv1_ops->int_stat_get (spu, class);
+}
+
+static inline void
+spu_int_route_set (struct spu *spu, u64 route)
+{
+ spu_priv1_ops->int_stat_get(spu, route);
+}
+
+static inline u64
+spu_mfc_dar_get (struct spu *spu)
+{
+ return spu_priv1_ops->mfc_dar_get(spu);
+}
+
+static inline u64
+spu_mfc_dsisr_get (struct spu *spu)
+{
+ return spu_priv1_ops->mfc_dsisr_get(spu);
+}
+
+static inline void
+spu_mfc_dsisr_set (struct spu *spu, u64 dsisr)
+{
+ spu_priv1_ops->mfc_dsisr_set(spu, dsisr);
+}
+
+static inline void
+spu_mfc_sdr_set (struct spu *spu, u64 sdr)
+{
+ spu_priv1_ops->mfc_sdr_set(spu, sdr);
+}
+
+static inline void
+spu_mfc_sr1_set (struct spu *spu, u64 sr1)
+{
+ spu_priv1_ops->mfc_sr1_set(spu, sr1);
+}
+
+static inline u64
+spu_mfc_sr1_get (struct spu *spu)
+{
+ return spu_priv1_ops->mfc_sr1_get(spu);
+}
+
+static inline void
+spu_mfc_tclass_id_set (struct spu *spu, u64 tclass_id)
+{
+ spu_priv1_ops->mfc_tclass_id_set(spu, tclass_id);
+}
+
+static inline u64
+spu_mfc_tclass_id_get (struct spu *spu)
+{
+ return spu_priv1_ops->mfc_tclass_id_get(spu);
+}
+
+static inline void
+spu_smm_pgsz_set (struct spu *spu, u64 pgsz)
+{
+ spu_priv1_ops->smm_pgsz_set(spu, pgsz);
+}
+
+static inline void
+spu_tlb_invalidate (struct spu *spu)
+{
+ spu_priv1_ops->tlb_invalidate(spu);
+}
+
+static inline void
+spu_resource_allocation_groupID_set (struct spu *spu, u64 id)
+{
+ spu_priv1_ops->resource_allocation_groupID_set(spu, id);
+}
+
+static inline u64
+spu_resource_allocation_groupID_get (struct spu *spu)
+{
+ return spu_priv1_ops->resource_allocation_groupID_get(spu);
+}
+
+static inline void
+spu_resource_allocation_enable_set (struct spu *spu, u64 enable)
+{
+ spu_priv1_ops->resource_allocation_enable_set(spu, enable);
+}
+
+static inline u64
+spu_resource_allocation_enable_get (struct spu *spu)
+{
+ return spu_priv1_ops->resource_allocation_enable_get(spu);
+}
+
+/* The declarations folowing are put here for convenience
+ * and only intended to be used by the platform setup code
+ * for initializing spu_priv1_ops.
+ */
+
+extern const struct spu_priv1_ops spu_priv1_mmio_ops;
+
+#endif /* __KERNEL__ */
+#endif
--
^ permalink raw reply
* [PATCH 11/13] cell: split out board specific files
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
From: Geoff Levand <geoffrey.levand@am.sony.com>
Split the Cell BE support into generic and platform
dependant parts.
Creates a new config variable CONFIG_PPC_IBM_CELL_BLADE.
The existing CONFIG_PPC_CELL is now used to denote the
generic Cell processor support. Also renames spu_priv1.c
to spu_priv1_mmio.c.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/Kconfig
===================================================================
--- linus-2.6.orig/arch/powerpc/Kconfig 2006-04-29 22:53:50.000000000 +0200
+++ linus-2.6/arch/powerpc/Kconfig 2006-04-29 22:54:42.000000000 +0200
@@ -391,11 +391,17 @@
For more informations, refer to <http://www.970eval.com>
config PPC_CELL
- bool " Cell Broadband Processor Architecture"
+ bool
+ default n
+
+config PPC_IBM_CELL_BLADE
+ bool " IBM Cell Blade"
depends on PPC_MULTIPLATFORM && PPC64
+ select PPC_CELL
select PPC_RTAS
select MMIO_NVRAM
select PPC_UDBG_16550
+ select SPUFS_PRIV1_MMIO
config XICS
depends on PPC_PSERIES
@@ -440,7 +446,7 @@
default y
config CELL_IIC
- depends on PPC_CELL
+ depends on PPC_IBM_CELL_BLADE
bool
default y
Index: linus-2.6/arch/powerpc/configs/cell_defconfig
===================================================================
--- linus-2.6.orig/arch/powerpc/configs/cell_defconfig 2006-04-29 22:53:50.000000000 +0200
+++ linus-2.6/arch/powerpc/configs/cell_defconfig 2006-04-29 22:54:42.000000000 +0200
@@ -116,6 +116,7 @@
# CONFIG_PPC_PMAC is not set
# CONFIG_PPC_MAPLE is not set
CONFIG_PPC_CELL=y
+CONFIG_PPC_IBM_CELL_BLADE=y
# CONFIG_U3_DART is not set
CONFIG_PPC_RTAS=y
# CONFIG_RTAS_ERROR_LOGGING is not set
@@ -132,6 +133,8 @@
# Cell Broadband Engine options
#
CONFIG_SPU_FS=m
+CONFIG_SPU_BASE=y
+CONFIG_SPUFS_PRIV1_MMIO=y
CONFIG_SPUFS_MMAP=y
#
Index: linus-2.6/arch/powerpc/platforms/cell/Kconfig
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/Kconfig 2006-04-29 22:53:51.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/Kconfig 2006-04-29 22:54:42.000000000 +0200
@@ -5,11 +5,20 @@
tristate "SPU file system"
default m
depends on PPC_CELL
+ select SPU_BASE
help
The SPU file system is used to access Synergistic Processing
Units on machines implementing the Broadband Processor
Architecture.
+config SPU_BASE
+ bool
+ default n
+
+config SPUFS_PRIV1_MMIO
+ bool
+ default n
+
config SPUFS_MMAP
bool
depends on SPU_FS && SPARSEMEM && !PPC_64K_PAGES
Index: linus-2.6/arch/powerpc/platforms/cell/Makefile
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/Makefile 2006-04-29 22:54:25.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/Makefile 2006-04-29 22:54:42.000000000 +0200
@@ -1,14 +1,13 @@
-obj-y += interrupt.o iommu.o setup.o spider-pic.o
-obj-y += pervasive.o
-
-obj-$(CONFIG_SMP) += smp.o
+obj-$(CONFIG_PPC_IBM_CELL_BLADE) += interrupt.o iommu.o setup.o \
+ spider-pic.o pervasive.o
+ifeq ($(CONFIG_SMP),y)
+obj-$(CONFIG_PPC_IBM_CELL_BLADE) += smp.o
+endif
# needed only when building loadable spufs.ko
-spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
-obj-y += $(spufs-modular-m)
-
-# always needed in kernel
-spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o
-obj-y += $(spufs-builtin-y) $(spufs-builtin-m)
+spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
-obj-$(CONFIG_SPU_FS) += spufs/
+obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
+ $(spufs-modular-m)
+obj-$(CONFIG_SPUFS_PRIV1_MMIO) += spu_priv1_mmio.o
+obj-$(CONFIG_SPU_FS) += spufs/
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_priv1.c 2006-04-29 22:53:50.000000000 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,133 +0,0 @@
-/*
- * access to SPU privileged registers
- */
-#include <linux/module.h>
-
-#include <asm/io.h>
-#include <asm/spu.h>
-
-void spu_int_mask_and(struct spu *spu, int class, u64 mask)
-{
- u64 old_mask;
-
- old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
- out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_and);
-
-void spu_int_mask_or(struct spu *spu, int class, u64 mask)
-{
- u64 old_mask;
-
- old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
- out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_or);
-
-void spu_int_mask_set(struct spu *spu, int class, u64 mask)
-{
- out_be64(&spu->priv1->int_mask_RW[class], mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_set);
-
-u64 spu_int_mask_get(struct spu *spu, int class)
-{
- return in_be64(&spu->priv1->int_mask_RW[class]);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_get);
-
-void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
-{
- out_be64(&spu->priv1->int_stat_RW[class], stat);
-}
-EXPORT_SYMBOL_GPL(spu_int_stat_clear);
-
-u64 spu_int_stat_get(struct spu *spu, int class)
-{
- return in_be64(&spu->priv1->int_stat_RW[class]);
-}
-EXPORT_SYMBOL_GPL(spu_int_stat_get);
-
-void spu_int_route_set(struct spu *spu, u64 route)
-{
- out_be64(&spu->priv1->int_route_RW, route);
-}
-EXPORT_SYMBOL_GPL(spu_int_route_set);
-
-u64 spu_mfc_dar_get(struct spu *spu)
-{
- return in_be64(&spu->priv1->mfc_dar_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
-
-u64 spu_mfc_dsisr_get(struct spu *spu)
-{
- return in_be64(&spu->priv1->mfc_dsisr_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
-
-void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
-{
- out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
-
-void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
-{
- out_be64(&spu->priv1->mfc_sdr_RW, sdr);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
-
-void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
-{
- out_be64(&spu->priv1->mfc_sr1_RW, sr1);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
-
-u64 spu_mfc_sr1_get(struct spu *spu)
-{
- return in_be64(&spu->priv1->mfc_sr1_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
-
-void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
-{
- out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
-
-u64 spu_mfc_tclass_id_get(struct spu *spu)
-{
- return in_be64(&spu->priv1->mfc_tclass_id_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
-
-void spu_tlb_invalidate(struct spu *spu)
-{
- out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
-}
-EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
-
-void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
-{
- out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
-
-u64 spu_resource_allocation_groupID_get(struct spu *spu)
-{
- return in_be64(&spu->priv1->resource_allocation_groupID_RW);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
-
-void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
-{
- out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
-
-u64 spu_resource_allocation_enable_get(struct spu *spu)
-{
- return in_be64(&spu->priv1->resource_allocation_enable_RW);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c 2006-04-29 22:54:42.000000000 +0200
@@ -0,0 +1,133 @@
+/*
+ * access to SPU privileged registers
+ */
+#include <linux/module.h>
+
+#include <asm/io.h>
+#include <asm/spu.h>
+
+void spu_int_mask_and(struct spu *spu, int class, u64 mask)
+{
+ u64 old_mask;
+
+ old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
+ out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_and);
+
+void spu_int_mask_or(struct spu *spu, int class, u64 mask)
+{
+ u64 old_mask;
+
+ old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
+ out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_or);
+
+void spu_int_mask_set(struct spu *spu, int class, u64 mask)
+{
+ out_be64(&spu->priv1->int_mask_RW[class], mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_set);
+
+u64 spu_int_mask_get(struct spu *spu, int class)
+{
+ return in_be64(&spu->priv1->int_mask_RW[class]);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_get);
+
+void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
+{
+ out_be64(&spu->priv1->int_stat_RW[class], stat);
+}
+EXPORT_SYMBOL_GPL(spu_int_stat_clear);
+
+u64 spu_int_stat_get(struct spu *spu, int class)
+{
+ return in_be64(&spu->priv1->int_stat_RW[class]);
+}
+EXPORT_SYMBOL_GPL(spu_int_stat_get);
+
+void spu_int_route_set(struct spu *spu, u64 route)
+{
+ out_be64(&spu->priv1->int_route_RW, route);
+}
+EXPORT_SYMBOL_GPL(spu_int_route_set);
+
+u64 spu_mfc_dar_get(struct spu *spu)
+{
+ return in_be64(&spu->priv1->mfc_dar_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
+
+u64 spu_mfc_dsisr_get(struct spu *spu)
+{
+ return in_be64(&spu->priv1->mfc_dsisr_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
+
+void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
+{
+ out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
+
+void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
+{
+ out_be64(&spu->priv1->mfc_sdr_RW, sdr);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
+
+void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
+{
+ out_be64(&spu->priv1->mfc_sr1_RW, sr1);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
+
+u64 spu_mfc_sr1_get(struct spu *spu)
+{
+ return in_be64(&spu->priv1->mfc_sr1_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
+
+void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
+{
+ out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
+
+u64 spu_mfc_tclass_id_get(struct spu *spu)
+{
+ return in_be64(&spu->priv1->mfc_tclass_id_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
+
+void spu_tlb_invalidate(struct spu *spu)
+{
+ out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
+}
+EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
+
+void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
+{
+ out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
+
+u64 spu_resource_allocation_groupID_get(struct spu *spu)
+{
+ return in_be64(&spu->priv1->resource_allocation_groupID_RW);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
+
+void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
+{
+ out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
+
+u64 spu_resource_allocation_enable_get(struct spu *spu)
+{
+ return in_be64(&spu->priv1->resource_allocation_enable_RW);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
Index: linus-2.6/drivers/net/Kconfig
===================================================================
--- linus-2.6.orig/drivers/net/Kconfig 2006-04-29 22:53:50.000000000 +0200
+++ linus-2.6/drivers/net/Kconfig 2006-04-29 22:54:42.000000000 +0200
@@ -2171,7 +2171,7 @@
config SPIDER_NET
tristate "Spider Gigabit Ethernet driver"
- depends on PCI && PPC_CELL
+ depends on PCI && PPC_IBM_CELL_BLADE
select FW_LOADER
help
This driver supports the Gigabit Ethernet chips present on the
--
^ permalink raw reply
* [PATCH 09/13] spufs: add a phys-id attribute to each SPU context
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
For performance analysis, it is often interesting to know
which physical SPE a thread is currently running on, and,
more importantly, if it is running at all.
This patch adds a simple attribute to each SPU directory
with that information.
The attribute is read-only and called 'phys-id'. It contains
an ascii string with the number of the physical SPU (e.g.
"0x5"), or alternatively the string "0xffffffff" (32 bit -1)
when it is not running at all at the time that the file
is read.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/file.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/file.c 2006-04-29 22:53:41.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/file.c 2006-04-29 22:53:44.000000000 +0200
@@ -1328,6 +1328,22 @@
DEFINE_SIMPLE_ATTRIBUTE(spufs_srr0_ops, spufs_srr0_get, spufs_srr0_set,
"%llx\n")
+static u64 spufs_id_get(void *data)
+{
+ struct spu_context *ctx = data;
+ u64 num;
+
+ spu_acquire(ctx);
+ if (ctx->state == SPU_STATE_RUNNABLE)
+ num = ctx->spu->number;
+ else
+ num = (unsigned int)-1;
+ spu_release(ctx);
+
+ return num;
+}
+DEFINE_SIMPLE_ATTRIBUTE(spufs_id_ops, spufs_id_get, 0, "0x%llx\n")
+
struct tree_descr spufs_dir_contents[] = {
{ "mem", &spufs_mem_fops, 0666, },
{ "regs", &spufs_regs_fops, 0666, },
@@ -1351,5 +1367,6 @@
{ "spu_tag_mask", &spufs_spu_tag_mask_ops, 0666, },
{ "event_mask", &spufs_event_mask_ops, 0666, },
{ "srr0", &spufs_srr0_ops, 0666, },
+ { "phys-id", &spufs_id_ops, 0666, },
{},
};
--
^ permalink raw reply
* [PATCH 08/13] spufs: set up correct SLB entries for 64k pages
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
spufs currently knows only 4k pages and 16M hugetlb
pages. Make it use the regular methods for deciding on
the SLB bits.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_base.c 2006-04-29 22:53:40.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_base.c 2006-04-29 22:53:43.000000000 +0200
@@ -71,7 +71,7 @@
{
struct spu_priv2 __iomem *priv2 = spu->priv2;
struct mm_struct *mm = spu->mm;
- u64 esid, vsid;
+ u64 esid, vsid, llp;
pr_debug("%s\n", __FUNCTION__);
@@ -91,9 +91,14 @@
}
esid = (ea & ESID_MASK) | SLB_ESID_V;
- vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) | SLB_VSID_USER;
+#ifdef CONFIG_HUGETLB_PAGE
if (in_hugepage_area(mm->context, ea))
- vsid |= SLB_VSID_L;
+ llp = mmu_psize_defs[mmu_huge_psize].sllp;
+ else
+#endif
+ llp = mmu_psize_defs[mmu_virtual_psize].sllp;
+ vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
+ SLB_VSID_USER | llp;
out_be64(&priv2->slb_index_W, spu->slb_replace);
out_be64(&priv2->slb_vsid_RW, vsid);
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/switch.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/switch.c 2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/switch.c 2006-04-29 22:53:43.000000000 +0200
@@ -718,13 +718,15 @@
static inline void get_kernel_slb(u64 ea, u64 slb[2])
{
- slb[0] = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
- slb[1] = (ea & ESID_MASK) | SLB_ESID_V;
+ u64 llp;
- /* Large pages are used for kernel text/data, but not vmalloc. */
- if (cpu_has_feature(CPU_FTR_16M_PAGE)
- && REGION_ID(ea) == KERNEL_REGION_ID)
- slb[0] |= SLB_VSID_L;
+ if (REGION_ID(ea) == KERNEL_REGION_ID)
+ llp = mmu_psize_defs[mmu_linear_psize].sllp;
+ else
+ llp = mmu_psize_defs[mmu_virtual_psize].sllp;
+ slb[0] = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
+ SLB_VSID_KERNEL | llp;
+ slb[1] = (ea & ESID_MASK) | SLB_ESID_V;
}
static inline void load_mfc_slb(struct spu *spu, u64 slb[2], int slbe)
--
^ permalink raw reply
* [PATCH 07/13] powerpc: export symbols for page size selection
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
We need access to some symbols in powerpc memory management
from spufs in order to create proper SLB entries.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/mm/hash_utils_64.c
===================================================================
--- linus-2.6.orig/arch/powerpc/mm/hash_utils_64.c 2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/mm/hash_utils_64.c 2006-04-29 22:53:43.000000000 +0200
@@ -85,16 +85,26 @@
#endif /* CONFIG_U3_DART */
static unsigned long _SDR1;
-struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
hpte_t *htab_address;
unsigned long htab_size_bytes;
unsigned long htab_hash_mask;
+
+struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
+EXPORT_SYMBOL_GPL(mmu_psize_defs);
+
int mmu_linear_psize = MMU_PAGE_4K;
+EXPORT_SYMBOL_GPL(mmu_linear_psize);
+
int mmu_virtual_psize = MMU_PAGE_4K;
+EXPORT_SYMBOL_GPL(mmu_virtual_psize);
+
#ifdef CONFIG_HUGETLB_PAGE
int mmu_huge_psize = MMU_PAGE_16M;
+EXPORT_SYMBOL_GPL(mmu_huge_psize);
+
unsigned int HPAGE_SHIFT;
+EXPORT_SYMBOL_GPL(HPAGE_SHIFT);
#endif
/* There are definitions of page sizes arrays to be used when none
--
^ permalink raw reply
* [PATCH 06/13] powerpc: fix 64k pages on non-hypervisor
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
The page size encoding passed to tlbie is incorrect for
new-style large pages. This fixes it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/mm/hash_native_64.c
===================================================================
--- linus-2.6.orig/arch/powerpc/mm/hash_native_64.c 2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/mm/hash_native_64.c 2006-04-29 22:53:42.000000000 +0200
@@ -52,7 +52,7 @@
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
- va |= (0x7f >> (8 - penc)) << 12;
+ va |= penc << 12;
asm volatile("tlbie %0,1" : : "r" (va) : "memory");
break;
}
@@ -74,7 +74,7 @@
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
- va |= (0x7f >> (8 - penc)) << 12;
+ va |= penc << 12;
asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
: : "r"(va) : "memory");
break;
--
^ permalink raw reply
* [PATCH 05/13] cell: enable CPU_FTR_CI_LARGE_PAGE
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
Reflect the fact that the Cell Broadband Engine supports 64k
pages by adding the bit to the CPU features.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/include/asm-powerpc/cputable.h
===================================================================
--- linus-2.6.orig/include/asm-powerpc/cputable.h 2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/include/asm-powerpc/cputable.h 2006-04-29 22:53:42.000000000 +0200
@@ -329,7 +329,7 @@
#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
- CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO)
+ CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
#define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
#endif
--
^ permalink raw reply
* [PATCH 04/13] cell: remove broken __setup_cpu_be function
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
From: Geoff Levand <geoffrey.levand@am.sony.com>
This patch removes the incorrect Cell processor setup routine
__setup_cpu_be. This routine improperly accesses the hypervisor
page size configuration at SPR HID6. The correct behavior is for
firmware, or if needed, platform setup code, to set the correct
page size.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/kernel/cpu_setup_power4.S
===================================================================
--- linus-2.6.orig/arch/powerpc/kernel/cpu_setup_power4.S 2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/kernel/cpu_setup_power4.S 2006-04-29 22:53:42.000000000 +0200
@@ -76,20 +76,6 @@
_GLOBAL(__setup_cpu_power4)
blr
-_GLOBAL(__setup_cpu_be)
- /* Set large page sizes LP=0: 16MB, LP=1: 64KB */
- addi r3, 0, 0
- ori r3, r3, HID6_LB
- sldi r3, r3, 32
- nor r3, r3, r3
- mfspr r4, SPRN_HID6
- and r4, r4, r3
- addi r3, 0, 0x02000
- sldi r3, r3, 32
- or r4, r4, r3
- mtspr SPRN_HID6, r4
- blr
-
_GLOBAL(__setup_cpu_ppc970)
mfspr r0,SPRN_HID0
li r11,5 /* clear DOZE and SLEEP */
Index: linus-2.6/arch/powerpc/kernel/cputable.c
===================================================================
--- linus-2.6.orig/arch/powerpc/kernel/cputable.c 2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/kernel/cputable.c 2006-04-29 22:53:42.000000000 +0200
@@ -33,7 +33,6 @@
#ifdef CONFIG_PPC64
extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
#else
extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
@@ -289,7 +288,7 @@
PPC_FEATURE_SMT,
.icache_bsize = 128,
.dcache_bsize = 128,
- .cpu_setup = __setup_cpu_be,
+ .cpu_setup = __setup_cpu_power4,
.platform = "ppc-cell-be",
},
{ /* default match */
--
^ permalink raw reply
* [PATCH 03/13] cell: fix interrupt priority handling
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
Checking the priority field to test for irq validity is
completely bogus and breaks with future external interrupt
controllers.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/interrupt.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/interrupt.c 2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/interrupt.c 2006-04-29 22:53:41.000000000 +0200
@@ -136,8 +136,7 @@
* One of these units can be connected
* to an external interrupt controller.
*/
- if (pending.prio > 0x3f ||
- pending.class != 2)
+ if (pending.class != 2)
break;
irq = IIC_EXT_OFFSET
+ spider_get_irq(node)
--
^ permalink raw reply
* [PATCH 02/13] spufs: restore mapping of mssync register
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
A recent change to the way that the mfc file gets mapped made it
impossible to map the SPE Multi-Source Synchronization register
into user space, but that may be needed by some applications.
This restores the missing functionality.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/file.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/file.c 2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/file.c 2006-04-29 22:53:41.000000000 +0200
@@ -825,6 +825,55 @@
spufs_signal2_type_set, "%llu");
#ifdef CONFIG_SPUFS_MMAP
+static struct page *spufs_mss_mmap_nopage(struct vm_area_struct *vma,
+ unsigned long address, int *type)
+{
+ return spufs_ps_nopage(vma, address, type, 0x0000);
+}
+
+static struct vm_operations_struct spufs_mss_mmap_vmops = {
+ .nopage = spufs_mss_mmap_nopage,
+};
+
+/*
+ * mmap support for problem state MFC DMA area [0x0000 - 0x0fff].
+ * Mapping this area requires that the application have CAP_SYS_RAWIO,
+ * as these registers require special care when read/writing.
+ */
+static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ if (!(vma->vm_flags & VM_SHARED))
+ return -EINVAL;
+
+ if (!capable(CAP_SYS_RAWIO))
+ return -EPERM;
+
+ vma->vm_flags |= VM_RESERVED;
+ vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
+ | _PAGE_NO_CACHE);
+
+ vma->vm_ops = &spufs_mss_mmap_vmops;
+ return 0;
+}
+#endif
+
+static int spufs_mss_open(struct inode *inode, struct file *file)
+{
+ struct spufs_inode_info *i = SPUFS_I(inode);
+
+ file->private_data = i->i_ctx;
+ return nonseekable_open(inode, file);
+}
+
+static struct file_operations spufs_mss_fops = {
+ .open = spufs_mss_open,
+#ifdef CONFIG_SPUFS_MMAP
+ .mmap = spufs_mss_mmap,
+#endif
+};
+
+
+#ifdef CONFIG_SPUFS_MMAP
static struct page *spufs_mfc_mmap_nopage(struct vm_area_struct *vma,
unsigned long address, int *type)
{
@@ -1292,6 +1341,7 @@
{ "signal2", &spufs_signal2_fops, 0666, },
{ "signal1_type", &spufs_signal1_type, 0666, },
{ "signal2_type", &spufs_signal2_type, 0666, },
+ { "mss", &spufs_mss_fops, 0666, },
{ "mfc", &spufs_mfc_fops, 0666, },
{ "cntl", &spufs_cntl_fops, 0666, },
{ "npc", &spufs_npc_ops, 0666, },
--
^ permalink raw reply
* [PATCH 01/13] cell: always build spu base into the kernel
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: Arnd Bergmann, linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060429232812.825714000@localhost.localdomain>
The spu_base module is rather deeply intermixed with the
core kernel, so it makes sense to have that built-in.
This will let us extend the base in the future without
having to export more core symbols just for it.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/Makefile
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/Makefile 2006-04-29 22:47:56.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/Makefile 2006-04-29 22:53:41.000000000 +0200
@@ -2,15 +2,13 @@
obj-y += pervasive.o
obj-$(CONFIG_SMP) += smp.o
-obj-$(CONFIG_SPU_FS) += spu-base.o spufs/
-
-spu-base-y += spu_base.o spu_priv1.o
# needed only when building loadable spufs.ko
spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
obj-y += $(spufs-modular-m)
# always needed in kernel
-spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o
+spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o
obj-y += $(spufs-builtin-y) $(spufs-builtin-m)
+obj-$(CONFIG_SPU_FS) += spufs/
--
^ permalink raw reply
* [PATCH 00/13] Cell patches for 2.6.18
From: Arnd Bergmann @ 2006-04-29 23:28 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, cbe-oss-dev, linux-kernel
This series are the patches that I'd like to suggest for the powerpc.git
tree for 2.6.18. There will be a few more as soon as the stuff I sent
yesterday has gone in, so I can forward-port the patches depending on
that.
Arnd <><
--
^ permalink raw reply
* Re: [PATCH] catch valid mem range at onlining memory
From: Vivek Goyal @ 2006-04-29 23:26 UTC (permalink / raw)
To: Greg KH; +Cc: Andrew Morton, kamezawa.hiroyu, linux-kernel, lhms-devel
In-Reply-To: <20060429071818.GA939@kroah.com>
On Sat, Apr 29, 2006 at 12:18:18AM -0700, Greg KH wrote:
> On Fri, Apr 28, 2006 at 05:05:19PM -0700, Andrew Morton wrote:
> > Greg KH <greg@kroah.com> wrote:
> > >
> > > > This all looks fairly (but trivially) dependent upon the 64-bit-resource
> > > > patches in Greg's tree. Greg, were you planning on merging them in the
> > > > post-2.6.17 flood?
> > >
> > > Yes, I was,
> >
> > OK, thanks.
> >
> > > unless there are any objections to me doing this?
> >
> > I'd consider the patches as they stand to be ready to roll.
> >
> > All the code bloat's a bit sad though. It would have been nice to have
> > made the type of resource.start and .end Kconfigurable. What happened
> > to that?
>
> Hm, I didn't remember anything about that. Vivek, any thoughts?
>
Having resource size configurable is nice but it brings added complexity
with it. The question would be if code bloat is significant enough to
go for other option. Last time I had posted few compilation results on
i386. I am summarizing these again.
allmodconfig (CONFIG_DEBUG_INFO=n)
-----------
vmlinux bloat:4096 bytes
allyesconfig (CONFIG_DEBUG_INFO=n)
-----------
vmlinux size bloat: 52K
So even with allyesconfig total bloat is 52K and I am assuming the
systems where memory is at premium are going to use a very limited set
of modules and effectively will see much lesser code bloat than 52K.
For Kconfigurable resource size, probably dma_addr_t is not the very
appropriate as at lots of places size also needs to be 64 bit and
using dma_addr_t is not good. This will then boil down to introducing
a new type like dma_addr_t whose size is Kconfigurable.
Even if it is done, it will not get rid of code bloat completely as lots
of code bloat comes from printk() statemets where we explicitly typecast
the resource to (unsigned long long) to avoid compilation warnings across
the platforms. This typecasting will continue to be there even with
Kconfigurable resources.
Personally I would tend to think that we can live with this code bloat.
Thanks
Vivek
^ permalink raw reply
* Re: [PATCH] Calculate correct instruction length for data-fault VM exits on VT-x systems
From: Leendert van Doorn @ 2006-04-29 23:24 UTC (permalink / raw)
To: Keir Fraser; +Cc: Mats, xen-devel, Khoa Huynh
In-Reply-To: <18dbf8579f22244039cabdf6da372735@cl.cam.ac.uk>
On Sat, 2006-04-29 at 11:39 +0100, Keir Fraser wrote:
>
> Xen-emulated devices could have their state fetched on demand -- it
> ought to be rare that qemu-dm ends up emulating an access to such a
> device. Or have qemu call down into Xen to emulate those accesses.
> Having a device model duplicated in both Xen and qemu, and
> synchronising between the two, sounds a bit sketchy.
In the BIOS (realmode) these devices are initialized and the subsequent
32-bit code depends on the proper initialization. For the common I/O
emulation case this should hopefully be rare.
Leendert
^ permalink raw reply
* my dream come true
From: Spencer @ 2006-04-30 0:07 UTC (permalink / raw)
To: majordomo, linux-ide
Hello my dear friend
I was looking through the web few weeks ago and founda b
your profile. Now I decided to email you to gaet to know
you better. I am coming to your country in few weeks
and thought may be we can meeta each other. I am aapretty
looking girl. I am 25. Do not reply to this address
directly. Email me back at xxwp@popmailme.com
^ permalink raw reply
* RE: [PATCH] Calculate correct instruction length fordata-fault VM exits on VT-x systems
From: Leendert van Doorn @ 2006-04-29 23:19 UTC (permalink / raw)
To: Ian Pratt; +Cc: Petersson, Mats, xen-devel, Khoa Huynh
In-Reply-To: <A95E2296287EAD4EB592B5DEEFCE0E9D4BA4E7@liverpoolst.ad.cl.cam.ac.uk>
On Sat, 2006-04-29 at 16:48 +0100, Ian Pratt wrote:
> Having a full emulator available certainly enables lots of cool tricks
> (e.g. the taint tracking example in the paper). You wouldn't want to use
> it for all MMIO operations (they're often singletons), but for handling
> batches is would be good. It's certainly a good way of handling the 16b
> issue on Intel.
Why wouldn't you do it on each mmio operation that is not implemented in
the hypervisor? As soon as you have to do the upcall the cost of going
to qemu-dm, or even a miniguest partition, dwarfs the cost of invoking
the emulator.
Leendert
^ permalink raw reply
* Re: netboot related projects
From: Yoshinori K. Okuji @ 2006-04-29 23:10 UTC (permalink / raw)
To: The development of GRUB 2
In-Reply-To: <4453E2A1.4000706@imperial.ac.uk>
On Sunday 30 April 2006 00:03, vincent guffens wrote:
> true, but this is why the idea here is to use the drivers without
> modification or at least with as few modifications as possible.
GRUB Legacy did the same, and failed in keeping the code up-to-date. Because:
- you still have to check all updated files every time.
- you depend on the internal API of Etherboot, so you need to develop glue
code again and again.
I would say that this is not desirable, unless Etherboot developers make the
internal API quite stable, and this is unlikely to happen. They have good
reasons to change it from time to time.
IMHO, the only feasible approach is to depend on only the external API of
Etherboot. This is the UNDI interface. Fortunately, if we use UNDI, we can
provide the same feature for PXE ROMs as well, and UNDI is a standard. So I
prefer to develop a network device based on UNDI rather than copying
Etherboot drivers.
Okuji
^ permalink raw reply
* [Qemu-devel] qemu configure
From: Paul Brook @ 2006-04-29 23:05 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Branch:
Changes by: Paul Brook <pbrook@savannah.gnu.org> 06/04/29 23:05:23
Modified files:
. : configure
Log message:
Fix non-portable use of expr.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/configure.diff?tr1=1.97&tr2=1.98&r1=text&r2=text
^ permalink raw reply
* Re: [ROSE] Fix routing table locking in rose_remove_neigh.
From: Bernard Pidoux @ 2006-04-29 22:59 UTC (permalink / raw)
To: Ralf Baechle; +Cc: David S. Miller, netdev, linux-hams
In-Reply-To: <20060429133141.GA31820@linux-mips.org>
Ralf Baechle wrote:
> The locking rule for rose_remove_neigh() are that the called needs to
> hold rose_neigh_list_lock, so we better don't take it yet again in
> rose_neigh_list_lock.
>
> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
All ROSE and HZ patches applied to kernel 2.6.16
Many thanks Ralf.
73 de Bernard, f6bvp
http://f6bvp.org
http://rose.fpac.free.fr/MINI-HOWTO/
http://rose.fpac.free.fr/MINI-HOWTO-FR/
^ permalink raw reply
* Re: [linux-lvm] vgchange -ay Killed
From: Ming Zhang @ 2006-04-29 22:58 UTC (permalink / raw)
To: LVM general discussion and development
In-Reply-To: <20060429222453.GC16180@agk.surrey.redhat.com>
On Sat, 2006-04-29 at 23:24 +0100, Alasdair G Kergon wrote:
> The code has not been optimised for large numbers of LVs.
guess so
>
> Use the latest dm/lvm2 versions for a start as there's a memory
> leak in your libdevmapper.
ic. it come with centos 4.3
>
> Each device device uses up a fixed amount of (unswappable) kernel
> memory, and when all your memory is used out you can't have any
> more devices.
>
> Use standard diagnostic tools to work out which limit you're hitting.
> (top; ps; slabtop; sysreq; strace etc.)
that box has 2GB ram. and before lvm process is killed, top shows
top - 11:27:24 up 10 min, 4 users, load average: 0.99, 0.71, 0.34
Tasks: 91 total, 1 running, 90 sleeping, 0 stopped, 0 zombie
Cpu(s): 18.7% us, 5.9% sy, 0.0% ni, 67.3% id, 8.0% wa, 0.0% hi,
0.0% si
Mem: 2055388k total, 2041136k used, 14252k free, 192k buffers
Swap: 4192956k total, 2304k used, 4190652k free, 58236k cached
PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND
4550 root 18 0 1927m 1.9g 48m D 94.9 95.6 5:00.00 lvm
if that is kernel memory, why lvm shows a RES of 1.9GB?
>
> Alasdair
>
> _______________________________________________
> linux-lvm mailing list
> linux-lvm@redhat.com
> https://www.redhat.com/mailman/listinfo/linux-lvm
> read the LVM HOW-TO at http://tldp.org/HOWTO/LVM-HOWTO/
^ permalink raw reply
* Re: [LARTC] icmp latency question
From: Sebastian Bork @ 2006-04-29 22:59 UTC (permalink / raw)
To: lartc
In-Reply-To: <c2cd58b40604210204r78ec5341qb0785e731eacd17f@mail.gmail.com>
the sew wrote:
> Our company's main line is quite busy the whole day and my shaping is
> working perfect, however even if I give icmp priority the pings still
> jump around quite a bit.
>
> We do have a backup line which hardly get used only if the main line
> drops. I've set ip rule to route all icmp through that and now the
> pings are perfect.
>
> Will this make a difference for the game players etc, with this low
> ping? or does the lagg on the game get effected by the throughput?
Sorry, I don't want to offend you, but your mail has been the cause for
the first good laugh of the day.
To get good results for online gaming, the roundtrip time of the packets
to and from the game servers needs to be good, and it should be fairly
constant, without sudden increases in the "lag time". To test this RTT,
most people use ping, as ICMP echo requests/replies are the perfect tool
for measuring this.
What you did was not to improve the RTT of the packets in the data
stream to and from game servers, but to falsify the results of RTT tests
done with ICMP. Now your measurements look perfect, without any change
to the real lag your gamers will experience.
You should not take "you need a good ping for gaming" literally. Really,
games do *not* use ICMP to connect to the servers. ;o)
I begin to doubt the wisdom of including rules for ICMP priorisation in
the many tc examples out there. Really, it does not make sense to send
out the packets used to test the average and best/worst case RTT of a
network as fast as the link allows at the cost of letting other traffic
wait, because then the result of a ping will have nothing to do with
what the sender of that ping wanted to know.
Just my € 0.02,
Sebi
--
Sebastian Bork <sebi@sebi.org> ("`-''-/").___..--''"`-._
`6_ 6 ) `-. ( ).`-.__.`)
Untere Karlsstr. 16, 34117 Kassel (_Y_.)' ._ ) `._ `. ``-..-`
Cellular phone: +49 163 6780023 _..`--'_..-_/ /--'_.' ,'
_____________________________________(il),-'' (li),' ((!.-' **meow**
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^ permalink raw reply
* Re: cg-clone not fetching all tags?
From: Johannes Sixt @ 2006-04-29 22:54 UTC (permalink / raw)
To: git
In-Reply-To: <20060429221114.557FC35288F@atlas.denx.de>
On Sunday 30 April 2006 00:11, Wolfgang Denk wrote:
> In message <200604292342.16306.johannes.sixt@telecom.at> you wrote:
> > There are two types of tags: They can point to
> > 1. a commit object
> > 2. a proper tag object (which in turn references the commit)
> >
> > git-update-server-info seems to generate info only for case 2, and so are
> > the only ones that http can fetch.
>
> And git-cvsimport (at least older versions of it) imports CVS tags
> only as type 1 ?
>
> That would perfectly explain the situation. How can this be fixed?
Something like this tells you which one points to a commit or a tag:
for i in `find .git/refs/tags -type f`; do
echo -n "$i "; git-cat-file -t $(cat $i);
done
Then for each commit-type $tag you do
git-tag -m ' ' $tag-new $tag
mv .git/refs/tags/$tag-new .git/refs/tags/$tag
(git-tag does not accept an empty tag message - if you dislike the
single-blank-message, you have to manufacture your tags with git-mktag
manually.)
-- Hannes
^ permalink raw reply
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