* [PATCH 8/8] dmaengine/dw_dmac: Add support for DMA_SLAVE_CONFIG
From: Viresh Kumar @ 2012-01-17 9:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4F153C33.5060805@st.com>
On 1/17/2012 2:45 PM, Viresh Kumar wrote:
>>>>>> >>> >> + * Fix sconfig's burst size according to dw_dmac. We need to convert
>>>>>> >>> >> + * them as: 1 -> 0, 2 -> 1, 4 -> 2, 8 -> 3, 16 -> 4.
> I need above conversion. i.e. finding bit no. of first bit set.
Something like:
unsigned int v; // 32-bit word
unsigned int r = 0;
while (v >>= 1)
{
r++;
}
Probably find_first_bit() suits it.
--
viresh
^ permalink raw reply
* Re: [PATCH 3/3] pango.inc: add directory "/etc/pango"
From: Khem Raj @ 2012-01-17 9:11 UTC (permalink / raw)
To: Patches and discussions about the oe-core layer
In-Reply-To: <4F13A8EF.5060001@linux.intel.com>
On Sun, Jan 15, 2012 at 8:34 PM, Saul Wold <sgw@linux.intel.com> wrote:
> On 01/12/2012 11:06 PM, Xiaofeng Yan wrote:
>>
>> From: Xiaofeng Yan<xiaofeng.yan@windriver.com>
>>
>> Command "pango-querymodules> /etc/pango/pango.modules" can't work when \
>> starting up yocto because of no directory "/etc/pango". It will cause \
>> messy code when gtk-demo running.
>>
>> [YOCTO #1674]
>>
>> Signed-off-by: Xiaofeng Yan<xiaofeng.yan@windriver.com>
>> ---
>> meta/recipes-graphics/pango/pango.inc | 7 ++++++-
>> 1 files changed, 6 insertions(+), 1 deletions(-)
>>
>> diff --git a/meta/recipes-graphics/pango/pango.inc
>> b/meta/recipes-graphics/pango/pango.inc
>> index b428b9d..06db327 100644
>> --- a/meta/recipes-graphics/pango/pango.inc
>> +++ b/meta/recipes-graphics/pango/pango.inc
>> @@ -46,6 +46,11 @@ fi
>>
>> }
>>
>> +# Command "pango-querymodules> /etc/pango/pango.modules" needs this
>> directory.
>> +do_install_prepend() {
>> + install -d ${D}/${sysconfdir}/pango
>> +}
>> +
>> python populate_packages_prepend () {
>> prologue = d.getVar("postinst_prologue", 1)
>>
>> @@ -54,6 +59,6 @@ python populate_packages_prepend () {
>> do_split_packages(d, modules_root, '^pango-(.*)\.so$',
>> 'pango-module-%s', 'Pango module %s', prologue + 'pango-querymodules>
>> /etc/pango/pango.modules')
>> }
>>
>> -FILES_${PN} = "/etc/pango/* ${bindir}/* ${libdir}/libpango*${SOLIBS}"
>> +FILES_${PN} += "${bindir}/* ${libdir}/libpango*${SOLIBS}"
>
> This can actually be removed completed since the default for FILES_${PN}
> includes bindir/* and libdir/lib*${SOLIBS}
>
> I fixed this up in my testing area.
>
Saul
This seems wrong to me. Since now all the modules will also be bundled in $PN
whereas you want them in pango-modules-* packages since
populate_packages_prepend has nothing left to generate out modules
packages so please reintroduce the FILES_${PN} as it was (note that it
was overwriting the defaults
and not appending to it.)
> Sau!
>
>
>> FILES_${PN}-dbg += "${libdir}/pango/${LIBV}/modules/.debug"
>> FILES_${PN}-dev += "${libdir}/pango/${LIBV}/modules/*.la"
>
>
> _______________________________________________
> Openembedded-core mailing list
> Openembedded-core@lists.openembedded.org
> http://lists.linuxtogo.org/cgi-bin/mailman/listinfo/openembedded-core
^ permalink raw reply
* Re: Compat-wireless-3.2-rc6-3 is broken for rt2860 device
From: Andreas Hartmann @ 2012-01-17 9:09 UTC (permalink / raw)
To: Helmut Schaa; +Cc: linux-wireless@vger.kernel.org, Felix Fietkau
In-Reply-To: <CAGXE3d_jW7NFnekMfwn6JPXX0xB4UWM3ttbRVLv-ZbsoMOoWEw@mail.gmail.com>
Hello Helmut,
Am Tue, 10 Jan 2012 10:50:16 +0100
schrieb Helmut Schaa <helmut.schaa@googlemail.com>:
> On Tue, Jan 10, 2012 at 9:03 AM, Andreas Hartmann
> <andihartmann@01019freenet.de> wrote:
[...]
> > Looks as if sending of any package is reported as broken at some
> > point of time and this circle cannot be left anymore.
>
> Not necessarily since mac80211 will only retry the BAR if a data frame
> transmission was successful. Hence, it seems as if only the BARs TX
> status is reported incorrectly ...
>
> I see two issues here:
> 1) rt2800pci seems to have problems delivering the BAR _or_ doesn't
> report the tx status correctly
> 2) If the same BAR fails consecutively we should maybe really tear down
> the BA session as it was done before
>
> 2 is done in the below untested patch and will also work around 1.
> Mind to give it a try?
I encountered some temporary, short stalls during low bandwith
(running X terminal sessions tunneled through ssh). Therefore I set
MAX_BAR_RETRIES=0
This means,
ieee80211_send_bar(&sta->sdata->vif, addr, tid,
tid_tx->failed_bar_ssn);
isn't called any more. But that's not all: the BA session isn't torn
down any more, too - but it's working fine (high bandwith, too) anyway!?
Why? (If I remove your patch again, the session completely stalls as
ever).
Behavior looks like this now:
Jan 17 08:13:06 ap kernel: [ 4247.178448] rt2800_txdone_entry - tx failed
Jan 17 08:13:06 ap kernel: [ 4247.178456] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 113
Jan 17 08:13:06 ap kernel: [ 4247.178467] __set_bit ENTRY_TXD_HT_AMPDU
Jan 17 08:13:06 ap kernel: [ 4247.178478] rt2800_txdone_entry - tx failed
Jan 17 08:13:06 ap kernel: [ 4247.178481] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 114
Jan 17 08:13:06 ap kernel: [ 4247.178487] __set_bit ENTRY_TXD_HT_AMPDU
Jan 17 08:13:06 ap kernel: [ 4247.178493] rt2800_txdone_entry - tx failed
Jan 17 08:13:06 ap kernel: [ 4247.178495] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 115
Jan 17 08:13:06 ap kernel: [ 4247.178500] __set_bit ENTRY_TXD_HT_AMPDU
Jan 17 08:13:06 ap kernel: [ 4247.178506] rt2800_txdone_entry - tx failed
Jan 17 08:13:06 ap kernel: [ 4247.178508] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 116
Jan 17 08:13:06 ap kernel: [ 4247.178513] __set_bit ENTRY_TXD_HT_AMPDU
Jan 17 08:13:06 ap kernel: [ 4247.178518] rt2800_txdone_entry - tx failed
Jan 17 08:13:06 ap kernel: [ 4247.178521] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 117
Jan 17 08:13:06 ap kernel: [ 4247.178525] __set_bit ENTRY_TXD_HT_AMPDU
Jan 17 08:13:06 ap kernel: [ 4247.178530] rt2800_txdone_entry - tx failed
Jan 17 08:13:06 ap kernel: [ 4247.178533] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 118
Jan 17 08:13:06 ap kernel: [ 4247.178537] __set_bit ENTRY_TXD_HT_AMPDU
Jan 17 08:13:06 ap kernel: [ 4247.178542] rt2800_txdone_entry - tx failed
Jan 17 08:13:06 ap kernel: [ 4247.178545] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 119
Jan 17 08:13:06 ap kernel: [ 4247.178550] __set_bit ENTRY_TXD_HT_AMPDU
Jan 17 08:13:06 ap kernel: [ 4247.185886] rt2800_txdone_entry - tx failed
Jan 17 08:13:07 ap kernel: [ 4247.185894] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 120
Jan 17 08:13:07 ap kernel: [ 4247.185900] status.c ieee80211_tx_status() calls ieee80211_set_bar_pending. tid: <0> control: <4> ssn: <4320>
Jan 17 08:13:07 ap kernel: [ 4247.196303] rt2800_txdone_entry - tx failed
Jan 17 08:13:07 ap kernel: [ 4247.196310] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 121
Jan 17 08:13:07 ap kernel: [ 4247.196315] status.c ieee80211_tx_status() calls ieee80211_set_bar_pending. tid: <0> control: <4> ssn: <4336>
Jan 17 08:13:07 ap kernel: [ 4247.211337] rt2800_txdone_entry - tx failed
Jan 17 08:13:07 ap kernel: [ 4247.211346] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 122
Jan 17 08:13:07 ap kernel: [ 4247.211352] status.c ieee80211_tx_status() calls ieee80211_set_bar_pending. tid: <0> control: <4> ssn: <4352>
Jan 17 08:13:07 ap kernel: [ 4247.217669] rt2800_txdone_entry - tx failed
Jan 17 08:13:07 ap kernel: [ 4247.217673] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 123
Jan 17 08:13:07 ap kernel: [ 4247.217675] status.c ieee80211_tx_status() calls ieee80211_set_bar_pending. tid: <0> control: <4> ssn: <4368>
Jan 17 08:13:07 ap kernel: [ 4247.226812] rt2800_txdone_entry - tx failed
Jan 17 08:13:07 ap kernel: [ 4247.226821] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 124
Jan 17 08:13:07 ap kernel: [ 4247.226826] status.c ieee80211_tx_status() calls ieee80211_set_bar_pending. tid: <0> control: <4> ssn: <4384>
Jan 17 08:13:07 ap kernel: [ 4247.234151] rt2800_txdone_entry - tx failed
Jan 17 08:13:07 ap kernel: [ 4247.234159] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 125
Jan 17 08:13:07 ap kernel: [ 4247.234165] status.c ieee80211_tx_status() calls ieee80211_set_bar_pending. tid: <0> control: <4> ssn: <4400>
Jan 17 08:13:07 ap kernel: [ 4247.244042] rt2800_txdone_entry - tx failed
Jan 17 08:13:07 ap kernel: [ 4247.244050] rt2x00lib_txdone - no success - low_level_stats.dot11ACKFailureCount: 126
Jan 17 08:13:07 ap kernel: [ 4247.244056] status.c ieee80211_tx_status() calls ieee80211_set_bar_pending. tid: <0> control: <4> ssn: <4416>
BTW:
I can see, that RX A-MPDU is switched on - why not for TX, too? Where
can I see if a hardware is capable to use A-MPDU?
iw list prints for the AP device (2,4 GHz):
Wiphy phy0
Band 1:
HT capabilities: 0x02f2
* 20/40 MHz operation
* static SM PS
* HT-greenfield
* 20 MHz short GI
* 40 MHz short GI
* TX STBC
* RX STBC 2 streams
* max A-MSDU len 3839
HT A-MPDU factor: 0x0003 (65535 bytes)
HT A-MPDU density: 0x0004 (2 usec)
HT MCS set: ff ff 00 00 01 00 00 00 00 00 00 00 07 00 00 00
HT RX MCS rate indexes supported:
MCS index 0
MCS index 1
MCS index 2
MCS index 3
MCS index 4
MCS index 5
MCS index 6
MCS index 7
MCS index 8
MCS index 9
MCS index 10
MCS index 11
MCS index 12
MCS index 13
MCS index 14
MCS index 15
MCS index 32
TX unequal modulation not supported
HT TX Max spatiel streams: 5
HT TX MCS rate indexes supported may differ
Frequencies:
* 2412 MHz [1] (20.0 dBm)
* 2417 MHz [2] (20.0 dBm)
* 2422 MHz [3] (20.0 dBm)
* 2427 MHz [4] (20.0 dBm)
* 2432 MHz [5] (20.0 dBm)
* 2437 MHz [6] (20.0 dBm)
* 2442 MHz [7] (20.0 dBm)
* 2447 MHz [8] (20.0 dBm)
* 2452 MHz [9] (20.0 dBm)
* 2457 MHz [10] (20.0 dBm)
* 2462 MHz [11] (20.0 dBm)
* 2467 MHz [12] (20.0 dBm)
* 2472 MHz [13] (20.0 dBm)
* 2484 MHz [14] (disabled)
Bitrates (non-HT):
* 1.0 Mbps
* 2.0 Mbps (short preamble supported)
* 5.5 Mbps (short preamble supported)
* 11.0 Mbps (short preamble supported)
* 6.0 Mbps
* 9.0 Mbps
* 12.0 Mbps
* 18.0 Mbps
* 24.0 Mbps
* 36.0 Mbps
* 48.0 Mbps
* 54.0 Mbps
Kind regards,
Andreas
> Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com>
> ---
> diff --git a/net/mac80211/sta_info.h b/net/mac80211/sta_info.h
> index a18f524..983994b 100644
> --- a/net/mac80211/sta_info.h
> +++ b/net/mac80211/sta_info.h
> @@ -122,7 +122,7 @@ struct tid_ampdu_tx {
> u8 buf_size;
>
> u16 failed_bar_ssn;
> - bool bar_pending;
> + unsigned int bar_pending;
> };
>
> /**
> diff --git a/net/mac80211/status.c b/net/mac80211/status.c
> index 30c265c..ea782f1 100644
> --- a/net/mac80211/status.c
> +++ b/net/mac80211/status.c
> @@ -17,6 +17,7 @@
> #include "led.h"
> #include "wme.h"
>
> +#define MAX_BAR_RETRIES 3
>
> void ieee80211_tx_status_irqsafe(struct ieee80211_hw *hw,
> struct sk_buff *skb)
> @@ -171,8 +172,17 @@ static void ieee80211_check_pending_bar(struct
> sta_info *sta, u8 *addr, u8 tid)
> if (!tid_tx || !tid_tx->bar_pending)
> return;
>
> - tid_tx->bar_pending = false;
> - ieee80211_send_bar(&sta->sdata->vif, addr, tid, tid_tx->failed_bar_ssn);
> + if (--tid_tx->bar_pending) {
> + ieee80211_send_bar(&sta->sdata->vif, addr, tid,
> + tid_tx->failed_bar_ssn);
> + return;
> + }
> +
> + /*
> + * The same BAR failed multiple times, something is clearly wrong
> + * -> Stop the BA session.
> + */
> + ieee80211_stop_tx_ba_session(&sta->sta, tid);
> }
>
> static void ieee80211_frame_acked(struct sta_info *sta, struct sk_buff *skb)
> @@ -225,8 +235,16 @@ static void ieee80211_set_bar_pending(struct
> sta_info *sta, u8 tid, u16 ssn)
> if (!tid_tx)
> return;
>
> + /*
> + * A BAR for the same SSN is still pending, don't
> + * update the pending count.
> + */
> + if (tid_tx->failed_bar_ssn == ssn &&
> + tid_tx->bar_pending)
> + return;
> +
> tid_tx->failed_bar_ssn = ssn;
> - tid_tx->bar_pending = true;
> + tid_tx->bar_pending = MAX_BAR_RETRIES;
> }
>
> static int ieee80211_tx_radiotap_len(struct ieee80211_tx_info *info)
^ permalink raw reply
* Re: [PATCH 2/2] v4l2: add new pixel formats supported on dm365
From: Laurent Pinchart @ 2012-01-17 9:17 UTC (permalink / raw)
To: Hadli, Manjunath
Cc: Sakari Ailus, LMML, dlos, Hans Verkuil, Guennadi Liakhovetski
In-Reply-To: <E99FAA59F8D8D34D8A118DD37F7C8F7531742424@DBDE01.ent.ti.com>
Hi Manjunath,
On Tuesday 17 January 2012 07:59:35 Hadli, Manjunath wrote:
> On Mon, Jan 02, 2012 at 16:51:06, Laurent Pinchart wrote:
> > On Wednesday 28 December 2011 12:16:27 Sakari Ailus wrote:
> > > On Wed, Dec 21, 2011 at 11:23:26PM +0100, Laurent Pinchart wrote:
> > > > On Wednesday 21 December 2011 14:56:36 Hadli, Manjunath wrote:
> > > > > On Wed, Dec 21, 2011 at 05:32:08, Laurent Pinchart wrote:
> > > > > > On Friday 16 December 2011 14:42:48 Hadli, Manjunath wrote:
> > > > > > > On Thu, Dec 15, 2011 at 18:30:47, Laurent Pinchart wrote:
> > > > > > > > On Thursday 15 December 2011 13:24:58 Manjunath Hadli wrote:
> > > > > > > > > add new macro V4L2_PIX_FMT_SGRBG10ALAW8 to represent Bayer
> > > > > > > > > format frames compressed by A-LAW alogorithm.
> > > > > > > > > add V4L2_PIX_FMT_UV8 to represent storage of C (UV
> > > > > > > > > interleved) only.
> > > > > > > > >
> > > > > > > > > Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
> > > > > > > > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > > > > > > > ---
> > > > > > > > >
> > > > > > > > > include/linux/videodev2.h | 6 ++++++
> > > > > > > > > 1 files changed, 6 insertions(+), 0 deletions(-)
> > > > > > > >
> > > > > > > > Could you please also document these formats in
> > > > > > > > Documentation/DocBook/media/v4l ?
> > > > > > >
> > > > > > > I will. Sorry to have missed that out.
> > > > > > >
> > > > > > > > > diff --git a/include/linux/videodev2.h
> > > > > > > > > b/include/linux/videodev2.h index 4b752d5..969112d 100644
> > > > > > > > > --- a/include/linux/videodev2.h
> > > > > > > > > +++ b/include/linux/videodev2.h
> > > > > > > > > @@ -338,6 +338,9 @@ struct v4l2_pix_format {
> > > > > > > > >
> > > > > > > > > #define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1',
> > > > > > > > > '2') /* 8 YUV
> > > > > > > > >
> > > > > > > > > 4:2:0 16x16 macroblocks */ #define V4L2_PIX_FMT_M420
> > > > > > > > > v4l2_fourcc('M', '4', '2', '0') /* 12 YUV 4:2:0 2 lines
> > > > > > > > > y, 1 line uv interleaved */
> > > > > > > > >
> > > > > > > > > +/* Chrominance formats */
> > > > > > > > > +#define V4L2_PIX_FMT_UV8 v4l2_fourcc('U', 'V', '8', '
> > > > > > > > > ') /* 8 UV 4:4 */ +
> > > > > > > > >
> > > > > > > > > /* two planes -- one Y, one Cr + Cb interleaved */
> > > > > > > > > #define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1',
> > > > > > > > > '2') /* 12 Y/CbCr
> > > > > > > > >
> > > > > > > > > 4:2:0 */ #define V4L2_PIX_FMT_NV21 v4l2_fourcc('N',
> > > > > > > > > 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */ @@ -366,6 +369,9 @@
> > > > > > > > > struct v4l2_pix_format { #define V4L2_PIX_FMT_SRGGB12
> > > > > > > > > v4l2_fourcc('R', 'G', '1', '2') /* 12 RGRG.. GBGB.. */ /*
> > > > > > > > > 10bit raw bayer DPCM compressed to 8 bits */ #define
> > > > > > > > > V4L2_PIX_FMT_SGRBG10DPCM8 v4l2_fourcc('B', 'D', '1', '0')
> > > > > > > > > + /* 10bit raw bayer a-law compressed to 8 bits */ #define
> > > > > > > > > +V4L2_PIX_FMT_SGRBG10ALAW8 v4l2_fourcc('A', 'L', 'W', '8')
> > > > > > > > > +
> > > > > > > >
> > > > > > > > That's not very future-proof, how would you describe
> > > > > > > > SGBRG10ALAW8 for instance ?
> > > > > > > >
> > > > > > > > Maybe it's time to standardize FOURCCs for Bayer new
> > > > > > > > formats. We have 4 characters, we could start with 'B' to
> > > > > > > > denote Bayer, followed by one character for the order, one
> > > > > > > > for the compression, and one for the number of bits.
> > > > > > >
> > > > > > > I agree.
> > > > > > > May be ('B', 'G', 'A', '8') is fine for the above?
> > > > > >
> > > > > > We need to describe at last BGGR, GBRG, GRBG and RGGB. We could
> > > > > > use 'B', 'g', 'G' and 'R' respectively for the second character.
> > > > > > The third character would be 'A' for A-law and 'D' for DPCM, and
> > > > > > the fourth character could describe the bus width in bits from 0
> > > > > > to 15 with '0' - '9', 'A' - 'F'. However, I suspect that we will
> > > > > > need 16-bit wide busses for raw Bayer at some point, and a 0
> > > > > > width is definitely not useful. We could thus offset the width by
> > > > > > some value.
> > > > > >
> > > > > > This is just a preliminary idea, I'm open to suggestions.
> > > > >
> > > > > I think it is a very good suggestion that we can go with.
> > > > > B : BGGR
> > > > > g : GBRG
> > > > > G : GRBG
> > > > > R : RGGB
> > > > >
> > > > > and 0-F can signify 1-16.
> > > >
> > > > Hans, Guennadi, Sakari, any opinion on that as well ?
> > >
> > > I think four letters simply aren't enough to universally describe a
> > > media bus format in a human-readable way. We can aim to that, but we
> > > will have to make compromises.
> > >
> > > For example, DPCM compressed format has two important parameters
> > > beyond pixel order and the colour space, the uncompressed depth and
> > > the compressed depth. Typically one doesn't compress the data too
> > > much, but things like
> > > 10-to-6 bits are well possible.
> > >
> > > Could we use a single letter to tell that a format is both bayer and
> > > DPCM compressed? I'd go for 'b'. Raw bayer alaw could be denoted by
> > > 'a'.
> > >
> > > Then raw bayer, GBRG pixel order 10-to-7 bits would be called "bgA7".
> > > The same in Alaw would be "agA7".
> > >
> > > What do you think?
> >
> > We can't come up with a naming scheme that will handle all possible
> > combinations. I'm fine as long as the names we select have some kind of
> > structure and handle the raw patterns currently available. I'd still
> > like to hear Hans' opinion on this.
>
> Since we agree that the scheme will not be able to cover the spectrum
> In the level of detail which we would like to, I think we should go with
> the Above discussed scheme which seems logical. I will send out a detailed
> patch With added documentation.
Please also see http://www.spinics.net/lists/linux-media/msg43192.html.
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: Driver domains and hotplug scripts, redux
From: Ian Campbell @ 2012-01-17 9:17 UTC (permalink / raw)
To: Ian Jackson
Cc: Roger Pau Monné, xen-devel@lists.xensource.com,
Stefano Stabellini
In-Reply-To: <20244.25907.223422.50324@mariner.uk.xensource.com>
On Mon, 2012-01-16 at 17:58 +0000, Ian Jackson wrote:
> Roger Pau Monné writes ("Re: [Xen-devel] Driver domains and hotplug scripts, redux"):
> > 2012/1/12 Ian Jackson <Ian.Jackson@eu.citrix.com>:
> > > Ian Campbell writes ("Re: [Xen-devel] Driver domains and hotplug scripts, redux"):
> > >> The forceful destroy case is different, it is effectively:
> > >> 1. rm backend dir in xenstore.
> > >
> > > That's (iii). We want a way to do (ii) as well.
> >
> > From my point of view, (iii) should only happen after (i) or (ii) has
> > failed (timeout or error trying to unplug devices).
>
> There has to be a user option to ask for a "very forceful" detach.
>
> > What should we do with xend? Are we keeping it on 4.2? I'm asking this
> > because the changes I'm introducing disables some udev rules that are
> > needed for xend. The other option is to update xend to talk to
> > xenbackendd also.
>
> I think xend is not going to go away in 4.2, unfortunately.
However xend should not be transition to this new scheme but should
continue to use its existing scripts in the current manner.
There was a conversation last year[0] about how a toolstack could
opt-in/out of the use of the hotplug scripts. We decided that toolstacks
should have to opt into the use of these scripts, by touching a stamp
file.
Although this wasn't implemented yet (unless I missed it) I guess the
same scheme would apply to this work if that sort of thing turns out to
be necessary.
Ian.
[0] http://lists.xen.org/archives/html/xen-devel/2011-06/msg00952.html
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xensource.com
http://lists.xensource.com/xen-devel
^ permalink raw reply
* [U-Boot] [PATCH 1/2] image: add support for Android's boot image format
From: Aneesh V @ 2012-01-17 9:16 UTC (permalink / raw)
To: u-boot
In-Reply-To: <20111123100316.GA6654@linutronix.de>
Dear Wolfgang,
On Wednesday 23 November 2011 03:33 PM, Sebastian Andrzej Siewior wrote:
> * Wolfgang Denk | 2011-11-22 20:04:47 [+0100]:
>
>> Dear Sebastian Andrzej Siewior,
>>
>> In message<20111122123007.GA5755@linutronix.de> you wrote:
>>>
>>>>> + * Redistribution and use in source and binary forms, with or without
>>>>> + * modification, are permitted provided that the following conditions
>>>>> + * are met:
>>>>> + * * Redistributions of source code must retain the above copyright
>>>>> + * notice, this list of conditions and the following disclaimer.
>>>>> + * * Redistributions in binary form must reproduce the above copyright
>>>>> + * notice, this list of conditions and the following disclaimer in
>>>>> + * the documentation and/or other materials provided with the
>>>>> + * distribution.
>>>>
>>>> Sorry, but this is not GPL compatible.
>>>
>>> Ehm. Is this the All rights reserved issue? If so then I assumed that I
>>> cleared up things in
>>
>> No, it's the "Redistributions in binary form must reproduce..."
>> clause.
>
> How so? If you distribute it as source nothing changes. I don't see much
> difference in binary form either: section 1 of the GPL says
>
> |.. keep intact all the notices that refer to this License and to the
> |absence of any warranty; and give any other recipients of the Program a
> |copy of this License along with the Program.
>
> and this is no different. It does not mention whether the software has
> to be passed in source or binary form. The BSD part does not push any
> restrictions on the GPL, it "wants" the same thing. Section 6 of the GPL
> says that by redistributing the receiptient should receive a copy of
> this license. The section you mentioed is no different. If you
> distribute GPL in binary code you have let the receiptient know, that he
> is using GPL code. A note in the documentation is enough as far as I
> know [if remeber correctly Harald went after a few companies which were
> using Linux and were not letting the customers know about it].
>
> If you look at the fresh released Quake3 source [0] you see that there
> is a readme file which points out that it is GPL code and enumerates
> various other licenses.
>
> So right now, I don't see why those two should not be compatible. Plus
> the FSF claims that they are [1].
>
> [0] https://github.com/TTimo/doom3.gpl
> [1] http://www.gnu.org/licenses/license-list.html#FreeBSD
What is your final call on this? The above arguments sound convincing
to me, but I have to admit that I am no legal expert. Either way, it
will be great to have a closure on this. Lack of fastboot support was
the greatest impediment to adoption of mainline U-Boot in our previous
platforms. It will be really unfortunate if the same happens to OMAP5
that has just arrived.
best regards,
Aneesh
^ permalink raw reply
* Re: [PATCH 8/8] dmaengine/dw_dmac: Add support for DMA_SLAVE_CONFIG
From: Viresh Kumar @ 2012-01-17 9:15 UTC (permalink / raw)
To: Linus Walleij
Cc: vinod.koul@intel.com, dan.j.williams@intel.com,
linux@arm.linux.org.uk, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Armando VISCONTI,
Shiraz HASHIM, Vipin KUMAR, Rajeev KUMAR, Deepak SIKRI,
Vipul Kumar SAMAR, Amit VIRDI, Pratyush ANAND, Bhupesh SHARMA,
viresh.linux@gmail.com, Bhavna YADAV, Vincenzo FRASCINO,
Mirko GARDI
In-Reply-To: <CACRpkdbY7ZOwY6GR4t+GODYL4yAdH-PXExmwp84R+Gz2W19X7w@mail.gmail.com>
On 1/17/2012 2:19 PM, Linus Walleij wrote:
> Are you looking for ffs() from <linus/bitops.h>?
>
> find-first-set (the include boils down to include/asm-generic/bitops/ffs.h
> if you want to check the implementation).
Thanks, but it might not solve the issue. :(
Actually this will retain the first Least Significant Bit (which is 1)
and will mark all other zero. So it will give output 0b10 for 0b110
>>> >> + * Fix sconfig's burst size according to dw_dmac. We need to convert
>>> >> + * them as: 1 -> 0, 2 -> 1, 4 -> 2, 8 -> 3, 16 -> 4.
I need above conversion. i.e. finding bit no. of first bit set.
--
viresh
^ permalink raw reply
* [PATCH 8/8] dmaengine/dw_dmac: Add support for DMA_SLAVE_CONFIG
From: Viresh Kumar @ 2012-01-17 9:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdbY7ZOwY6GR4t+GODYL4yAdH-PXExmwp84R+Gz2W19X7w@mail.gmail.com>
On 1/17/2012 2:19 PM, Linus Walleij wrote:
> Are you looking for ffs() from <linus/bitops.h>?
>
> find-first-set (the include boils down to include/asm-generic/bitops/ffs.h
> if you want to check the implementation).
Thanks, but it might not solve the issue. :(
Actually this will retain the first Least Significant Bit (which is 1)
and will mark all other zero. So it will give output 0b10 for 0b110
>>> >> + * Fix sconfig's burst size according to dw_dmac. We need to convert
>>> >> + * them as: 1 -> 0, 2 -> 1, 4 -> 2, 8 -> 3, 16 -> 4.
I need above conversion. i.e. finding bit no. of first bit set.
--
viresh
^ permalink raw reply
* Re: update-alternatives questions
From: Koen Kooi @ 2012-01-17 9:07 UTC (permalink / raw)
To: Patches and discussions about the oe-core layer
In-Reply-To: <201201170143.46134.schnitzeltony@gmx.de>
Op 17 jan. 2012, om 01:43 heeft Andreas Müller het volgende geschreven:
> Hi
>
> when starting a fresh image (angstrom/opkg) I see for xfwm4 (xfce window manager
> included in meta-oe)
>
> S98configure[285]: //var/lib/opkg/info/xfwm4.postinst: line 2: update-
> alternatives: command not found
>
> I checked:
>
> * there is no update-alternatives in my image
> * update-alternatives is packed in update-alternatives-cworth (sub package of
> opkg) which is not part of my image
>
> Isn't it required to have update-alternatives on the target
Yes
> because it is used
> in postinst- / and postrm scripts?
Those should be executed offline during build, so it's only for packages you install later on. Have a look at https://github.com/koenkooi/meta-angstrom/blob/master/recipes-images/angstrom/systemd-image.bb. That recipe will not include packagemanagement and u-a if ONLINE_PACKAGE_MANAGEMENT is set to none.
regards,
Koen
^ permalink raw reply
* git-grep while excluding files in a blacklist
From: Dov Grobgeld @ 2012-01-17 9:14 UTC (permalink / raw)
To: git
Does git-grep allow searching for a pattern in all files *except*
files matching a pattern. E.g. in our project we have multiple DLL's
in git, but when searching I would like to exclude these for speed. Is
that possible with git-grep?
Thanks,
Dov
^ permalink raw reply
* Re: [PATCH RFC V4 5/5] Documentation/kvm : Add documentation on Hypercalls and features used for PV spinlock
From: Gleb Natapov @ 2012-01-17 9:14 UTC (permalink / raw)
To: Srivatsa Vaddagiri
Cc: Jeremy Fitzhardinge, Raghavendra K T, KVM, linux-doc,
Peter Zijlstra, Jan Kiszka, Virtualization, Paul Mackerras,
H. Peter Anvin, Stefano Stabellini, Xen, Dave Jiang,
Glauber Costa, X86, Ingo Molnar, Avi Kivity, Rik van Riel,
Konrad Rzeszutek Wilk, Sasha Levin, Sedat Dilek, Thomas Gleixner,
Greg Kroah-Hartman, LKML, Dave Hansen <dave
In-Reply-To: <20120116141117.GB6019@linux.vnet.ibm.com>
On Mon, Jan 16, 2012 at 07:41:17PM +0530, Srivatsa Vaddagiri wrote:
> * Avi Kivity <avi@redhat.com> [2012-01-16 12:14:27]:
>
> > > One option is to make the kick hypercall available only when
> > > yield_on_hlt=1?
> >
> > It's not a good idea to tie various options together. Features should
> > be orthogonal.
> >
> > Can't we make it work? Just have different handling for
> > KVM_REQ_PVLOCK_KICK (let 's rename it, and the hypercall, PV_UNHALT,
> > since we can use it for non-locks too).
>
> The problem case I was thinking of was when guest VCPU would have issued
> HLT with interrupts disabled. I guess one option is to inject an NMI,
> and have the guest kernel NMI handler recognize this and make
> adjustments such that the vcpu avoids going back to HLT instruction.
>
Just kick vcpu out of a guest mode and adjust rip to point after HLT on
next re-entry. Don't forget to call vmx_clear_hlt().
> Having another hypercall to do yield/sleep (rather than effecting that
> via HLT) seems like an alternate clean solution here ..
>
> - vatsa
--
Gleb.
^ permalink raw reply
* Re: [PATCH RFC V4 5/5] Documentation/kvm : Add documentation on Hypercalls and features used for PV spinlock
From: Gleb Natapov @ 2012-01-17 9:14 UTC (permalink / raw)
To: Srivatsa Vaddagiri
Cc: Jeremy Fitzhardinge, Raghavendra K T, KVM, linux-doc,
Peter Zijlstra, Jan Kiszka, Virtualization, Paul Mackerras,
H. Peter Anvin, Stefano Stabellini, Xen, Dave Jiang,
Glauber Costa, X86, Ingo Molnar, Avi Kivity, Rik van Riel,
Konrad Rzeszutek Wilk, Sasha Levin, Sedat Dilek, Thomas Gleixner,
Greg Kroah-Hartman, LKML
In-Reply-To: <20120116141117.GB6019@linux.vnet.ibm.com>
On Mon, Jan 16, 2012 at 07:41:17PM +0530, Srivatsa Vaddagiri wrote:
> * Avi Kivity <avi@redhat.com> [2012-01-16 12:14:27]:
>
> > > One option is to make the kick hypercall available only when
> > > yield_on_hlt=1?
> >
> > It's not a good idea to tie various options together. Features should
> > be orthogonal.
> >
> > Can't we make it work? Just have different handling for
> > KVM_REQ_PVLOCK_KICK (let 's rename it, and the hypercall, PV_UNHALT,
> > since we can use it for non-locks too).
>
> The problem case I was thinking of was when guest VCPU would have issued
> HLT with interrupts disabled. I guess one option is to inject an NMI,
> and have the guest kernel NMI handler recognize this and make
> adjustments such that the vcpu avoids going back to HLT instruction.
>
Just kick vcpu out of a guest mode and adjust rip to point after HLT on
next re-entry. Don't forget to call vmx_clear_hlt().
> Having another hypercall to do yield/sleep (rather than effecting that
> via HLT) seems like an alternate clean solution here ..
>
> - vatsa
--
Gleb.
^ permalink raw reply
* Re: [RFC 2/3] vmscan hook
From: Minchan Kim @ 2012-01-17 9:13 UTC (permalink / raw)
To: KAMEZAWA Hiroyuki
Cc: linux-mm, LKML, leonid.moiseichuk, penberg, Rik van Riel, mel,
rientjes, KOSAKI Motohiro, Johannes Weiner, Marcelo Tosatti,
Andrew Morton, Ronen Hod
In-Reply-To: <20120117173932.1c058ba4.kamezawa.hiroyu@jp.fujitsu.com>
On Tue, Jan 17, 2012 at 05:39:32PM +0900, KAMEZAWA Hiroyuki wrote:
> On Tue, 17 Jan 2012 17:13:57 +0900
> Minchan Kim <minchan@kernel.org> wrote:
>
> > This patch insert memory pressure notify point into vmscan.c
> > Most problem in system slowness is swap-in. swap-in is a synchronous
> > opeartion so that it affects heavily system response.
> >
> > This patch alert it when reclaimer start to reclaim inactive anon list.
> > It seems rather earlier but not bad than too late.
> >
> > Other alert point is when there is few cache pages
> > In this implementation, if it is (cache < free pages),
> > memory pressure notify happens. It has to need more testing and tuning
> > or other hueristic. Any suggesion are welcome.
> >
> > Signed-off-by: Minchan Kim <minchan@kernel.org>
>
> In my 1st impression, isn't this too simple ?
I agree It's too simple. It would be good start point rather than
unnecessary complicated things.
>
>
> > ---
> > mm/vmscan.c | 28 ++++++++++++++++++++++++++++
> > 1 files changed, 28 insertions(+), 0 deletions(-)
> >
> > diff --git a/mm/vmscan.c b/mm/vmscan.c
> > index 2880396..cfa2e2d 100644
> > --- a/mm/vmscan.c
> > +++ b/mm/vmscan.c
> > @@ -43,6 +43,7 @@
> > #include <linux/sysctl.h>
> > #include <linux/oom.h>
> > #include <linux/prefetch.h>
> > +#include <linux/low_mem_notify.h>
> >
> > #include <asm/tlbflush.h>
> > #include <asm/div64.h>
> > @@ -2082,16 +2083,43 @@ static void shrink_mem_cgroup_zone(int priority, struct mem_cgroup_zone *mz,
> > {
> > unsigned long nr[NR_LRU_LISTS];
> > unsigned long nr_to_scan;
> > +
> > enum lru_list lru;
> > unsigned long nr_reclaimed, nr_scanned;
> > unsigned long nr_to_reclaim = sc->nr_to_reclaim;
> > struct blk_plug plug;
> > +#ifdef CONFIG_LOW_MEM_NOTIFY
> > + bool low_mem = false;
> > + unsigned long free, file;
> > +#endif
> >
> > restart:
> > nr_reclaimed = 0;
> > nr_scanned = sc->nr_scanned;
> > get_scan_count(mz, sc, nr, priority);
> > +#ifdef CONFIG_LOW_MEM_NOTIFY
> > + /* We want to avoid swapout */
> > + if (nr[LRU_INACTIVE_ANON])
> > + low_mem = true;
>
> IIUC, nr[LRU_INACTIVE_ANON] can be easily > 0.
Yes. But I thought it would be better than late notification.
Late notification ends up swap out which is a big concern about this patch.
More proper timing suggestion helps me a lot.
> And get_scan_count() now check per-memcg-lru. So, this only works when
> memcg is not used.
Hmm, I didn't look at recent memcg/global reclaim unify patch of Johannes.
I need time to look at it.
Thanks.
>
>
> > + /*
> > + * We want to avoid dropping page cache excessively
> > + * in no swap system
> > + */
> > + if (nr_swap_pages <= 0) {
> > + free = zone_page_state(mz->zone, NR_FREE_PAGES);
> > + file = zone_page_state(mz->zone, NR_ACTIVE_FILE) +
> > + zone_page_state(mz->zone, NR_INACTIVE_FILE);
> > + /*
> > + * If we have very few page cache pages,
> > + * notify to user
> > + */
> > + if (file < free)
> > + low_mem = true;
> > + }
>
> I can't understand why you think you can check lowmem condition by "file < free".
The reason I thought so is I want to maintain some page cache to some degree.
But I admit It's very naive heuristic and should be improved.
> And I don't think using per-zone data is good.
> (I'm not sure how many zones embeded guys using..)
Agree. In case of swapless system, we need another heuristic.
>
> Another idea:
> 1. can't we use some technique like cleancache to detect the condition ?
I totally forgot cleancache approach. Could you remind that?
> 2. can't we measure page-in/page-out distance by recording something ?
I can't understand your point. What's relation does it with swapout prevent?
> 3. NR_ANON + NR_FILE_MAPPED can't mean the amount of core memory if we can
> ignore the data file cache ?
It's good but how do we define some amount?
It's very vague but I guess we can get a good idea from that.
Perhaps, you already has it.
> 4. how about checking kswapd's busy status ?
Could you elaborate on your idea?
Kame, Thanks for reply,
>
>
>
> Thanks,
> -Kame
>
^ permalink raw reply
* Re: [RFC 2/3] vmscan hook
From: Minchan Kim @ 2012-01-17 9:13 UTC (permalink / raw)
To: KAMEZAWA Hiroyuki
Cc: linux-mm, LKML, leonid.moiseichuk, penberg, Rik van Riel, mel,
rientjes, KOSAKI Motohiro, Johannes Weiner, Marcelo Tosatti,
Andrew Morton, Ronen Hod
In-Reply-To: <20120117173932.1c058ba4.kamezawa.hiroyu@jp.fujitsu.com>
On Tue, Jan 17, 2012 at 05:39:32PM +0900, KAMEZAWA Hiroyuki wrote:
> On Tue, 17 Jan 2012 17:13:57 +0900
> Minchan Kim <minchan@kernel.org> wrote:
>
> > This patch insert memory pressure notify point into vmscan.c
> > Most problem in system slowness is swap-in. swap-in is a synchronous
> > opeartion so that it affects heavily system response.
> >
> > This patch alert it when reclaimer start to reclaim inactive anon list.
> > It seems rather earlier but not bad than too late.
> >
> > Other alert point is when there is few cache pages
> > In this implementation, if it is (cache < free pages),
> > memory pressure notify happens. It has to need more testing and tuning
> > or other hueristic. Any suggesion are welcome.
> >
> > Signed-off-by: Minchan Kim <minchan@kernel.org>
>
> In my 1st impression, isn't this too simple ?
I agree It's too simple. It would be good start point rather than
unnecessary complicated things.
>
>
> > ---
> > mm/vmscan.c | 28 ++++++++++++++++++++++++++++
> > 1 files changed, 28 insertions(+), 0 deletions(-)
> >
> > diff --git a/mm/vmscan.c b/mm/vmscan.c
> > index 2880396..cfa2e2d 100644
> > --- a/mm/vmscan.c
> > +++ b/mm/vmscan.c
> > @@ -43,6 +43,7 @@
> > #include <linux/sysctl.h>
> > #include <linux/oom.h>
> > #include <linux/prefetch.h>
> > +#include <linux/low_mem_notify.h>
> >
> > #include <asm/tlbflush.h>
> > #include <asm/div64.h>
> > @@ -2082,16 +2083,43 @@ static void shrink_mem_cgroup_zone(int priority, struct mem_cgroup_zone *mz,
> > {
> > unsigned long nr[NR_LRU_LISTS];
> > unsigned long nr_to_scan;
> > +
> > enum lru_list lru;
> > unsigned long nr_reclaimed, nr_scanned;
> > unsigned long nr_to_reclaim = sc->nr_to_reclaim;
> > struct blk_plug plug;
> > +#ifdef CONFIG_LOW_MEM_NOTIFY
> > + bool low_mem = false;
> > + unsigned long free, file;
> > +#endif
> >
> > restart:
> > nr_reclaimed = 0;
> > nr_scanned = sc->nr_scanned;
> > get_scan_count(mz, sc, nr, priority);
> > +#ifdef CONFIG_LOW_MEM_NOTIFY
> > + /* We want to avoid swapout */
> > + if (nr[LRU_INACTIVE_ANON])
> > + low_mem = true;
>
> IIUC, nr[LRU_INACTIVE_ANON] can be easily > 0.
Yes. But I thought it would be better than late notification.
Late notification ends up swap out which is a big concern about this patch.
More proper timing suggestion helps me a lot.
> And get_scan_count() now check per-memcg-lru. So, this only works when
> memcg is not used.
Hmm, I didn't look at recent memcg/global reclaim unify patch of Johannes.
I need time to look at it.
Thanks.
>
>
> > + /*
> > + * We want to avoid dropping page cache excessively
> > + * in no swap system
> > + */
> > + if (nr_swap_pages <= 0) {
> > + free = zone_page_state(mz->zone, NR_FREE_PAGES);
> > + file = zone_page_state(mz->zone, NR_ACTIVE_FILE) +
> > + zone_page_state(mz->zone, NR_INACTIVE_FILE);
> > + /*
> > + * If we have very few page cache pages,
> > + * notify to user
> > + */
> > + if (file < free)
> > + low_mem = true;
> > + }
>
> I can't understand why you think you can check lowmem condition by "file < free".
The reason I thought so is I want to maintain some page cache to some degree.
But I admit It's very naive heuristic and should be improved.
> And I don't think using per-zone data is good.
> (I'm not sure how many zones embeded guys using..)
Agree. In case of swapless system, we need another heuristic.
>
> Another idea:
> 1. can't we use some technique like cleancache to detect the condition ?
I totally forgot cleancache approach. Could you remind that?
> 2. can't we measure page-in/page-out distance by recording something ?
I can't understand your point. What's relation does it with swapout prevent?
> 3. NR_ANON + NR_FILE_MAPPED can't mean the amount of core memory if we can
> ignore the data file cache ?
It's good but how do we define some amount?
It's very vague but I guess we can get a good idea from that.
Perhaps, you already has it.
> 4. how about checking kswapd's busy status ?
Could you elaborate on your idea?
Kame, Thanks for reply,
>
>
>
> Thanks,
> -Kame
>
--
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^ permalink raw reply
* Re: RFC: Still TODO for 4.2?
From: Jan Beulich @ 2012-01-17 9:09 UTC (permalink / raw)
To: anthony.perard, Ian Campbell
Cc: Keir (Xen.org), Tim (Xen.org), xen-devel, Ian Jackson,
Stefano Stabellini
>>> On 16.01.12 at 14:39, Ian Campbell <Ian.Campbell@citrix.com> wrote:
> On Wed, 2012-01-04 at 16:55 +0000, Jan Beulich wrote:
>> >>> On 04.01.12 at 17:29, Ian Campbell <Ian.Campbell@citrix.com> wrote:
>> > What are the outstanding things to do before we think we can start on
>> > the 4.2 -rc's? Does anyone have a timetable in mind?
>> >
>> > hypervisor:
>> >
>> > * ??? - Keir, Tim, Jan?
>>
>> Apart from a few small things that I have on my todo list, the only
>> bigger one (at least from an possible impact perspective) is the
>> round-up of the closing of the security hole in MSI-X passthrough
>> (uniformly - i.e. even for Dom0 - disallowing write access to MSI-X
>> table pages), which I intended to do only once the upstream qemu
>> patch series also incorporates the respective recent qemu-xen
>> change.
>
> It sounds like this issue is a blocker for the release, whereas the
> upstream qemu support for pci passthrough is not necessarily. Has your
> precondition for inclusion been met yet or do we need to prod someone?
Just for reference, below the intended (trivial) change.
Jan
This continues to leave unaddressed the case where PV guests map the
MSI-X table page(s) before setting up the first MSI-X interrupt (see
the original c/s 22182:68cc3c514a0a description for options).
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -869,7 +869,7 @@ get_page_from_l1e(
return -EINVAL;
}
- if ( !(l1f & _PAGE_RW) || IS_PRIV(pg_owner) ||
+ if ( !(l1f & _PAGE_RW) ||
!rangeset_contains_singleton(mmio_ro_ranges, mfn) )
return 0;
dprintk(XENLOG_G_WARNING,
^ permalink raw reply
* [U-Boot] [PATCH 8/8 v2] powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
From: Liu Gang @ 2012-01-17 9:09 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1326791349-20458-1-git-send-email-Gang.Liu@freescale.com>
When boot from SRIO, slave's core can be in holdoff after powered on for
some specific requirements. Master can release the slave's core at the
right time by SRIO interface.
Master needs to:
1. Set outbound SRIO windows in order to configure slave's registers
for the core's releasing.
2. Check the SRIO port status when release slave core, if no errors,
will implement the process of the slave core's releasing.
Slave needs to:
1. Set all the cores in holdoff by RCW.
2. Be powered on before master's boot.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
Changes in v2:
- Subject changed to "powerpc/corenet_ds".
- Use "(void *)" instead of "(u32)" when calling "out_be32()".
- Use "NOR flash" instead of "Nor flash".
- Get rid of the base address + offset notation. Use C structs
instead.
- Get rid of hard coded magic numbers. Use macro instead.
- Use "debug()" instead of "printf()".
arch/powerpc/cpu/mpc85xx/cpu_init.c | 3 +
arch/powerpc/cpu/mpc8xxx/srio.c | 126 +++++++++++++++++++++++++++++++++++
arch/powerpc/include/asm/fsl_srio.h | 3 +
include/configs/corenet_ds.h | 4 +
4 files changed, 136 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 97a7fe1..2cd5db7 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -444,6 +444,9 @@ skip_l2:
srio_init();
#ifdef CONFIG_SRIOBOOT_MASTER
srio_boot_master();
+#ifdef CONFIG_SRIOBOOT_SLAVE_HOLDOFF
+ srio_boot_master_release_slave();
+#endif
#endif
#endif
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index 5694561..e132c69 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -25,6 +25,12 @@
#define SRIO_PORT_ACCEPT_ALL 0x10000001
#define SRIO_IB_ATMU_AR 0x80f55000
+#define SRIO_OB_ATMU_AR_MAINT 0x80077000
+#define SRIO_OB_ATMU_AR_RW 0x80045000
+#define SRIO_LCSBA1CSR_OFFSET 0x5c
+#define SRIO_MAINT_WIN_SIZE 0x1000000 /* 16M */
+#define SRIO_RW_WIN_SIZE 0x100000 /* 1M */
+#define SRIO_LCSBA1CSR 0x60000000
#if defined(CONFIG_FSL_CORENET)
#define _DEVDISR_SRIO1 FSL_CORENET_DEVDISR_SRIO1
@@ -168,4 +174,124 @@ void srio_boot_master(void)
SRIO_IB_ATMU_AR
| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_ENV_SIZE));
}
+
+#ifdef CONFIG_SRIOBOOT_SLAVE_HOLDOFF
+void srio_boot_master_release_slave(void)
+{
+ struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
+ u32 escsr;
+ u32 addr;
+ debug("SRIOBOOT - MASTER: "
+ "Check the port status and release slave core ...\n");
+
+ escsr = in_be32((void *)&srio->lp_serial
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].pescsr);
+ if (escsr & 0x2) {
+ if (escsr & 0x10100) {
+ debug("SRIOBOOT - MASTER: Port [ %d ] is error.\n",
+ CONFIG_SRIOBOOT_MASTER_PORT);
+ } else {
+ debug("SRIOBOOT - MASTER: "
+ "Port [ %d ] is ready, now release slave's core ...\n",
+ CONFIG_SRIOBOOT_MASTER_PORT);
+ /*
+ * configure outbound window
+ * with maintenance attribute to set slave's LCSBA1CSR
+ */
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[1].rowtar, 0);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[1].rowtear, 0);
+ if (CONFIG_SRIOBOOT_MASTER_PORT)
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[1].rowbar,
+ CONFIG_SYS_SRIO2_MEM_PHYS >> 12);
+ else
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[1].rowbar,
+ CONFIG_SYS_SRIO1_MEM_PHYS >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[1].rowar,
+ SRIO_OB_ATMU_AR_MAINT
+ | atmu_size_mask(SRIO_MAINT_WIN_SIZE));
+
+ /*
+ * configure outbound window
+ * with R/W attribute to set slave's BRR
+ */
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[2].rowtar,
+ SRIO_LCSBA1CSR >> 9);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[2].rowtear, 0);
+ if (CONFIG_SRIOBOOT_MASTER_PORT)
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[2].rowbar,
+ (CONFIG_SYS_SRIO2_MEM_PHYS
+ + SRIO_MAINT_WIN_SIZE) >> 12);
+ else
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[2].rowbar,
+ (CONFIG_SYS_SRIO1_MEM_PHYS
+ + SRIO_MAINT_WIN_SIZE) >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ .outbw[2].rowar,
+ SRIO_OB_ATMU_AR_RW
+ | atmu_size_mask(SRIO_RW_WIN_SIZE));
+
+ /*
+ * Set the LCSBA1CSR register in slave
+ * by the maint-outbound window
+ */
+ if (CONFIG_SRIOBOOT_MASTER_PORT) {
+ out_be32(CONFIG_SYS_SRIO2_MEM_VIRT
+ + SRIO_LCSBA1CSR_OFFSET,
+ SRIO_LCSBA1CSR);
+ while (in_be32(CONFIG_SYS_SRIO2_MEM_VIRT
+ + SRIO_LCSBA1CSR_OFFSET)
+ != SRIO_LCSBA1CSR)
+ ;
+ /*
+ * And then set the BRR register
+ * to release slave core
+ */
+ out_be32(CONFIG_SYS_SRIO2_MEM_VIRT
+ + SRIO_MAINT_WIN_SIZE
+ + CONFIG_SRIOBOOT_SLAVE_BRR_OFFSET,
+ CONFIG_SRIOBOOT_SLAVE_RELEASE_MASK);
+ } else {
+ out_be32(CONFIG_SYS_SRIO1_MEM_VIRT
+ + SRIO_LCSBA1CSR_OFFSET,
+ SRIO_LCSBA1CSR);
+ while (in_be32(CONFIG_SYS_SRIO1_MEM_VIRT
+ + SRIO_LCSBA1CSR_OFFSET)
+ != SRIO_LCSBA1CSR)
+ ;
+ /*
+ * And then set the BRR register
+ * to release slave core
+ */
+ out_be32(CONFIG_SYS_SRIO1_MEM_VIRT
+ + SRIO_MAINT_WIN_SIZE
+ + CONFIG_SRIOBOOT_SLAVE_BRR_OFFSET,
+ CONFIG_SRIOBOOT_SLAVE_RELEASE_MASK);
+ }
+ debug("SRIOBOOT - MASTER: "
+ "Release slave successfully! Now the slave should start up!\n");
+ }
+ } else
+ debug("SRIOBOOT - MASTER: Port [ %d ] is not ready.\n",
+ CONFIG_SRIOBOOT_MASTER_PORT);
+}
+#endif
#endif
diff --git a/arch/powerpc/include/asm/fsl_srio.h b/arch/powerpc/include/asm/fsl_srio.h
index e4cd9b6..a905a26 100644
--- a/arch/powerpc/include/asm/fsl_srio.h
+++ b/arch/powerpc/include/asm/fsl_srio.h
@@ -57,5 +57,8 @@ enum atmu_size {
extern void srio_init(void);
#ifdef CONFIG_SRIOBOOT_MASTER
extern void srio_boot_master(void);
+#ifdef CONFIG_SRIOBOOT_SLAVE_HOLDOFF
+extern void srio_boot_master_release_slave(void);
+#endif
#endif
#endif
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index fe53625..6344342 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -418,6 +418,10 @@
#define CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS 0xfef060000ull
#define CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS 0x3ffe20000ull
#define CONFIG_SRIOBOOT_SLAVE_ENV_SIZE 0x20000 /* 128K */
+/* slave core release by master*/
+#define CONFIG_SRIOBOOT_SLAVE_HOLDOFF
+#define CONFIG_SRIOBOOT_SLAVE_BRR_OFFSET 0xe00e4
+#define CONFIG_SRIOBOOT_SLAVE_RELEASE_MASK 0x00000001 /* release core 0 */
#endif
/*
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH 7/8 v2] powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
From: Liu Gang @ 2012-01-17 9:09 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1326791349-20458-1-git-send-email-Gang.Liu@freescale.com>
When boot from SRIO, slave's ENV can be stored in master's memory space,
then slave can fetch the ENV through SRIO interface.
NOTE: Because the slave can not erase, write master's NOR flash by SRIO
interface, so it can not modify the ENV parameters stored in
master's NOR flash using "saveenv" or other commands.
Master needs to:
1. Put the slave's ENV into it's own memory space.
2. Set an inbound SRIO window covered slave's ENV stored in master's
memory space.
Slave needs to:
1. Set a specific TLB entry in order to fetch ucode and ENV from master.
2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode and ENV.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
Changes in v2:
- Subject changed to "powerpc/corenet_ds".
- Update the README for "CONFIG_ENV_IS_IN_REMOTE".
- Use "(void *)" instead of "(u32)" when calling "out_be32()".
- Use "NOR flash" instead of "Nor flash".
- Get rid of the base address + offset notation. Use C structs
instead.
- Get rid of hard coded magic numbers. Use macro instead.
- Use "debug()" instead of "printf()".
- Some code styles changed.
README | 18 +++++++++
arch/powerpc/cpu/mpc8xxx/srio.c | 17 ++++++++
common/Makefile | 1 +
common/cmd_nvedit.c | 3 +-
common/env_remote.c | 79 +++++++++++++++++++++++++++++++++++++++
include/configs/corenet_ds.h | 13 ++++++
6 files changed, 130 insertions(+), 1 deletions(-)
create mode 100644 common/env_remote.c
diff --git a/README b/README
index f4f0d64..1b699c9 100644
--- a/README
+++ b/README
@@ -2917,6 +2917,24 @@ to save the current settings.
environment area within the total memory of your DataFlash placed
at the specified address.
+- CONFIG_ENV_IS_IN_REMOTE:
+
+ Define this if you have a remote memory space which you
+ want to use for the local device's environment.
+
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the address and size of the
+ environment area within the remote memory space. The
+ local device can get the environment from remote memory
+ space by SRIO or other links.
+
+BE CAREFUL! For some special cases, the local device can not use
+"saveenv" command. For example, the local device will get the
+environment stored in a remote NOR flash by SRIO link, but it can
+not erase, write this NOR flash by SRIO interface.
+
- CONFIG_ENV_IS_IN_NAND:
Define this if you have a NAND device which you want to use
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index e593f22..5694561 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -150,5 +150,22 @@ void srio_boot_master(void)
.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwar,
SRIO_IB_ATMU_AR
| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE));
+
+ /* configure inbound window for slave's ENV */
+ debug("SRIOBOOT - MASTER: Inbound window for slave's ENV; "
+ "Local = 0x%llx, Siro = 0x%llx, Size = 0x%x\n",
+ CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS,
+ CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS,
+ CONFIG_SRIOBOOT_SLAVE_ENV_SIZE);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwar,
+ SRIO_IB_ATMU_AR
+ | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_ENV_SIZE));
}
#endif
diff --git a/common/Makefile b/common/Makefile
index 2d9ae8c..bd9e8a3 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -58,6 +58,7 @@ COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o
COBJS-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
COBJS-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
+COBJS-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o
COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
# command
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 63afc82..c2fd8fa 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -65,9 +65,10 @@ DECLARE_GLOBAL_DATA_PTR;
!defined(CONFIG_ENV_IS_IN_NVRAM) && \
!defined(CONFIG_ENV_IS_IN_ONENAND) && \
!defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \
+ !defined(CONFIG_ENV_IS_IN_REMOTE) && \
!defined(CONFIG_ENV_IS_NOWHERE)
# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\
-SPI_FLASH|MG_DISK|NVRAM|MMC} or CONFIG_ENV_IS_NOWHERE
+SPI_FLASH|MG_DISK|NVRAM|MMC|REMOTE} or CONFIG_ENV_IS_NOWHERE
#endif
#define XMK_STR(x) #x
diff --git a/common/env_remote.c b/common/env_remote.c
new file mode 100644
index 0000000..3bf0f95
--- /dev/null
+++ b/common/env_remote.c
@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* #define DEBUG */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+
+char *env_name_spec = "Remote";
+
+#ifdef ENV_IS_EMBEDDED
+env_t *env_ptr = &environment;
+#else /* ! ENV_IS_EMBEDDED */
+env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
+#endif /* ENV_IS_EMBEDDED */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if !defined(CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET 0
+#endif
+
+uchar env_get_char_spec(int index)
+{
+ return *((uchar *)(gd->env_addr + index));
+}
+
+int env_init(void)
+{
+ if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
+ gd->env_addr = (ulong)&(env_ptr->data);
+ gd->env_valid = 1;
+ return 0;
+ }
+
+ gd->env_addr = (ulong)default_environment;
+ gd->env_valid = 0;
+ return 0;
+}
+
+#ifdef CONFIG_CMD_SAVEENV
+int saveenv(void)
+{
+#ifdef CONFIG_SRIOBOOT_SLAVE
+ printf("Can not support the 'saveenv' when boot from SRIO!\n");
+ return 1;
+#else
+ return 0;
+#endif
+}
+#endif /* CONFIG_CMD_SAVEENV */
+
+void env_relocate_spec(void)
+{
+#ifndef ENV_IS_EMBEDDED
+ env_import((char *)env_ptr, 1);
+#endif
+}
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 6bc1276..fe53625 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -77,7 +77,9 @@
#define CONFIG_ENV_OVERWRITE
#ifdef CONFIG_SYS_NO_FLASH
+#ifndef CONFIG_SRIOBOOT_SLAVE
#define CONFIG_ENV_IS_NOWHERE
+#endif
#else
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
@@ -105,6 +107,10 @@
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#elif defined(CONFIG_SRIOBOOT_SLAVE)
+#define CONFIG_ENV_IS_IN_REMOTE
+#define CONFIG_ENV_ADDR 0xffe20000
+#define CONFIG_ENV_SIZE 0x2000
#elif defined(CONFIG_ENV_IS_NOWHERE)
#define CONFIG_ENV_SIZE 0x2000
#else
@@ -405,6 +411,13 @@
#define CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS 0xfef020000ull
#define CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS 0x3ffe00000ull
#define CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE 0x10000 /* 64K */
+/*
+ * for slave ENV instored in master memory space,
+ * PHYS must be aligned based on the SIZE
+ */
+#define CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS 0xfef060000ull
+#define CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS 0x3ffe20000ull
+#define CONFIG_SRIOBOOT_SLAVE_ENV_SIZE 0x20000 /* 128K */
#endif
/*
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH 6/8 v2] powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
From: Liu Gang @ 2012-01-17 9:09 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1326791349-20458-1-git-send-email-Gang.Liu@freescale.com>
When boot from SRIO, slave's ucode can be stored in master's memory space,
then slave can fetch the ucode image through SRIO interface. For the
corenet platform, ucode is for Fman.
Master needs to:
1. Put the slave's ucode image into it's own memory space.
2. Set an inbound SRIO window covered slave's ucode stored in master's
memory space.
Slave needs to:
1. Set a specific TLB entry in order to fetch ucode from master.
2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
Changes in v2:
- Subject changed to "powerpc/corenet_ds".
- Use "(void *)" instead of "(u32)" when calling "out_be32()".
- Use "NOR flash" instead of "Nor flash".
- Get rid of the base address + offset notation. Use C structs
instead.
- Get rid of hard coded magic numbers. Use macro instead.
- Use "debug()" instead of "printf()".
- Correct some comment style errors.
arch/powerpc/cpu/mpc8xxx/srio.c | 25 +++++++++++++++++++++----
board/freescale/common/p_corenet/law.c | 4 ++++
board/freescale/common/p_corenet/tlb.c | 10 ++++++++++
include/configs/corenet_ds.h | 12 +++++++++++-
4 files changed, 46 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index 77fa32f..e593f22 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -100,8 +100,8 @@ void srio_boot_master(void)
debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
CONFIG_SRIOBOOT_MASTER_PORT);
- /* configure inbound window5 for slave's u-boot image */
- debug("SRIOBOOT - MASTER: Inbound window 5 for slave's image; "
+ /* configure inbound window for slave's u-boot image */
+ debug("SRIOBOOT - MASTER: Inbound window for slave's image; "
"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
@@ -117,8 +117,8 @@ void srio_boot_master(void)
SRIO_IB_ATMU_AR
| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
- /* configure inbound window4 for slave's u-boot image */
- debug("SRIOBOOT - MASTER: Inbound window 4 for slave's image; "
+ /* configure inbound window for slave's u-boot image */
+ debug("SRIOBOOT - MASTER: Inbound window for slave's image; "
"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
@@ -133,5 +133,22 @@ void srio_boot_master(void)
.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwar,
SRIO_IB_ATMU_AR
| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
+
+ /* configure inbound window for slave's ucode */
+ debug("SRIOBOOT - MASTER: Inbound window for slave's ucode; "
+ "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
+ (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS,
+ (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwar,
+ SRIO_IB_ATMU_AR
+ | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE));
}
#endif
diff --git a/board/freescale/common/p_corenet/law.c b/board/freescale/common/p_corenet/law.c
index 1fbab4d..c4566dd 100644
--- a/board/freescale/common/p_corenet/law.c
+++ b/board/freescale/common/p_corenet/law.c
@@ -52,9 +52,13 @@ struct law_entry law_table[] = {
#if defined(CONFIG_SRIOBOOT_SLAVE_PORT0)
SET_LAW(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
LAW_SIZE_1M, LAW_TRGT_IF_RIO_1),
+ SET_LAW(CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS,
+ LAW_SIZE_1M, LAW_TRGT_IF_RIO_1),
#elif defined(CONFIG_SRIOBOOT_SLAVE_PORT1)
SET_LAW(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
LAW_SIZE_1M, LAW_TRGT_IF_RIO_2),
+ SET_LAW(CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS,
+ LAW_SIZE_1M, LAW_TRGT_IF_RIO_2),
#endif
#endif
};
diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c
index a8c8b3c..6bb4c3f 100644
--- a/board/freescale/common/p_corenet/tlb.c
+++ b/board/freescale/common/p_corenet/tlb.c
@@ -147,6 +147,16 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 16, BOOKE_PAGESZ_1M, 1),
#endif
+#ifdef CONFIG_SRIOBOOT_SLAVE
+ /*
+ * *I*G - SRIOBOOT-SLAVE. 1M space from 0xffe00000 for fetching ucode
+ * and ENV from master
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR,
+ CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 17, BOOKE_PAGESZ_1M, 1),
+#endif
};
int num_tlb_entries = ARRAY_SIZE(tlb_table);
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index cc65ce5..6bc1276 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -398,6 +398,13 @@
#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE 0x80000 /* 512K */
#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 0xfef080000ull
#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 0x3fff80000ull
+/*
+ * for slave UCODE instored in master memory space,
+ * PHYS must be aligned based on the SIZE
+ */
+#define CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS 0xfef020000ull
+#define CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS 0x3ffe00000ull
+#define CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE 0x10000 /* 64K */
#endif
/*
@@ -407,6 +414,9 @@
/* slave port for srioboot */
#define CONFIG_SRIOBOOT_SLAVE_PORT0
/* #define CONFIG_SRIOBOOT_SLAVE_PORT1 */
+#define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR 0xFFE00000
+#define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS \
+ (0x300000000ull | CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR)
#endif
/*
@@ -538,7 +548,7 @@
* the ucode address in master's NOR flash.
*/
#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
-#define CONFIG_SYS_QE_FMAN_FW_ADDR NULL
+#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000
#else
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH 5/8 v2] powerpc/corenet_ds: Slave module for boot from SRIO
From: Liu Gang @ 2012-01-17 9:09 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1326791349-20458-1-git-send-email-Gang.Liu@freescale.com>
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.
The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.
5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode
locally.
For the slave module, need to finish these processes:
1. Set the boot location to SRIO1 or SRIO2 by RCW.
2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot.
4. Slave's u-boot image should be generated specifically by
make xxxx_SRIOBOOT_SLAVE_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
Changes in v2:
- Subject changed to "powerpc/corenet_ds".
- Use "(void *)" instead of "(u32)" when calling "out_be32()".
- Use "NOR flash" instead of "Nor flash".
- Get rid of the base address + offset notation. Use C structs
instead.
- Get rid of hard coded magic numbers. Use macro instead.
- Use "debug()" instead of "printf()".
- Add the description for CONFIG_SYS_QE_FMAN_FW_IN_REMOTE and also
update the README for this.
README | 6 ++++++
board/freescale/common/p_corenet/law.c | 9 +++++++++
board/freescale/common/p_corenet/tlb.c | 9 +++++++++
boards.cfg | 3 +++
drivers/net/fm/fm.c | 2 ++
include/configs/corenet_ds.h | 28 ++++++++++++++++++++++++++++
6 files changed, 57 insertions(+), 0 deletions(-)
diff --git a/README b/README
index 9d713e8..f4f0d64 100644
--- a/README
+++ b/README
@@ -3358,6 +3358,12 @@ within that device.
Specifies that QE/FMAN firmware is located on the primary SPI
device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
+ Specifies that QE/FMAN firmware is located in the remote (master)
+ memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
+ can be mapped from slave TLB->slave LAW->slave SRIO outbound window
+ ->master inbound window->master LAW->the ucode address in master's
+ NOR flash.
Building the Software:
======================
diff --git a/board/freescale/common/p_corenet/law.c b/board/freescale/common/p_corenet/law.c
index 09ef561..1fbab4d 100644
--- a/board/freescale/common/p_corenet/law.c
+++ b/board/freescale/common/p_corenet/law.c
@@ -48,6 +48,15 @@ struct law_entry law_table[] = {
#ifdef CONFIG_SYS_NAND_BASE_PHYS
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
#endif
+#ifdef CONFIG_SRIOBOOT_SLAVE
+#if defined(CONFIG_SRIOBOOT_SLAVE_PORT0)
+ SET_LAW(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
+ LAW_SIZE_1M, LAW_TRGT_IF_RIO_1),
+#elif defined(CONFIG_SRIOBOOT_SLAVE_PORT1)
+ SET_LAW(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
+ LAW_SIZE_1M, LAW_TRGT_IF_RIO_2),
+#endif
+#endif
};
int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c
index 6a0026a..a8c8b3c 100644
--- a/board/freescale/common/p_corenet/tlb.c
+++ b/board/freescale/common/p_corenet/tlb.c
@@ -66,6 +66,15 @@ struct fsl_e_tlb_entry tlb_table[] = {
SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 0, BOOKE_PAGESZ_1M, 1),
+#elif defined(CONFIG_SRIOBOOT_SLAVE)
+ /*
+ * SRIOBOOT-SLAVE. When slave boot, the address of the
+ * space is at 0xfff00000, it covered the 0xfffff000.
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_SRIOBOOT_SLAVE_ADDR,
+ CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
+ 0, 0, BOOKE_PAGESZ_1M, 1),
#else
SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
diff --git a/boards.cfg b/boards.cfg
index 446f0eb..798466e 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -741,6 +741,7 @@ P3041DS_SDCARD powerpc mpc85xx corenet_ds freescale
P3041DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P3041DS:SECURE_BOOT
P3041DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
P3041DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P3041DS:SRIOBOOT_MASTER
+P3041DS_SRIOBOOT_SLAVE powerpc mpc85xx corenet_ds freescale - P3041DS:SRIOBOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000
P3060QDS powerpc mpc85xx p3060qds freescale
P3060QDS_NAND powerpc mpc85xx p3060qds freescale - P3060QDS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
P3060QDS_SECURE_BOOT powerpc mpc85xx p3060qds freescale - P3060QDS:SECURE_BOOT
@@ -749,12 +750,14 @@ P4080DS_SDCARD powerpc mpc85xx corenet_ds freescale
P4080DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P4080DS:SECURE_BOOT
P4080DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
P4080DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P4080DS:SRIOBOOT_MASTER
+P4080DS_SRIOBOOT_SLAVE powerpc mpc85xx corenet_ds freescale - P4080DS:SRIOBOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000
P5020DS powerpc mpc85xx corenet_ds freescale
P5020DS_NAND powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
P5020DS_SDCARD powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P5020DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P5020DS:SECURE_BOOT
P5020DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
P5020DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P5020DS:SRIOBOOT_MASTER
+P5020DS_SRIOBOOT_SLAVE powerpc mpc85xx corenet_ds freescale - P5020DS:SRIOBOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000
stxgp3 powerpc mpc85xx stxgp3 stx
stxssa powerpc mpc85xx stxssa stx - stxssa
stxssa_4M powerpc mpc85xx stxssa stx - stxssa:STXSSA_4M
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 0b8c33f..49c74c2 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -408,6 +408,8 @@ int fm_init_common(int index, struct ccsr_fman *reg)
/* flush cache after read */
flush_cache((ulong)addr, cnt * 512);
}
+#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_REMOTE)
+ void *addr = (void *)CONFIG_SYS_QE_FMAN_FW_ADDR;
#endif
/* Upload the Fman microcode if it's present */
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 256d0f5..cc65ce5 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -33,6 +33,15 @@
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#endif
+#ifdef CONFIG_SRIOBOOT_SLAVE
+/* Set 1M boot space */
+#define CONFIG_SYS_SRIOBOOT_SLAVE_ADDR CONFIG_SYS_TEXT_BASE & 0xfff00000
+#define CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS \
+ (0x300000000ull | CONFIG_SYS_SRIOBOOT_SLAVE_ADDR)
+#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
+#define CONFIG_SYS_NO_FLASH
+#endif
+
/* High Level Configuration Options */
#define CONFIG_BOOKE
#define CONFIG_E500 /* BOOKE e500 family */
@@ -392,6 +401,15 @@
#endif
/*
+ * SRIOBOOT - SLAVE
+ */
+#ifdef CONFIG_SRIOBOOT_SLAVE
+/* slave port for srioboot */
+#define CONFIG_SRIOBOOT_SLAVE_PORT0
+/* #define CONFIG_SRIOBOOT_SLAVE_PORT1 */
+#endif
+
+/*
* eSPI - Enhanced SPI
*/
#define CONFIG_FSL_ESPI
@@ -511,6 +529,16 @@
#elif defined(CONFIG_NAND)
#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#elif defined(CONFIG_SRIOBOOT_SLAVE)
+/*
+ * Slave has no ucode locally, it can fetch this from remote. When implementing
+ * in two corenet boards, slave's ucode could be stored in master's memory
+ * space, the address can be mapped from slave TLB->slave LAW->
+ * slave SRIO outbound window->master inbound window->master LAW->
+ * the ucode address in master's NOR flash.
+ */
+#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
+#define CONFIG_SYS_QE_FMAN_FW_ADDR NULL
#else
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH 4/8 v2] powerpc/corenet_ds: Master module for boot from SRIO
From: Liu Gang @ 2012-01-17 9:09 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1326791349-20458-1-git-send-email-Gang.Liu@freescale.com>
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.
The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.
For the master module, need to finish these processes:
1. Initialize the SRIO port and address space.
2. Set inbound SRIO windows covered slave's u-boot image stored in
master's NOR flash.
3. Master's u-boot image should be generated specifically by
make xxxx_SRIOBOOT_MASTER_config
4. Master must boot first, and then slave can be powered on.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
Changes in v2:
- Subject changed to "powerpc/corenet_ds".
- Use "(void *)" instead of "(u32)" when calling "out_be32()".
- Use "NOR flash" instead of "Nor flash".
- Get rid of the base address + offset notation. Use C structs
instead.
- Get rid of hard coded magic numbers. Use macro instead.
- Use "debug()" instead of "printf()".
arch/powerpc/cpu/mpc85xx/cpu_init.c | 6 ++-
arch/powerpc/cpu/mpc8xxx/srio.c | 51 +++++++++++++++++++++++++++
arch/powerpc/include/asm/fsl_srio.h | 61 +++++++++++++++++++++++++++++++++
arch/powerpc/include/asm/immap_85xx.h | 3 ++
boards.cfg | 3 ++
include/configs/corenet_ds.h | 18 ++++++++++
6 files changed, 140 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/include/asm/fsl_srio.h
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2e4a06c..97a7fe1 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -37,6 +37,7 @@
#include <asm/mmu.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
+#include <asm/fsl_srio.h>
#include <linux/compiler.h>
#include "mp.h"
#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
@@ -48,8 +49,6 @@
DECLARE_GLOBAL_DATA_PTR;
-extern void srio_init(void);
-
#ifdef CONFIG_QE
extern qe_iop_conf_t qe_iop_conf_tab[];
extern void qe_config_iopin(u8 port, u8 pin, int dir,
@@ -443,6 +442,9 @@ skip_l2:
#ifdef CONFIG_SYS_SRIO
srio_init();
+#ifdef CONFIG_SRIOBOOT_MASTER
+ srio_boot_master();
+#endif
#endif
#if defined(CONFIG_MP)
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index e46d328..77fa32f 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -21,6 +21,10 @@
#include <config.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
+#include <asm/fsl_srio.h>
+
+#define SRIO_PORT_ACCEPT_ALL 0x10000001
+#define SRIO_IB_ATMU_AR 0x80f55000
#if defined(CONFIG_FSL_CORENET)
#define _DEVDISR_SRIO1 FSL_CORENET_DEVDISR_SRIO1
@@ -84,3 +88,50 @@ void srio_init(void)
setbits_be32(&gur->devdisr, _DEVDISR_RMU);
}
}
+
+#ifdef CONFIG_SRIOBOOT_MASTER
+void srio_boot_master(void)
+{
+ struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
+
+ /* set port accept-all */
+ out_be32((void *)&srio->impl.port[CONFIG_SRIOBOOT_MASTER_PORT].ptaacr,
+ SRIO_PORT_ACCEPT_ALL);
+
+ debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
+ CONFIG_SRIOBOOT_MASTER_PORT);
+ /* configure inbound window5 for slave's u-boot image */
+ debug("SRIOBOOT - MASTER: Inbound window 5 for slave's image; "
+ "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwar,
+ SRIO_IB_ATMU_AR
+ | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
+
+ /* configure inbound window4 for slave's u-boot image */
+ debug("SRIOBOOT - MASTER: Inbound window 4 for slave's image; "
+ "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 >> 12);
+ out_be32((void *)&srio->atmu
+ .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwar,
+ SRIO_IB_ATMU_AR
+ | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
+}
+#endif
diff --git a/arch/powerpc/include/asm/fsl_srio.h b/arch/powerpc/include/asm/fsl_srio.h
new file mode 100644
index 0000000..e4cd9b6
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_srio.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _FSL_SRIO_H_
+#define _FSL_SRIO_H_
+
+enum atmu_size {
+ ATMU_SIZE_4K = 0xb,
+ ATMU_SIZE_8K,
+ ATMU_SIZE_16K,
+ ATMU_SIZE_32K,
+ ATMU_SIZE_64K,
+ ATMU_SIZE_128K,
+ ATMU_SIZE_256K,
+ ATMU_SIZE_512K,
+ ATMU_SIZE_1M,
+ ATMU_SIZE_2M,
+ ATMU_SIZE_4M,
+ ATMU_SIZE_8M,
+ ATMU_SIZE_16M,
+ ATMU_SIZE_32M,
+ ATMU_SIZE_64M,
+ ATMU_SIZE_128M,
+ ATMU_SIZE_256M,
+ ATMU_SIZE_512M,
+ ATMU_SIZE_1G,
+ ATMU_SIZE_2G,
+ ATMU_SIZE_4G,
+ ATMU_SIZE_8G,
+ ATMU_SIZE_16G,
+ ATMU_SIZE_32G,
+ ATMU_SIZE_64G,
+};
+
+#define atmu_size_mask(sz) (__ilog2_u64(sz) - 1)
+#define atmu_size_bytes(x) (1ULL << ((x & 0x3f) + 1))
+
+extern void srio_init(void);
+#ifdef CONFIG_SRIOBOOT_MASTER
+extern void srio_boot_master(void);
+#endif
+#endif
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index a65fc1c..b073bd6 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2506,6 +2506,7 @@ struct ccsr_rman {
#define CONFIG_SYS_MPC85xx_PIC_OFFSET 0x40000
#define CONFIG_SYS_MPC85xx_GUTS_OFFSET 0xE0000
+#define CONFIG_SYS_FSL_SRIO_OFFSET 0xC0000
#define CONFIG_SYS_FSL_CPC_ADDR \
(CONFIG_SYS_CCSRBAR + CONFIG_SYS_FSL_CPC_OFFSET)
@@ -2579,6 +2580,8 @@ struct ccsr_rman {
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET)
#define CONFIG_SYS_FSL_FM2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM2_OFFSET)
+#define CONFIG_SYS_FSL_SRIO_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SRIO_OFFSET)
#define CONFIG_SYS_PCI1_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCI1_OFFSET)
diff --git a/boards.cfg b/boards.cfg
index 576b392..446f0eb 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -740,6 +740,7 @@ P3041DS_NAND powerpc mpc85xx corenet_ds freescale -
P3041DS_SDCARD powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P3041DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P3041DS:SECURE_BOOT
P3041DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+P3041DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P3041DS:SRIOBOOT_MASTER
P3060QDS powerpc mpc85xx p3060qds freescale
P3060QDS_NAND powerpc mpc85xx p3060qds freescale - P3060QDS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
P3060QDS_SECURE_BOOT powerpc mpc85xx p3060qds freescale - P3060QDS:SECURE_BOOT
@@ -747,11 +748,13 @@ P4080DS powerpc mpc85xx corenet_ds freesca
P4080DS_SDCARD powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P4080DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P4080DS:SECURE_BOOT
P4080DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+P4080DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P4080DS:SRIOBOOT_MASTER
P5020DS powerpc mpc85xx corenet_ds freescale
P5020DS_NAND powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
P5020DS_SDCARD powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P5020DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P5020DS:SECURE_BOOT
P5020DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+P5020DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P5020DS:SRIOBOOT_MASTER
stxgp3 powerpc mpc85xx stxgp3 stx
stxssa powerpc mpc85xx stxssa stx - stxssa
stxssa_4M powerpc mpc85xx stxssa stx - stxssa:STXSSA_4M
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index e38f69d..256d0f5 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -374,6 +374,24 @@
#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */
/*
+ * SRIOBOOT - MASTER
+ */
+#ifdef CONFIG_SRIOBOOT_MASTER
+/* master port for srioboot*/
+#define CONFIG_SRIOBOOT_MASTER_PORT 0
+/* #define CONFIG_SRIOBOOT_MASTER_PORT 1 */
+/*
+ * for slave u-boot IMAGE instored in master memory space,
+ * PHYS must be aligned based on the SIZE
+ */
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 0xfef080000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 0xfff80000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE 0x80000 /* 512K */
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 0xfef080000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 0x3fff80000ull
+#endif
+
+/*
* eSPI - Enhanced SPI
*/
#define CONFIG_FSL_ESPI
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH 3/8 v2] powerpc/corenet_ds: Document for the boot from SRIO
From: Liu Gang @ 2012-01-17 9:09 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1326791349-20458-1-git-send-email-Gang.Liu@freescale.com>
This document describes the implementation of the boot from SRIO,
includes the introduction of envionment, an example based on P4080DS
platform, an example of the slave's RCW, and the description about
how to use this feature.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
Changes in v2:
- Subject changed to "powerpc/corenet_ds".
- Change the name of the document for "corenet" platform.
doc/README.srio-boot-corenet | 103 ++++++++++++++++++++++++++++++++++++++++++
1 files changed, 103 insertions(+), 0 deletions(-)
create mode 100644 doc/README.srio-boot-corenet
diff --git a/doc/README.srio-boot-corenet b/doc/README.srio-boot-corenet
new file mode 100644
index 0000000..56b094c
--- /dev/null
+++ b/doc/README.srio-boot-corenet
@@ -0,0 +1,103 @@
+------------------------------
+SRIO Boot on Corenet Platforms
+------------------------------
+
+For some PowerPC processors with SRIO interface, boot location can be configured
+to SRIO by RCW. The processor booting from SRIO can do without flash for u-boot
+image, ucode and ENV. All the images can be fetched from another processor's
+memory space by SRIO link connected between them.
+
+This document describes the processes based on an example implemented on P4080DS
+platforms and a RCW example with boot from SRIO configuration.
+
+Environment of the SRIO boot:
+ a) Master and slave can be SOCs in one board or SOCs in separate boards.
+ b) They are connected with SRIO links, whether 1x or 4x, and directly or
+ through switch system.
+ c) Only Master has NorFlash for booting, and all the Master's and Slave's
+ U-Boot images, UCodes will be stored in this flash.
+ d) Slave has its own EEPROM for RCW and PBI.
+ e) Slave's RCW should configure the SerDes for SRIO boot port, set the boot
+ location to SRIO, and holdoff all the cores if needed.
+
+ ---------- ----------- -----------
+ | | | | | |
+ | | | | | |
+ | NorFlash|<----->| Master | SRIO | Slave |<---->[EEPROM]
+ | | | |<===========>| |
+ | | | | | |
+ ---------- ----------- -----------
+
+The example based on P4080DS platform:
+ Two P4080DS platforms can be used to implement the boot from SRIO. Their SRIO
+ ports 0 will be connected directly and will be used for the boot from SRIO.
+
+ 1. Slave's RCW example for boot from SRIO port 0 and core 0 not in holdoff.
+ 00000000: aa55 aa55 010e 0100 0c58 0000 0000 0000
+ 00000010: 1818 1818 0000 8888 7440 4000 0000 2000
+ 00000020: f400 0000 0100 0000 0000 0000 0000 0000
+ 00000030: 0000 0000 0083 0000 0000 0000 0000 0000
+ 00000040: 0000 0000 0000 0000 0813 8040 698b 93fe
+
+ 2. Slave's RCW example for boot from SRIO port 0 and all cores in holdoff.
+ 00000000: aa55 aa55 010e 0100 0c58 0000 0000 0000
+ 00000010: 1818 1818 0000 8888 7440 4000 0000 2000
+ 00000020: f440 0000 0100 0000 0000 0000 0000 0000
+ 00000030: 0000 0000 0083 0000 0000 0000 0000 0000
+ 00000040: 0000 0000 0000 0000 0813 8040 063c 778f
+
+ 3. Sequence in Step by Step.
+ a) Update RCW for slave with boot from SRIO port 0 configuration.
+ b) Program slave's U-Boot image, UCode, and ENV parameters into master's
+ NorFlash.
+ c) Start up master and it will boot up normally from its NorFlash.
+ Then, it will finish necessary configurations for slave's boot from
+ SRIO port 0.
+ d) Master will set inbound SRIO windows covered slave's U-Boot image stored
+ in master's NorFlash.
+ e) Master will set an inbound SRIO window covered slave's UCode stored in
+ master's NorFlash.
+ f) Master will set an inbound SRIO window covered slave's ENV stored in
+ master's NorFlash.
+ g) If need to release slave's core, master will set outbound SRIO windows
+ in order to configure slave's registers for the core's releasing.
+ h) If all cores of slave in holdoff, slave should be powered on before all
+ the above master's steps, and wait to be released by master. If not all
+ cores in holdoff, that means core 0 will start up normally, slave should
+ be powered on after all the above master's steps. In the startup phase
+ of the slave from SRIO, it will finish some necessary configurations.
+ i) Slave will set a specific TLB entry for the boot process.
+ j) Slave will set a LAW entry with the TargetID SRIO port 0 for the boot.
+ k) Slave will set a specific TLB entry in order to fetch UCode and ENV
+ from master.
+ l) Slave will set a LAW entry with the TargetID SRIO port 0 for UCode and ENV.
+
+How to use this feature:
+ To use this feature, you need to focus three points.
+
+ 1. Slave's RCW with SRIO boot configurations, and all cores in holdoff
+ configurations if needed.
+ Please refer to the examples given above.
+
+ 2. U-Boot image's compilation.
+ For master, U-Boot image should be generated specifically by
+
+ make xxxx_SRIOBOOT_MASTER_config.
+
+ For example, master U-Boot image used on P4080DS should be compiled with
+
+ make P4080DS_SRIOBOOT_MASTER_config.
+
+ For slave, U-Boot image should be generated specifically by
+
+ make xxxx_SRIOBOOT_SLAVE_config.
+
+ For example, slave U-Boot image used on P4080DS should be compiled with
+
+ make P4080DS_SRIOBOOT_SLAVE_config.
+
+ 3. Necessary modifications based on a specific environment.
+ For a specific environment, the SRIO port for boot, the addresses of the
+ slave's U-Boot image, UCode, ENV stored in master's NorFlash, and any other
+ configurations can be modified in the file:
+ include/configs/corenet_ds.h.
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH 2/8 v2] powerpc/corenet_ds: Correct the compilation errors about ENV
From: Liu Gang @ 2012-01-17 9:09 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1326791349-20458-1-git-send-email-Gang.Liu@freescale.com>
When defined CONFIG_ENV_IS_NOWHERE, there will be some
compilation errors:
./common/env_nowhere.o: In function `env_relocate_spec':
./common/env_nowhere.c:38: multiple definition of `env_relocate_spec'
./common/env_flash.o: ./common/env_flash.c:326: first defined here
./common/env_nowhere.o: In function `env_get_char_spec':
./common/env_nowhere.c:42: multiple definition of `env_get_char_spec'
./common/env_flash.o:./common/env_flash.c:78: first defined here
./common/env_nowhere.o: In function `env_init':
./common/env_nowhere.c:51: multiple definition of `env_init'
./common/env_flash.o:./common/env_flash.c:237: first defined here
make[1]: *** [./common/libcommon.o] Error 1
make[1]: Leaving directory `./common'
make: *** [./common/libcommon.o] Error 2
Remove the CONFIG_ENV_IS_IN_FLASH if defined CONFIG_ENV_IS_NOWHERE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
Changes in v2:
- Subject changed to "powerpc/corenet_ds".
- Change the commit message more clearly.
include/configs/corenet_ds.h | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 7925b95..e38f69d 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -96,6 +96,8 @@
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#elif defined(CONFIG_ENV_IS_NOWHERE)
+#define CONFIG_ENV_SIZE 0x2000
#else
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH 1/8 v2] powerpc/srio: Rewrite the struct ccsr_rio
From: Liu Gang @ 2012-01-17 9:09 UTC (permalink / raw)
To: u-boot
Rewrite this struct for the support of two ports and two message
units registers.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
Changes in v2:
- Change the subject and commit message.
- Remove the offsets in the comments.
- Rewrite the struct for the support of two ports
and two message units registers.
arch/powerpc/include/asm/immap_85xx.h | 383 +++++++++++++++++++--------------
1 files changed, 223 insertions(+), 160 deletions(-)
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 9b08cb8..a65fc1c 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1353,171 +1353,234 @@ typedef struct ccsr_cpm {
} ccsr_cpm_t;
#endif
-/* RapidIO Registers */
-typedef struct ccsr_rio {
- u32 didcar; /* Device Identity Capability */
- u32 dicar; /* Device Information Capability */
- u32 aidcar; /* Assembly Identity Capability */
- u32 aicar; /* Assembly Information Capability */
- u32 pefcar; /* Processing Element Features Capability */
- u32 spicar; /* Switch Port Information Capability */
- u32 socar; /* Source Operations Capability */
- u32 docar; /* Destination Operations Capability */
+#define SRIO_PORT_MAX_NUM 2 /* SRIO port max number */
+#define SRIO_OB_WIN_NUM 9 /* SRIO outbound window number */
+#define SRIO_IB_WIN_NUM 5 /* SRIO inbound window number */
+#define SRIO_MSG_UNIT_NUM 2 /* SRIO message unit number */
+
+/* Architectural regsiters */
+struct rio_arch {
+ u32 didcar; /* Device Identity CAR */
+ u32 dicar; /* Device Information CAR */
+ u32 aidcar; /* Assembly Identity CAR */
+ u32 aicar; /* Assembly Information CAR */
+ u32 pefcar; /* Processing Element Features CAR */
+ u8 res0[4];
+ u32 socar; /* Source Operations CAR */
+ u32 docar; /* Destination Operations CAR */
u8 res1[32];
- u32 msr; /* Mailbox Cmd And Status */
- u32 pwdcsr; /* Port-Write & Doorbell Cmd And Status */
+ u32 mcsr; /* Mailbox CSR */
+ u32 pwdcsr; /* Port-Write and Doorbell CSR */
u8 res2[4];
u32 pellccsr; /* Processing Element Logic Layer CCSR */
u8 res3[12];
- u32 lcsbacsr; /* Local Cfg Space Base Addr Cmd & Status */
- u32 bdidcsr; /* Base Device ID Cmd & Status */
+ u32 lcsbacsr; /* Local Configuration Space BACSR */
+ u32 bdidcsr; /* Base Device ID CSR */
u8 res4[4];
- u32 hbdidlcsr; /* Host Base Device ID Lock Cmd & Status */
- u32 ctcsr; /* Component Tag Cmd & Status */
- u8 res5[144];
- u32 pmbh0csr; /* Port Maint. Block Hdr 0 Cmd & Status */
- u8 res6[28];
- u32 pltoccsr; /* Port Link Time-out Ctrl Cmd & Status */
- u32 prtoccsr; /* Port Response Time-out Ctrl Cmd & Status */
- u8 res7[20];
- u32 pgccsr; /* Port General Cmd & Status */
- u32 plmreqcsr; /* Port Link Maint. Request Cmd & Status */
- u32 plmrespcsr; /* Port Link Maint. Response Cmd & Status */
- u32 plascsr; /* Port Local Ackid Status Cmd & Status */
- u8 res8[12];
- u32 pescsr; /* Port Error & Status Cmd & Status */
- u32 pccsr; /* Port Control Cmd & Status */
- u8 res9[65184];
- u32 cr; /* Port Control Cmd & Status */
- u8 res10[12];
- u32 pcr; /* Port Configuration */
- u32 peir; /* Port Error Injection */
- u8 res11[3048];
- u32 rowtar0; /* RIO Outbound Window Translation Addr 0 */
- u8 res12[12];
- u32 rowar0; /* RIO Outbound Attrs 0 */
- u8 res13[12];
- u32 rowtar1; /* RIO Outbound Window Translation Addr 1 */
- u8 res14[4];
- u32 rowbar1; /* RIO Outbound Window Base Addr 1 */
- u8 res15[4];
- u32 rowar1; /* RIO Outbound Attrs 1 */
- u8 res16[12];
- u32 rowtar2; /* RIO Outbound Window Translation Addr 2 */
- u8 res17[4];
- u32 rowbar2; /* RIO Outbound Window Base Addr 2 */
- u8 res18[4];
- u32 rowar2; /* RIO Outbound Attrs 2 */
- u8 res19[12];
- u32 rowtar3; /* RIO Outbound Window Translation Addr 3 */
- u8 res20[4];
- u32 rowbar3; /* RIO Outbound Window Base Addr 3 */
- u8 res21[4];
- u32 rowar3; /* RIO Outbound Attrs 3 */
- u8 res22[12];
- u32 rowtar4; /* RIO Outbound Window Translation Addr 4 */
- u8 res23[4];
- u32 rowbar4; /* RIO Outbound Window Base Addr 4 */
- u8 res24[4];
- u32 rowar4; /* RIO Outbound Attrs 4 */
- u8 res25[12];
- u32 rowtar5; /* RIO Outbound Window Translation Addr 5 */
- u8 res26[4];
- u32 rowbar5; /* RIO Outbound Window Base Addr 5 */
- u8 res27[4];
- u32 rowar5; /* RIO Outbound Attrs 5 */
- u8 res28[12];
- u32 rowtar6; /* RIO Outbound Window Translation Addr 6 */
- u8 res29[4];
- u32 rowbar6; /* RIO Outbound Window Base Addr 6 */
- u8 res30[4];
- u32 rowar6; /* RIO Outbound Attrs 6 */
- u8 res31[12];
- u32 rowtar7; /* RIO Outbound Window Translation Addr 7 */
- u8 res32[4];
- u32 rowbar7; /* RIO Outbound Window Base Addr 7 */
- u8 res33[4];
- u32 rowar7; /* RIO Outbound Attrs 7 */
- u8 res34[12];
- u32 rowtar8; /* RIO Outbound Window Translation Addr 8 */
- u8 res35[4];
- u32 rowbar8; /* RIO Outbound Window Base Addr 8 */
- u8 res36[4];
- u32 rowar8; /* RIO Outbound Attrs 8 */
- u8 res37[76];
- u32 riwtar4; /* RIO Inbound Window Translation Addr 4 */
- u8 res38[4];
- u32 riwbar4; /* RIO Inbound Window Base Addr 4 */
- u8 res39[4];
- u32 riwar4; /* RIO Inbound Attrs 4 */
- u8 res40[12];
- u32 riwtar3; /* RIO Inbound Window Translation Addr 3 */
- u8 res41[4];
- u32 riwbar3; /* RIO Inbound Window Base Addr 3 */
- u8 res42[4];
- u32 riwar3; /* RIO Inbound Attrs 3 */
- u8 res43[12];
- u32 riwtar2; /* RIO Inbound Window Translation Addr 2 */
- u8 res44[4];
- u32 riwbar2; /* RIO Inbound Window Base Addr 2 */
- u8 res45[4];
- u32 riwar2; /* RIO Inbound Attrs 2 */
- u8 res46[12];
- u32 riwtar1; /* RIO Inbound Window Translation Addr 1 */
- u8 res47[4];
- u32 riwbar1; /* RIO Inbound Window Base Addr 1 */
- u8 res48[4];
- u32 riwar1; /* RIO Inbound Attrs 1 */
- u8 res49[12];
- u32 riwtar0; /* RIO Inbound Window Translation Addr 0 */
- u8 res50[12];
- u32 riwar0; /* RIO Inbound Attrs 0 */
- u8 res51[12];
- u32 pnfedr; /* Port Notification/Fatal Error Detect */
- u32 pnfedir; /* Port Notification/Fatal Error Detect */
- u32 pnfeier; /* Port Notification/Fatal Error IRQ Enable */
- u32 pecr; /* Port Error Control */
- u32 pepcsr0; /* Port Error Packet/Control Symbol 0 */
- u32 pepr1; /* Port Error Packet 1 */
- u32 pepr2; /* Port Error Packet 2 */
- u8 res52[4];
- u32 predr; /* Port Recoverable Error Detect */
- u8 res53[4];
- u32 pertr; /* Port Error Recovery Threshold */
- u32 prtr; /* Port Retry Threshold */
- u8 res54[464];
- u32 omr; /* Outbound Mode */
- u32 osr; /* Outbound Status */
- u32 eodqtpar; /* Extended Outbound Desc Queue Tail Ptr Addr */
- u32 odqtpar; /* Outbound Desc Queue Tail Ptr Addr */
- u32 eosar; /* Extended Outbound Unit Source Addr */
- u32 osar; /* Outbound Unit Source Addr */
- u32 odpr; /* Outbound Destination Port */
- u32 odatr; /* Outbound Destination Attrs */
- u32 odcr; /* Outbound Doubleword Count */
- u32 eodqhpar; /* Extended Outbound Desc Queue Head Ptr Addr */
- u32 odqhpar; /* Outbound Desc Queue Head Ptr Addr */
- u8 res55[52];
- u32 imr; /* Outbound Mode */
- u32 isr; /* Inbound Status */
- u32 eidqtpar; /* Extended Inbound Desc Queue Tail Ptr Addr */
- u32 idqtpar; /* Inbound Desc Queue Tail Ptr Addr */
- u32 eifqhpar; /* Extended Inbound Frame Queue Head Ptr Addr */
- u32 ifqhpar; /* Inbound Frame Queue Head Ptr Addr */
- u8 res56[1000];
- u32 dmr; /* Doorbell Mode */
- u32 dsr; /* Doorbell Status */
- u32 edqtpar; /* Extended Doorbell Queue Tail Ptr Addr */
- u32 dqtpar; /* Doorbell Queue Tail Ptr Addr */
- u32 edqhpar; /* Extended Doorbell Queue Head Ptr Addr */
- u32 dqhpar; /* Doorbell Queue Head Ptr Addr */
- u8 res57[104];
- u32 pwmr; /* Port-Write Mode */
- u32 pwsr; /* Port-Write Status */
- u32 epwqbar; /* Extended Port-Write Queue Base Addr */
- u32 pwqbar; /* Port-Write Queue Base Addr */
- u8 res58[60176];
-} ccsr_rio_t;
+ u32 hbdidlcsr; /* Host Base Device ID Lock CSR */
+ u32 ctcsr; /* Component Tag CSR */
+};
+
+/* Extended Features Space: 1x/4x LP-Serial Port registers */
+struct rio_lp_serial_port {
+ u32 plmreqcsr; /* Port Link Maintenance Request CSR */
+ u32 plmrespcsr; /* Port Link Maintenance Response CS */
+ u32 plascsr; /* Port Local Ackid Status CSR */
+ u8 res0[12];
+ u32 pescsr; /* Port Error and Status CSR */
+ u32 pccsr; /* Port Control CSR */
+};
+
+/* Extended Features Space: 1x/4x LP-Serial registers */
+struct rio_lp_serial {
+ u32 pmbh0csr; /* Port Maintenance Block Header 0 CSR */
+ u8 res0[28];
+ u32 pltoccsr; /* Port Link Time-out CCSR */
+ u32 prtoccsr; /* Port Response Time-out CCSR */
+ u8 res1[20];
+ u32 pgccsr; /* Port General CSR */
+ struct rio_lp_serial_port port[SRIO_PORT_MAX_NUM];
+};
+
+/* Logical error reporting registers */
+struct rio_logical_err {
+ u32 erbh; /* Error Reporting Block Header Register */
+ u8 res0[4];
+ u32 ltledcsr; /* Logical/Transport layer error DCSR */
+ u32 ltleecsr; /* Logical/Transport layer error ECSR */
+ u8 res1[4];
+ u32 ltlaccsr; /* Logical/Transport layer ACCSR */
+ u32 ltldidccsr; /* Logical/Transport layer DID CCSR */
+ u32 ltlcccsr; /* Logical/Transport layer control CCSR */
+};
+
+/* Physical error reporting port registers */
+struct rio_phys_err_port {
+ u32 edcsr; /* Port error detect CSR */
+ u32 erecsr; /* Port error rate enable CSR */
+ u32 ecacsr; /* Port error capture attributes CSR */
+ u32 pcseccsr0; /* Port packet/control symbol ECCSR 0 */
+ u32 peccsr[3]; /* Port error capture CSR */
+ u8 res0[12];
+ u32 ercsr; /* Port error rate CSR */
+ u32 ertcsr; /* Port error rate threshold CSR */
+ u8 res1[16];
+};
+
+/* Physical error reporting registers */
+struct rio_phys_err {
+ struct rio_phys_err_port port[SRIO_PORT_MAX_NUM];
+};
+
+/* Implementation Space: General Port-Common */
+struct rio_impl_common {
+ u8 res0[4];
+ u32 llcr; /* Logical Layer Configuration Register */
+ u8 res1[8];
+ u32 epwisr; /* Error / Port-Write Interrupt SR */
+ u8 res2[12];
+ u32 lretcr; /* Logical Retry Error Threshold CR */
+ u8 res3[92];
+ u32 pretcr; /* Physical Retry Erorr Threshold CR */
+ u8 res4[124];
+};
+
+/* Implementation Space: Port Specific */
+struct rio_impl_port_spec {
+ u32 adidcsr; /* Port Alt. Device ID CSR */
+ u8 res0[28];
+ u32 ptaacr; /* Port Pass-Through/Accept-All CR */
+ u32 lopttlcr;
+ u8 res1[8];
+ u32 iecsr; /* Port Implementation Error CSR */
+ u8 res2[12];
+ u32 pcr; /* Port Phsyical Configuration Register */
+ u8 res3[20];
+ u32 slcsr; /* Port Serial Link CSR */
+ u8 res4[4];
+ u32 sleicr; /* Port Serial Link Error Injection */
+ u32 a0txcr; /* Port Arbitration 0 Tx CR */
+ u32 a1txcr; /* Port Arbitration 1 Tx CR */
+ u32 a2txcr; /* Port Arbitration 2 Tx CR */
+ u32 mreqtxbacr[3]; /* Port Request Tx Buffer ACR */
+ u32 mrspfctxbacr; /* Port Response/Flow Control Tx Buffer ACR */
+};
+
+/* Implementation Space: register */
+struct rio_implement {
+ struct rio_impl_common com;
+ struct rio_impl_port_spec port[SRIO_PORT_MAX_NUM];
+};
+
+/* Revision Control Register */
+struct rio_rev_ctrl {
+ u32 ipbrr[2]; /* IP Block Revision Register */
+};
+
+struct rio_atmu_row {
+ u32 rowtar; /* RapidIO Outbound Window TAR */
+ u32 rowtear; /* RapidIO Outbound Window TEAR */
+ u32 rowbar;
+ u8 res0[4];
+ u32 rowar; /* RapidIO Outbound Attributes Register */
+ u32 rowsr[3]; /* Port RapidIO outbound window segment register */
+};
+
+struct rio_atmu_riw {
+ u32 riwtar; /* RapidIO Inbound Window Translation AR */
+ u8 res0[4];
+ u32 riwbar; /* RapidIO Inbound Window Base AR */
+ u8 res1[4];
+ u32 riwar; /* RapidIO Inbound Attributes Register */
+ u8 res2[12];
+};
+
+/* ATMU window registers */
+struct rio_atmu_win {
+ struct rio_atmu_row outbw[SRIO_OB_WIN_NUM];
+ u8 res0[64];
+ struct rio_atmu_riw inbw[SRIO_IB_WIN_NUM];
+};
+
+struct rio_atmu {
+ struct rio_atmu_win port[SRIO_PORT_MAX_NUM];
+};
+
+struct rio_msg {
+ u32 omr; /* Outbound Mode Register */
+ u32 osr; /* Outbound Status Register */
+ u32 eodqdpar; /* Extended Outbound DQ DPAR */
+ u32 odqdpar; /* Outbound Descriptor Queue DPAR */
+ u32 eosar; /* Extended Outbound Unit Source AR */
+ u32 osar; /* Outbound Unit Source AR */
+ u32 odpr; /* Outbound Destination Port Register */
+ u32 odatr; /* Outbound Destination Attributes Register */
+ u32 odcr; /* Outbound Doubleword Count Register */
+ u32 eodqepar; /* Extended Outbound DQ EPAR */
+ u32 odqepar; /* Outbound Descriptor Queue EPAR */
+ u32 oretr; /* Outbound Retry Error Threshold Register */
+ u32 omgr; /* Outbound Multicast Group Register */
+ u32 omlr; /* Outbound Multicast List Register */
+ u8 res0[40];
+ u32 imr; /* Outbound Mode Register */
+ u32 isr; /* Inbound Status Register */
+ u32 eidqdpar; /* Extended Inbound Descriptor Queue DPAR */
+ u32 idqdpar; /* Inbound Descriptor Queue DPAR */
+ u32 eifqepar; /* Extended Inbound Frame Queue EPAR */
+ u32 ifqepar; /* Inbound Frame Queue EPAR */
+ u32 imirir; /* Inbound Maximum Interrutp RIR */
+ u8 res1[4];
+ u32 eihqepar; /* Extended inbound message header queue EPAR */
+ u32 ihqepar; /* Inbound message header queue EPAR */
+ u8 res2[120];
+};
+
+struct rio_dbell {
+ u32 odmr; /* Outbound Doorbell Mode Register */
+ u32 odsr; /* Outbound Doorbell Status Register */
+ u8 res0[16];
+ u32 oddpr; /* Outbound Doorbell Destination Port */
+ u32 oddatr; /* Outbound Doorbell Destination AR */
+ u8 res1[12];
+ u32 oddretr; /* Outbound Doorbell Retry Threshold CR */
+ u8 res2[48];
+ u32 idmr; /* Inbound Doorbell Mode Register */
+ u32 idsr; /* Inbound Doorbell Status Register */
+ u32 iedqdpar; /* Extended Inbound Doorbell Queue DPAR */
+ u32 iqdpar; /* Inbound Doorbell Queue DPAR */
+ u32 iedqepar; /* Extended Inbound Doorbell Queue EPAR */
+ u32 idqepar; /* Inbound Doorbell Queue EPAR */
+ u32 idmirir; /* Inbound Doorbell Max Interrupt RIR */
+};
+
+struct rio_pw {
+ u32 pwmr; /* Port-Write Mode Register */
+ u32 pwsr; /* Port-Write Status Register */
+ u32 epwqbar; /* Extended Port-Write Queue BAR */
+ u32 pwqbar; /* Port-Write Queue Base Address Register */
+};
+
+/* RapidIO Registers */
+struct ccsr_rio {
+ struct rio_arch arch;
+ u8 res0[144];
+ struct rio_lp_serial lp_serial;
+ u8 res1[1152];
+ struct rio_logical_err logical_err;
+ u8 res2[32];
+ struct rio_phys_err phys_err;
+ u8 res3[63808];
+ struct rio_implement impl;
+ u8 res4[2552];
+ struct rio_rev_ctrl rev;
+ struct rio_atmu atmu;
+ u8 res5[8192];
+ struct rio_msg msg[SRIO_MSG_UNIT_NUM];
+ u8 res6[512];
+ struct rio_dbell dbell;
+ u8 res7[100];
+ struct rio_pw pw;
+};
/* Quick Engine Block Pin Muxing Registers */
typedef struct par_io {
--
1.7.3.1
^ permalink raw reply related
* Re: [PATCH 7/8] dmaengine/dw_dmac: Unmap all memory buffers after completion of slave transfers
From: Viresh Kumar @ 2012-01-17 9:07 UTC (permalink / raw)
To: Linus Walleij
Cc: Russell King - ARM Linux, vinod.koul@intel.com,
dan.j.williams@intel.com, Pratyush ANAND, Rajeev KUMAR,
Bhupesh SHARMA, Armando VISCONTI, Mirko GARDI,
linux-kernel@vger.kernel.org, Vipin KUMAR, Shiraz HASHIM,
Amit VIRDI, Vipul Kumar SAMAR, viresh.linux@gmail.com,
Deepak SIKRI, Bhavna YADAV, linux-arm-kernel@lists.infradead.org,
Vincenzo FRASCINO
In-Reply-To: <CACRpkdY-4wWeD=3mJiChi6+4=iBMcd3kVh3h4JmDZ5ySXY3KCA@mail.gmail.com>
On 1/17/2012 2:22 PM, Linus Walleij wrote:
> Basically the driver using the dmaengine shall map/unmap buffers
> used for slave transfers, not the driver.
>
> I usually map them before setting up a transfer and unmaps them
> when egtting the callback from the DMA engine that the transfer is
> complete.
>
You implemented similar stuff in amba-pl08x :) .
if (!plchan->slave)
pl08x_unmap_buffers(txd);
> Why do you want to do this?
This is because people can pass in flags which are
DMA_COMPL_SKIP_SRC_UNMAP, etc.
If they are not passed, then DMA driver must do it for them.
Sorry if i am understanding the DMA logic incorrectly.
--
viresh
^ permalink raw reply
* Re: [PATCH 2/8] dmaengine: Add flow controller information to dma_slave_config
From: Viresh Kumar @ 2012-01-17 9:07 UTC (permalink / raw)
To: Linus Walleij
Cc: vinod.koul@intel.com, dan.j.williams@intel.com,
linux@arm.linux.org.uk, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Armando VISCONTI,
Shiraz HASHIM, Vipin KUMAR, Rajeev KUMAR, Deepak SIKRI,
Vipul Kumar SAMAR, Amit VIRDI, Pratyush ANAND, Bhupesh SHARMA,
viresh.linux@gmail.com, Bhavna YADAV, Vincenzo FRASCINO,
Mirko GARDI
In-Reply-To: <CACRpkdY4QQK6wtB5aPU+FwdyyGq-owsDxMmxdwJVnkzdJTRs_Q@mail.gmail.com>
On 1/17/2012 2:07 PM, Linus Walleij wrote:
>> > Perhaps, this should be a part of struct dma_slave_config. This patch adds
>> > another field device_fc to this structure. User drivers must pass this as true
>> > if they want to be flow controller of certain transfers.
> I dma_slave_config is supposed to be about info that
>
> 1) Must to be set-up at runtime
Hmmm.. Currently if i check the comments in dmaengine.h, it is written
as you said. But i believe its usage could be more than that.
For example, how amba-pl011 use it today. Nothing dynamic, all static.
Actually the problem scenario is: pl011 is going to use separate DMA drivers
(for ex: dw_dmac and pl08x) for separate platforms. Now, pl011's code shouldn't
be dependent at all on these controllers. So, we have to pass separate data to
these drivers using dma driver specific platform data.
DMA driver's platform data contains two type of stuff: platform specific
(request line, master, etc) and user driver specific (like pl011) (reg address,
burst, width, direction, flow_controller, etc)
Now, its better to have some common struct in dmaengine which can fulfill
requirement of various DMA driver's data.
I find struct dma_slave_config fitting there. All user driver (pl011) specific
data can be passed using this structure. You can call dma_slave_config()
onetime after you got the channel. And after that just submit transfers.
With this i get rid of half of the dw_dmac specific platform data struct and
used already defined struct dma_slave_config.
> 2) All DMA controllers need to know
>
Sorry i didn't understood it well.
One more thing. I missed few things in this patch:
- Need to update all instances of struct dma_slave_config with
.device_fc = false
If, this field is not getting initialized to false by default, then these users
will find their code not working atleast with dw_dmac and amba-pl08x.
Can't say about other drivers.
- Also i need to fixup few atmel drivers which are using dw_dmac.
> So if it doesn't *have* to be set up by drivers at runtime, please keep it in
> platform data.
>
> If it is (1), so you have a use case where you have to switch a certain channel
> between DMA master and device flow control at run-time it looks like it could
> be useful for others as well, but I doubt this so I'd like some back-up on
> that.
I don't have that crazy usecase :)
--
viresh
^ permalink raw reply
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