* [PATCH igt v4 11/13] igt/gem_exec_parse: update hsw_load_register_reg for v >= 8
From: Robert Bragg @ 2016-11-14 20:51 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <20161114205122.10742-1-robert@sixbynine.org>
This updates the checking of disallowed loads to set a distinguishable
value before the load and explicitly check the load was a NOOP by
reading back the final value.
Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
---
tests/gem_exec_parse.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
index 5c67e12..2bc6340 100644
--- a/tests/gem_exec_parse.c
+++ b/tests/gem_exec_parse.c
@@ -341,6 +341,7 @@ static void hsw_load_register_reg(void)
};
int fd;
uint32_t handle;
+ int bad_lrr_errno = parser_version >= 8 ? 0 : -EINVAL;
/* Open again to get a non-master file descriptor */
fd = drm_open_driver(DRIVER_INTEL);
@@ -371,10 +372,21 @@ static void hsw_load_register_reg(void)
}
for (int i = 0 ; i < ARRAY_SIZE(disallowed_regs); i++) {
+ exec_batch(fd, handle, init_gpr0, sizeof(init_gpr0),
+ I915_EXEC_RENDER,
+ 0);
+ exec_batch_patched(fd, handle,
+ store_gpr0, sizeof(store_gpr0),
+ 2 * sizeof(uint32_t), /* reloc */
+ 0xabcdabc0);
do_lrr[1] = disallowed_regs[i];
exec_batch(fd, handle, do_lrr, sizeof(do_lrr),
I915_EXEC_RENDER,
- -EINVAL);
+ bad_lrr_errno);
+ exec_batch_patched(fd, handle,
+ store_gpr0, sizeof(store_gpr0),
+ 2 * sizeof(uint32_t), /* reloc */
+ 0xabcdabc0);
}
close(fd);
--
2.10.1
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^ permalink raw reply related
* Re: [Qemu-devel] [RFC 0/3] aio: experimental virtio-blk polling mode
From: Paolo Bonzini @ 2016-11-14 20:52 UTC (permalink / raw)
To: krister, Stefan Hajnoczi
Cc: Stefan Hajnoczi, qemu-devel, Andrew Theurer, Fam Zheng
In-Reply-To: <1cab4d7b-ee50-3072-8751-1acde759d419@redhat.com>
On 14/11/2016 21:12, Karl Rister wrote:
> 256 46,929
> 512 35,627
> 1,024 46,477
> 2,000 35,247
> 2,048 46,322
> 4,000 46,540
> 4,096 46,368
> 8,000 47,054
> 8,192 46,671
> 16,000 46,466
> 16,384 32,504
> 32,000 20,620
> 32,768 20,807
Huh, it breaks down exactly when it should start going faster
(10^9/46000 = ~21000).
Paolo
^ permalink raw reply
* FireWire/ nosy compile error (was gregkh@linuxfoundation.org linux-kernel@vger.kernel.org)
From: Stefan Richter @ 2016-11-14 20:51 UTC (permalink / raw)
To: Karatas Ozgur; +Cc: linux-kernel, linux1394-devel
In-Reply-To: <222561479135211@web23m.yandex.ru>
On Nov 14 Karatas Ozgur wrote:
> Hi,
>
> I fixed compile error, not include to FIREWIRE variable and only PCI return an error.
>
>
> diff --git a/drivers/firewire/Kconfig b/drivers/firewire/Kconfig
>
> index 145974f..60e5a8c 100644
> --- a/drivers/firewire/Kconfig
> +++ b/drivers/firewire/Kconfig
> @@ -57,7 +57,7 @@ config FIREWIRE_NET
>
> config FIREWIRE_NOSY
> tristate "Nosy - a FireWire traffic sniffer for PCILynx cards"
> - depends on PCI
> + depends on FIREWIRE && PCI
> help
> Nosy is an IEEE 1394 packet sniffer that is used for protocol
> analysis and in development of IEEE 1394 drivers, applications,
This is wrong. The variable FIREWIRE enables the firewire-core driver.
But nosy is a stand-alone driver which does not depend on firewire-core.
Please tell us what your compile error was (and on what platform), so that
we can find out which dependency was really missing, if any.
--
Stefan Richter
-======----- =-== -===-
http://arcgraph.de/sr/
^ permalink raw reply
* [PATCH igt v4 12/13] igt/gem_exec_parse: update registers test for v >= 8
From: Robert Bragg @ 2016-11-14 20:51 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <20161114205122.10742-1-robert@sixbynine.org>
This combines some parts of the recently added store_lri test with the
registers test to be able to first load a distinguishable value before
the LRI and explicitly read back the register to determine if the
command succeeded or was a NOOP.
For now though we won't look at OACONTROL without checking for version 9
of the command parser.
This updates the 'bad' test to check the OASTATUS2 register so that we
can explicitly read back from the register to check it becomes a NOOP.
This adds a struct test_lri for associating a mask with the init/test
values so we ignore things like hw status bits that might interfere
with the result.
Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
---
tests/gem_exec_parse.c | 94 ++++++++++++++++++++++++++------------------------
1 file changed, 49 insertions(+), 45 deletions(-)
diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
index 2bc6340..43f25ce 100644
--- a/tests/gem_exec_parse.c
+++ b/tests/gem_exec_parse.c
@@ -35,6 +35,7 @@
#endif
#define DERRMR 0x44050
+#define OASTATUS2 0x2368
#define OACONTROL 0x2360
#define SO_WRITE_OFFSET_0 0x5280
@@ -253,27 +254,35 @@ static void exec_batch_chained(int fd, uint32_t cmd_bo, uint32_t *cmds,
gem_close(fd, target_bo);
}
-static void stray_lri(int fd, uint32_t handle)
+/* Be careful to take into account what register bits we can store and read
+ * from...
+ */
+struct test_lri {
+ uint32_t reg, read_mask, init_val, test_val;
+};
+
+static void
+test_lri(int fd, uint32_t handle,
+ struct test_lri *test, int expected_errno, uint32_t expect)
{
- /* Ideally this would test all once whitelisted registers */
uint32_t lri[] = {
MI_LOAD_REGISTER_IMM,
- OACONTROL,
- 0x31337000,
+ test->reg,
+ test->test_val,
MI_BATCH_BUFFER_END,
};
- int err;
- igt_assert_eq_u32(intel_register_read(OACONTROL), 0xdeadbeef);
+ intel_register_write(test->reg, test->init_val);
- err = __exec_batch(fd, handle, lri, sizeof(lri), I915_EXEC_RENDER);
- if (err == -EINVAL)
- return;
-
- igt_assert_eq(err, 0);
+ exec_batch(fd, handle,
+ lri, sizeof(lri),
+ I915_EXEC_RENDER,
+ expected_errno);
gem_sync(fd, handle);
- igt_assert_eq_u32(intel_register_read(OACONTROL), 0xdeadbeef);
+ igt_assert_eq_u32((intel_register_read(test->reg) &
+ test->read_mask),
+ expect);
}
static void test_allocations(int fd)
@@ -462,50 +471,45 @@ igt_main
-EINVAL);
}
+ igt_subtest("basic-allocation") {
+ test_allocations(fd);
+ }
+
igt_subtest_group {
igt_fixture {
intel_register_access_init(intel_get_pci_device(), 0);
-
- intel_register_write(OACONTROL, 0xdeadbeef);
- igt_assert_eq_u32(intel_register_read(OACONTROL), 0xdeadbeef);
}
- igt_subtest("basic-stray-lri")
- stray_lri(fd, handle);
+ igt_subtest("registers") {
+ struct test_lri bad_lris[] = {
+ /* dummy head pointer */
+ { OASTATUS2, 0xffffff80, 0xdeadf000, 0xbeeff000 }
+ };
+ struct test_lri ok_lris[] = {
+ /* NB: [1:0] MBZ */
+ { SO_WRITE_OFFSET_0, 0xfffffffc,
+ 0xabcdabc0, 0xbeefbee0 }
+ };
+ int bad_lri_errno = parser_version >= 8 ? 0 : -EINVAL;
+
+ for (int i = 0; i < ARRAY_SIZE(ok_lris); i++) {
+ test_lri(fd, handle,
+ ok_lris + i, 0,
+ ok_lris[i].test_val);
+ }
+
+ for (int i = 0; i < ARRAY_SIZE(bad_lris); i++) {
+ test_lri(fd, handle,
+ bad_lris + i, bad_lri_errno,
+ bad_lris[i].init_val);
+ }
+ }
igt_fixture {
- intel_register_write(OACONTROL, 0);
intel_register_access_fini();
}
}
- igt_subtest("basic-allocation") {
- test_allocations(fd);
- }
-
- igt_subtest("registers") {
- uint32_t lri_bad[] = {
- MI_LOAD_REGISTER_IMM,
- 0, /* disallowed register address */
- 0x12000000,
- MI_BATCH_BUFFER_END,
- };
- uint32_t lri_ok[] = {
- MI_LOAD_REGISTER_IMM,
- 0x5280, /* allowed register address (SO_WRITE_OFFSET[0]) */
- 0x1,
- MI_BATCH_BUFFER_END,
- };
- exec_batch(fd, handle,
- lri_bad, sizeof(lri_bad),
- I915_EXEC_RENDER,
- -EINVAL);
- exec_batch(fd, handle,
- lri_ok, sizeof(lri_ok),
- I915_EXEC_RENDER,
- 0);
- }
-
igt_subtest("bitmasks") {
uint32_t pc[] = {
GFX_OP_PIPE_CONTROL,
--
2.10.1
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^ permalink raw reply related
* [PATCH igt v4 13/13] igt/gem_exec_parse: check oacontrol lri bad for >= v9
From: Robert Bragg @ 2016-11-14 20:51 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <20161114205122.10742-1-robert@sixbynine.org>
OACONTROL is no longer white listed in the command parser so this checks
at attempted LRI will be disallowed and (more importantly) checks that
userspace doesn't get an EINVAL error for an attempted OACONTROL LRI.
This is important becase Mesa application attempt OACONTROL LRIs while
initializing and will abort for any execbuf error.
Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
---
tests/gem_exec_parse.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
index 43f25ce..cc2103a 100644
--- a/tests/gem_exec_parse.c
+++ b/tests/gem_exec_parse.c
@@ -485,6 +485,22 @@ igt_main
/* dummy head pointer */
{ OASTATUS2, 0xffffff80, 0xdeadf000, 0xbeeff000 }
};
+ struct test_lri v9_bad_lris[] = {
+ /* It's really important for us to check that
+ * an LRI to OACONTROL doesn't result in an
+ * EINVAL error because Mesa attempts writing
+ * to OACONTROL to determine what extensions to
+ * expose and will abort() for execbuffer()
+ * errors.
+ *
+ * Mesa can gracefully recognise and handle the
+ * LRI becoming a NOOP.
+ *
+ * The test values represent dummy context IDs
+ * while leaving the OA unit disabled
+ */
+ { OACONTROL, 0xfffff000, 0xfeed0000, 0x31337000 }
+ };
struct test_lri ok_lris[] = {
/* NB: [1:0] MBZ */
{ SO_WRITE_OFFSET_0, 0xfffffffc,
@@ -503,6 +519,15 @@ igt_main
bad_lris + i, bad_lri_errno,
bad_lris[i].init_val);
}
+
+ if (parser_version >= 9) {
+ for (int i = 0; i < ARRAY_SIZE(v9_bad_lris); i++) {
+ test_lri(fd, handle,
+ v9_bad_lris + i,
+ 0,
+ v9_bad_lris[i].init_val);
+ }
+ }
}
igt_fixture {
--
2.10.1
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^ permalink raw reply related
* Re: [PATCH v2 net-next 4/6] bpf: Add BPF_MAP_TYPE_LRU_HASH
From: Alexei Starovoitov @ 2016-11-14 20:52 UTC (permalink / raw)
To: Martin KaFai Lau
Cc: netdev, David Miller, Alexei Starovoitov, Daniel Borkmann,
Kernel Team
In-Reply-To: <1478890511-1346984-5-git-send-email-kafai@fb.com>
On Fri, Nov 11, 2016 at 10:55:09AM -0800, Martin KaFai Lau wrote:
> Provide a LRU version of the existing BPF_MAP_TYPE_HASH.
>
> Signed-off-by: Martin KaFai Lau <kafai@fb.com>
...
> +/* Instead of having one common LRU list in the
> + * BPF_MAP_TYPE_LRU_HASH map, use a percpu LRU list
> + * which can scale and perform better.
> + * Note, the LRU nodes (including free nodes) cannot be moved
> + * across different LRU lists.
> + */
> +#define BPF_F_NO_COMMON_LRU (1U << 1)
I couldn't come up with better name, so I think it's good :)
> + if (lru && !capable(CAP_SYS_ADMIN))
> + /* LRU implementation is much complicated than other
> + * maps. Hence, limit to CAP_SYS_ADMIN for now.
> + */
> + return ERR_PTR(-EPERM);
+1
good call.
> + if (!percpu && !lru) {
> + /* lru itself can remove the least used element, so
> + * there is no need for an extra elem during map_update.
> + */
yeah. that's an important comment, otherwise
@@ -48,11 +52,19 @@ struct htab_elem {
union {
struct rcu_head rcu;
enum extra_elem_state state;
+ struct bpf_lru_node lru_node;
};
wouldn't be correct.
Acked-by: Alexei Starovoitov <ast@kernel.org>
^ permalink raw reply
* Re: [RFC v4 00/18] Landlock LSM: Unprivileged sandboxing
From: Mickaël Salaün @ 2016-11-14 20:51 UTC (permalink / raw)
To: Sargun Dhillon
Cc: LKML, Alexei Starovoitov, Andy Lutomirski, Daniel Borkmann,
Daniel Mack, David Drysdale, David S . Miller, Eric W . Biederman,
James Morris, Jann Horn, Kees Cook, Paul Moore, Serge E . Hallyn,
Tejun Heo, Thomas Graf, Will Drewry, kernel-hardening, Linux API,
LSM, netdev, open list:CONTROL GROUP (CGROUP)
In-Reply-To: <CAMp4zn8u3kg-nhiZ5rSUCLGveAzHr6FoP1x=iJasF2W0S56WfA@mail.gmail.com>
[-- Attachment #1.1: Type: text/plain, Size: 452 bytes --]
On 14/11/2016 11:35, Sargun Dhillon wrote:
> Was there a plan around getting Daniel's patches in as well? Also,
> rather than making these handles landlock-specific, can they be
> implemented in such a way where we can keep track of (some) of these
> in other types of programs?
>
About the map of handles, this is only a new type of map so it's not
particularly Landlock-specific. Anyway, we'll see that in the third step.
Mickaël
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH 1/5] pinctrl: core: Use delayed work for hogs
From: Tony Lindgren @ 2016-11-14 20:52 UTC (permalink / raw)
To: Linus Walleij
Cc: Haojian Zhuang, Masahiro Yamada, Grygorii Strashko,
Nishanth Menon, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Linux-OMAP
In-Reply-To: <20161111202650.GI7138@atomide.com>
* Tony Lindgren <tony@atomide.com> [161111 12:27]:
> * Linus Walleij <linus.walleij@linaro.org> [161111 12:17]:
> > On Tue, Oct 25, 2016 at 11:02 PM, Tony Lindgren <tony@atomide.com> wrote:
> > > Signed-off-by: Tony Lindgren <tony@atomide.com>
> >
> > I don't see why this is necessary?
>
> It's needed because the pin controller driver has not yet
> finished it's probe at this point. We end up calling functions
> in the device driver where no struct pinctrl_dev is yet known
> to the driver. Asking a device driver to do something before
> it's probe is done does not quite follow the Linux driver model :)
>
> > The hogging was placed inside pinctrl_register() so that any hogs
> > would be taken before it returns, so nothing else can take it
> > before the controller itself has the first chance. This semantic
> > needs to be preserved I think.
> >
> > > + schedule_delayed_work(&pctldev->hog_work,
> > > + msecs_to_jiffies(100));
> >
> > If we arbitrarily delay, something else can go in and take the
> > pins used by the hogs before the pinctrl core? That is what
> > we want to avoid.
> >
> > Hm, 100ms seems arbitrarily chosen BTW. Can it be 1 ms?
> > 1 ns?
>
> Yeah well seems like it should not matter but the race we need
> to remove somehow.
>
> > I'm pretty sure that whatever it is that needs to happen before
> > the hog work runs can race with this delayed work under
> > some circumstances (such as slow external expanders
> > on i2c). It should be impossible for that to happen
> > and I don't think it is?
>
> Yes it's totally possible even with delay set to 0.
>
> Maybe we could add some trigger on the first consumer request
> and if that does not happen use the timer?
Below is what I came up with for removing the race for hogs. We
can do it by not registering the pctldev until in the deferred
work, does that seem OK to you?
Regards,
Tony
8<-----------------------
>From tony Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Tue, 25 Oct 2016 08:33:35 -0700
Subject: [PATCH] pinctrl: core: Use delayed work for hogs
Having the pin control framework call pin controller functions
before it's probe has finished is not nice as the pin controller
device driver does not yet have struct pinctrl_dev handle.
Let's fix this issue by adding deferred work for late init. This is
needed to be able to add pinctrl generic helper functions that expect
to know struct pinctrl_dev handle. Note that we now need to call
create_pinctrl() directly as we don't want to add the pin controller
to the list of controllers until the hogs are claimed.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/pinctrl/core.c | 66 ++++++++++++++++++++++++++++++--------------------
drivers/pinctrl/core.h | 2 ++
2 files changed, 42 insertions(+), 26 deletions(-)
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
--- a/drivers/pinctrl/core.c
+++ b/drivers/pinctrl/core.c
@@ -1911,6 +1911,43 @@ static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
}
/**
+ * pinctrl_late_init() - finish pin controller device registration
+ * @work: work struct
+ */
+static void pinctrl_late_init(struct work_struct *work)
+{
+ struct pinctrl_dev *pctldev;
+
+ pctldev = container_of(work, struct pinctrl_dev, late_init.work);
+
+ pctldev->p = create_pinctrl(pctldev->dev);
+ if (IS_ERR(pctldev->p))
+ return;
+
+ kref_get(&pctldev->p->users);
+
+ pctldev->hog_default =
+ pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT);
+ if (IS_ERR(pctldev->hog_default)) {
+ dev_dbg(pctldev->dev, "failed to lookup the default state\n");
+ } else {
+ if (pinctrl_select_state(pctldev->p, pctldev->hog_default))
+ dev_err(pctldev->dev, "failed to select default state\n");
+ }
+
+ pctldev->hog_sleep = pinctrl_lookup_state(pctldev->p,
+ PINCTRL_STATE_SLEEP);
+ if (IS_ERR(pctldev->hog_sleep))
+ dev_dbg(pctldev->dev, "failed to lookup the sleep state\n");
+
+ mutex_lock(&pinctrldev_list_mutex);
+ list_add_tail(&pctldev->node, &pinctrldev_list);
+ mutex_unlock(&pinctrldev_list_mutex);
+
+ pinctrl_init_device_debugfs(pctldev);
+}
+
+/**
* pinctrl_register() - register a pin controller device
* @pctldesc: descriptor for this pin controller
* @dev: parent device for this pin controller
@@ -1941,6 +1978,7 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
INIT_RADIX_TREE(&pctldev->pin_group_tree, GFP_KERNEL);
INIT_RADIX_TREE(&pctldev->pin_function_tree, GFP_KERNEL);
INIT_LIST_HEAD(&pctldev->gpio_ranges);
+ INIT_DELAYED_WORK(&pctldev->late_init, pinctrl_late_init);
pctldev->dev = dev;
mutex_init(&pctldev->mutex);
@@ -1975,32 +2013,7 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
goto out_err;
}
- mutex_lock(&pinctrldev_list_mutex);
- list_add_tail(&pctldev->node, &pinctrldev_list);
- mutex_unlock(&pinctrldev_list_mutex);
-
- pctldev->p = pinctrl_get(pctldev->dev);
-
- if (!IS_ERR(pctldev->p)) {
- pctldev->hog_default =
- pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT);
- if (IS_ERR(pctldev->hog_default)) {
- dev_dbg(dev, "failed to lookup the default state\n");
- } else {
- if (pinctrl_select_state(pctldev->p,
- pctldev->hog_default))
- dev_err(dev,
- "failed to select default state\n");
- }
-
- pctldev->hog_sleep =
- pinctrl_lookup_state(pctldev->p,
- PINCTRL_STATE_SLEEP);
- if (IS_ERR(pctldev->hog_sleep))
- dev_dbg(dev, "failed to lookup the sleep state\n");
- }
-
- pinctrl_init_device_debugfs(pctldev);
+ schedule_delayed_work(&pctldev->late_init, 0);
return pctldev;
@@ -2023,6 +2036,7 @@ void pinctrl_unregister(struct pinctrl_dev *pctldev)
if (pctldev == NULL)
return;
+ cancel_delayed_work_sync(&pctldev->late_init);
mutex_lock(&pctldev->mutex);
pinctrl_remove_device_debugfs(pctldev);
mutex_unlock(&pctldev->mutex);
diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h
--- a/drivers/pinctrl/core.h
+++ b/drivers/pinctrl/core.h
@@ -37,6 +37,7 @@ struct pinctrl_gpio_range;
* @p: result of pinctrl_get() for this device
* @hog_default: default state for pins hogged by this device
* @hog_sleep: sleep state for pins hogged by this device
+ * @late_init: delayed work for pin controller to finish registration
* @mutex: mutex taken on each pin controller specific action
* @device_root: debugfs root for this device
*/
@@ -55,6 +56,7 @@ struct pinctrl_dev {
struct pinctrl *p;
struct pinctrl_state *hog_default;
struct pinctrl_state *hog_sleep;
+ struct delayed_work late_init;
struct mutex mutex;
#ifdef CONFIG_DEBUG_FS
struct dentry *device_root;
--
2.10.2
^ permalink raw reply
* [Qemu-devel] QEMU postcopy-test failing on ppc64
From: Stefan Hajnoczi @ 2016-11-14 20:52 UTC (permalink / raw)
To: Dave Gilbert; +Cc: qemu-devel, Andrea Arcangeli
I hit a failure running "make check" on ppc64 for the first time. Ideas?
Stefan
commit 682df581c65ed2c1b9e77093e332214ecaa1ee93
GTESTER check-qtest-ppc64
Memory content inconsistency at 5af4000 first_byte = 1b last_byte = 1a
current = 7c hit_edge = 1
Memory content inconsistency at 5af5000 first_byte = 1b last_byte = 7c
current = 1b hit_edge = 1
Memory content inconsistency at 5e59000 first_byte = 1b last_byte = 1b
current = 1a hit_edge = 1
**
ERROR:tests/postcopy-test.c:345:check_guests_ram: 'bad' should be FALSE
GTester: last random seed: R02S9d79166a1ca7e21940a0f4b0b1255d5b
^ permalink raw reply
* [PATCH v3 0/2] pinctrl: sunxi: Support the interrupt debouncing
From: Maxime Ripard @ 2016-11-14 20:53 UTC (permalink / raw)
To: Linus Walleij, Alexandre Courbot
Cc: linux-gpio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Chen-Yu Tsai,
Maxime Ripard
Hi,
The Allwinner pin controllers can setup a different debouncing period based
on two clocks and a prescaler.
This debouncing is applied to the whole IRQ bank, which prevents us from
using the per-pin property that is usually used.
Let me know what you think,
Maxime
Changes from v2:
- Deal with a debounce set to 0
- Change debounce divider function name
- Used DIV_ROUND_CLOSEST instead of manual division
- Convert the R_PIO too
- Added the Acked-by
Changes from v1:
- Changed the resolution of the debouncing property to microseconds, and
switched to the input-debounce instead of a custom one.
Maxime Ripard (2):
pinctrl: sunxi: Add support for interrupt debouncing
ARM: sunxi: Add the missing clocks to the pinctrl nodes
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 14 ++++++++++++-
arch/arm/boot/dts/sun4i-a10.dtsi | 3 ++-
arch/arm/boot/dts/sun5i.dtsi | 3 ++-
arch/arm/boot/dts/sun6i-a31.dtsi | 6 +++--
arch/arm/boot/dts/sun7i-a20.dtsi | 3 ++-
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 6 +++--
arch/arm/boot/dts/sun8i-h3.dtsi | 6 +++--
arch/arm/boot/dts/sun9i-a80.dtsi | 6 +++--
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 84 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 7 ++++++-
10 files changed, 127 insertions(+), 11 deletions(-)
base-commit: bc5952be2d424b75ed11ff599b70bc9604e98d42
--
git-series 0.8.11
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^ permalink raw reply
* [PATCH v3 2/2] ARM: sunxi: Add the missing clocks to the pinctrl nodes
From: Maxime Ripard @ 2016-11-14 20:53 UTC (permalink / raw)
To: Linus Walleij, Alexandre Courbot
Cc: linux-gpio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Chen-Yu Tsai,
Maxime Ripard
In-Reply-To: <cover.fa554eb1146d18ec75bf44863543fec4fa4fd3ae.1479156725.git-series.maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
The pin controllers also use the two oscillators for debouncing. Add them
to the DTs.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Acked-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
arch/arm/boot/dts/sun4i-a10.dtsi | 3 ++-
arch/arm/boot/dts/sun5i.dtsi | 3 ++-
arch/arm/boot/dts/sun6i-a31.dtsi | 6 ++++--
arch/arm/boot/dts/sun7i-a20.dtsi | 3 ++-
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 6 ++++--
arch/arm/boot/dts/sun8i-h3.dtsi | 6 ++++--
arch/arm/boot/dts/sun9i-a80.dtsi | 6 ++++--
7 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 7e7dfc2b43db..b14a4281058d 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -967,7 +967,8 @@
compatible = "allwinner,sun4i-a10-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <28>;
- clocks = <&apb0_gates 5>;
+ clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index b4ccee8cfb02..b0fca4ef4dae 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -547,7 +547,8 @@
pio: pinctrl@01c20800 {
reg = <0x01c20800 0x400>;
interrupts = <28>;
- clocks = <&apb0_gates 5>;
+ clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 2e8bf93dcfb2..c941662383ee 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -471,7 +471,8 @@
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_APB1_PIO>;
+ clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
@@ -1051,7 +1052,8 @@
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>;
+ clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
resets = <&apb0_rst 0>;
gpio-controller;
interrupt-controller;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 94cf5a1c7172..f7db067b0de0 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1085,7 +1085,8 @@
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 5>;
+ clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 300a1bd5a6ec..e4991a78ad73 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -266,7 +266,8 @@
/* compatible gets set in SoC specific dtsi file */
reg = <0x01c20800 0x400>;
/* interrupts get set in SoC specific dtsi file */
- clocks = <&ccu CLK_BUS_PIO>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
@@ -575,7 +576,8 @@
compatible = "allwinner,sun8i-a23-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>;
+ clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
resets = <&apb0_rst 0>;
gpio-controller;
interrupt-controller;
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index c38b028cac83..3c6596f06ebc 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -321,7 +321,8 @@
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_PIO>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
@@ -614,7 +615,8 @@
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>;
+ clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
resets = <&apb0_reset 0>;
gpio-controller;
#gpio-cells = <3>;
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index ab6a221027ef..979ad1aacfb1 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -678,7 +678,8 @@
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 5>;
+ clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
@@ -902,7 +903,8 @@
reg = <0x08002c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apbs_gates 0>;
+ clocks = <&apbs_gates 0>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
resets = <&apbs_rst 0>;
gpio-controller;
interrupt-controller;
--
git-series 0.8.11
--
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^ permalink raw reply related
* [PATCH v3 1/2] pinctrl: sunxi: Add support for interrupt debouncing
From: Maxime Ripard @ 2016-11-14 20:53 UTC (permalink / raw)
To: Linus Walleij, Alexandre Courbot
Cc: linux-gpio, devicetree, Rob Herring, Chen-Yu Tsai, Maxime Ripard
In-Reply-To: <cover.fa554eb1146d18ec75bf44863543fec4fa4fd3ae.1479156725.git-series.maxime.ripard@free-electrons.com>
The pin controller found in the Allwinner SoCs has support for interrupts
debouncing.
However, this is not done per-pin, preventing us from using the generic
pinconf binding for that, but per irq bank, which, depending on the SoC,
ranges from one to five.
Introduce a device-wide property to deal with this using a microsecond
resolution. We can re-use the per-pin input-debounce property for that, so
let's do it!
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 14 ++++++++++++-
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 84 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 7 ++++++-
3 files changed, 105 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
index 1685821eea41..56debe1db4e8 100644
--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
@@ -28,6 +28,20 @@ Required properties:
- reg: Should contain the register physical address and length for the
pin controller.
+- clocks: phandle to the clocks feeding the pin controller:
+ - "apb": the gated APB parent clock
+ - "hosc": the high frequency oscillator in the system
+ - "losc": the low frequency oscillator in the system
+
+Note: For backward compatibility reasons, the hosc and losc clocks are only
+required if you need to use the optional input-debounce property. Any new
+device tree should set them.
+
+Optional properties:
+ - input-debounce: Array of debouncing periods in microseconds. One period per
+ irq bank found in the controller. 0 if no setup required.
+
+
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices.
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 0facbea5f465..b425be2875d4 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -870,6 +870,88 @@ static int sunxi_pinctrl_build_state(struct platform_device *pdev)
return 0;
}
+static int sunxi_pinctrl_get_debounce_div(struct clk *clk, int freq, int *diff)
+{
+ unsigned long clock = clk_get_rate(clk);
+ unsigned int best_diff = ~0, best_div;
+ int i;
+
+ for (i = 0; i < 8; i++) {
+ int cur_diff = abs(freq - (clock >> i));
+
+ if (cur_diff < best_diff) {
+ best_diff = cur_diff;
+ best_div = i;
+ }
+ }
+
+ *diff = best_diff;
+ return best_div;
+}
+
+static int sunxi_pinctrl_setup_debounce(struct sunxi_pinctrl *pctl,
+ struct device_node *node)
+{
+ unsigned int hosc_diff, losc_diff;
+ unsigned int hosc_div, losc_div;
+ struct clk *hosc, *losc;
+ u8 div, src;
+ int i, ret;
+
+ /* Deal with old DTs that didn't have the oscillators */
+ if (of_count_phandle_with_args(node, "clocks", "#clock-cells") != 3)
+ return 0;
+
+ /* If we don't have any setup, bail out */
+ if (!of_find_property(node, "input-debounce", NULL))
+ return 0;
+
+ losc = devm_clk_get(pctl->dev, "losc");
+ if (IS_ERR(losc))
+ return PTR_ERR(losc);
+
+ hosc = devm_clk_get(pctl->dev, "hosc");
+ if (IS_ERR(hosc))
+ return PTR_ERR(hosc);
+
+ for (i = 0; i < pctl->desc->irq_banks; i++) {
+ unsigned long debounce_freq;
+ u32 debounce;
+
+ ret = of_property_read_u32_index(node, "input-debounce",
+ i, &debounce);
+ if (ret)
+ return ret;
+
+ if (!debounce)
+ continue;
+
+ debounce_freq = DIV_ROUND_CLOSEST(USEC_PER_SEC, debounce);
+ losc_div = sunxi_pinctrl_get_debounce_div(losc,
+ debounce_freq,
+ &losc_diff);
+
+ hosc_div = sunxi_pinctrl_get_debounce_div(hosc,
+ debounce_freq,
+ &hosc_diff);
+
+ if (hosc_diff < losc_diff) {
+ div = hosc_div;
+ src = 1;
+ } else {
+ div = losc_div;
+ src = 0;
+ }
+
+ writel(src | div << 4,
+ pctl->membase +
+ sunxi_irq_debounce_reg_from_bank(i,
+ pctl->desc->irq_bank_base));
+ }
+
+ return 0;
+}
+
int sunxi_pinctrl_init(struct platform_device *pdev,
const struct sunxi_pinctrl_desc *desc)
{
@@ -1032,6 +1114,8 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
pctl);
}
+ sunxi_pinctrl_setup_debounce(pctl, node);
+
dev_info(&pdev->dev, "initialized sunXi PIO driver\n");
return 0;
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index 0afce1ab12d0..c0d97fe58e84 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -69,6 +69,8 @@
#define IRQ_STATUS_IRQ_BITS 1
#define IRQ_STATUS_IRQ_MASK ((1 << IRQ_STATUS_IRQ_BITS) - 1)
+#define IRQ_DEBOUNCE_REG 0x218
+
#define IRQ_MEM_SIZE 0x20
#define IRQ_EDGE_RISING 0x00
@@ -266,6 +268,11 @@ static inline u32 sunxi_irq_ctrl_offset(u16 irq)
return irq_num * IRQ_CTRL_IRQ_BITS;
}
+static inline u32 sunxi_irq_debounce_reg_from_bank(u8 bank, unsigned bank_base)
+{
+ return IRQ_DEBOUNCE_REG + (bank_base + bank) * IRQ_MEM_SIZE;
+}
+
static inline u32 sunxi_irq_status_reg_from_bank(u8 bank, unsigned bank_base)
{
return IRQ_STATUS_REG + (bank_base + bank) * IRQ_MEM_SIZE;
--
git-series 0.8.11
^ permalink raw reply related
* [PATCH] ARM: sun8i: sina33: Enable USB gadget
From: Maxime Ripard @ 2016-11-14 20:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161104144439.4469-1-maxime.ripard@free-electrons.com>
On Fri, Nov 04, 2016 at 03:44:39PM +0100, Maxime Ripard wrote:
> The micro-USB on the SinA33 has a somewhat interesting design in the sense
> that it has a micro USB connector, but the VBUS is (supposed to be)
> controlled through an (unpopulated) jumper.
>
> Obviously, that doesn't work really well, and only the peripheral mode
> really works. Still enable it.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
-------------- next part --------------
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^ permalink raw reply
* Re: [PATCH kvm-unit-tests v2 14/17] x86: intel-iommu: add dmar test
From: Peter Xu @ 2016-11-14 20:54 UTC (permalink / raw)
To: Andrew Jones; +Cc: kvm, rkrcmar, agordeev, jan.kiszka, pbonzini
In-Reply-To: <20161110195302.ga42nzxy5iauiqcl@hawk.localdomain>
On Thu, Nov 10, 2016 at 08:53:02PM +0100, Andrew Jones wrote:
[...]
> > +/* Supported Adjusted Guest Address Widths */
> > +#define VTD_CAP_SAGAW_SHIFT 8
> > + /* 39-bit AGAW, 3-level page-table */
> > +#define VTD_CAP_SAGAW_39bit (0x2ULL << VTD_CAP_SAGAW_SHIFT)
> > + /* 48-bit AGAW, 4-level page-table */
>
> The leading space in the above comments is a bit strange
Yes, they are. :)
[...]
> > + /*
> > + * DMA the first 4 bytes of the page to EDU device buffer
> > + * offset 0.
> > + */
> > + edu_dma(dev, 0, 4, 0, false);
>
> missing blank line here
Will fix both. Thanks,
-- peterx
^ permalink raw reply
* [Buildroot] [PATCH] dtv-scan-tables: rename file to have only ASCII characters
From: Thomas Petazzoni @ 2016-11-14 20:55 UTC (permalink / raw)
To: buildroot
Since the bump of dtv-scan-tables to version
ceb11833b35f05813b1f0397a60e0f3b99430aab in commit
b1c8794d8ac0eb3895d13ae91d8e912ec469a105, one file contains non-ASCII
characters, which causes encoding issues tvheadend. Since no other
file in the dtv-scan-tables code base contains files with non-ASCII
characters (despite having files named after cities in various
countries that definitely do have non-ASCII characters), we rename
this file so that it is named with only ASCII characters.
This fixes the build of tvheadend, which was failing when the host
Python interpreter was python3, due to a file name encoding issue.
Fixes:
http://autobuild.buildroot.net/results/1ae8bee297edb089535a2fb6ec724ebf7976888d/
(tvheadend)
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Note: we will separately submit a patch to the upstream
dtv-scan-tables project to rename the problematic file.
---
package/dtv-scan-tables/dtv-scan-tables.mk | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/package/dtv-scan-tables/dtv-scan-tables.mk b/package/dtv-scan-tables/dtv-scan-tables.mk
index 8ef42b9..2be0eb5 100644
--- a/package/dtv-scan-tables/dtv-scan-tables.mk
+++ b/package/dtv-scan-tables/dtv-scan-tables.mk
@@ -17,11 +17,16 @@ DTV_SCAN_TABLES_SITE_METHOD = git
DTV_SCAN_TABLES_LICENSE = GPLv2, LGPLv2.1
DTV_SCAN_TABLES_LICENSE_FILES = COPYING COPYING.LGPL
+# In order to avoid issues with file name encodings, we rename the
+# only dtv-scan-tables file that has non-ASCII characters to have a
+# name using only ASCII characters (pl-Krosno_Sucha_Gora)
define DTV_SCAN_TABLES_INSTALL_TARGET_CMDS
for f in atsc dvb-c dvb-s dvb-t; do \
$(INSTALL) -d -m 0755 $(TARGET_DIR)/usr/share/dvb/$$f; \
$(INSTALL) $(@D)/$$f/* $(TARGET_DIR)/usr/share/dvb/$$f; \
done
+ mv $(TARGET_DIR)/usr/share/dvb/dvb-t/pl-Krosno_Sucha* \
+ $(TARGET_DIR)/usr/share/dvb/dvb-t/pl-Krosno_Sucha_Gora
endef
$(eval $(generic-package))
--
2.7.4
^ permalink raw reply related
* [PATCH v2 0/5] Optimisations for state management
From: Trond Myklebust @ 2016-11-14 20:55 UTC (permalink / raw)
To: linux-nfs
The following patches constitute a grab bag of minor optimisations when
the NFS client is managing its state.
v2: Fix "enumeration value 'NFS4_OPEN_CLAIM_PREVIOUS' not handled in switch"
Trond Myklebust (5):
NFSv4: Don't check file access when reclaiming state
NFSv4: Don't ask for the change attribute when reclaiming state
NFSv4: Don't request a GETATTR on open_downgrade.
NFSv4: Don't request close-to-open attribute when holding a delegation
NFSv4: Optimise away forced revalidation when we know the attributes
are OK
fs/nfs/delegation.c | 4 ----
fs/nfs/inode.c | 2 +-
fs/nfs/nfs4proc.c | 25 +++++++++++++++++++------
fs/nfs/nfs4xdr.c | 7 ++-----
4 files changed, 22 insertions(+), 16 deletions(-)
--
2.7.4
^ permalink raw reply
* [PATCH v2 1/5] NFSv4: Don't check file access when reclaiming state
From: Trond Myklebust @ 2016-11-14 20:55 UTC (permalink / raw)
To: linux-nfs
In-Reply-To: <1479156935-34479-1-git-send-email-trond.myklebust@primarydata.com>
If we're reclaiming state after a reboot, or as part of returning a
delegation, we don't need to check access modes again.
Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
---
fs/nfs/nfs4proc.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 61d751005907..03109b69c036 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -1221,6 +1221,7 @@ static struct nfs4_opendata *nfs4_opendata_alloc(struct dentry *dentry,
atomic_inc(&sp->so_count);
p->o_arg.open_flags = flags;
p->o_arg.fmode = fmode & (FMODE_READ|FMODE_WRITE);
+ p->o_arg.claim = nfs4_map_atomic_open_claim(server, claim);
p->o_arg.share_access = nfs4_map_atomic_open_share(server,
fmode, flags);
/* don't put an ACCESS op in OPEN compound if O_EXCL, because ACCESS
@@ -1228,8 +1229,16 @@ static struct nfs4_opendata *nfs4_opendata_alloc(struct dentry *dentry,
if (!(flags & O_EXCL)) {
/* ask server to check for all possible rights as results
* are cached */
- p->o_arg.access = NFS4_ACCESS_READ | NFS4_ACCESS_MODIFY |
- NFS4_ACCESS_EXTEND | NFS4_ACCESS_EXECUTE;
+ switch (p->o_arg.claim) {
+ default:
+ break;
+ case NFS4_OPEN_CLAIM_NULL:
+ case NFS4_OPEN_CLAIM_FH:
+ p->o_arg.access = NFS4_ACCESS_READ |
+ NFS4_ACCESS_MODIFY |
+ NFS4_ACCESS_EXTEND |
+ NFS4_ACCESS_EXECUTE;
+ }
}
p->o_arg.clientid = server->nfs_client->cl_clientid;
p->o_arg.id.create_time = ktime_to_ns(sp->so_seqid.create_time);
@@ -1239,7 +1248,6 @@ static struct nfs4_opendata *nfs4_opendata_alloc(struct dentry *dentry,
p->o_arg.bitmask = nfs4_bitmask(server, label);
p->o_arg.open_bitmap = &nfs4_fattr_bitmap[0];
p->o_arg.label = nfs4_label_copy(p->a_label, label);
- p->o_arg.claim = nfs4_map_atomic_open_claim(server, claim);
switch (p->o_arg.claim) {
case NFS4_OPEN_CLAIM_NULL:
case NFS4_OPEN_CLAIM_DELEGATE_CUR:
--
2.7.4
^ permalink raw reply related
* [PATCH v2 2/5] NFSv4: Don't ask for the change attribute when reclaiming state
From: Trond Myklebust @ 2016-11-14 20:55 UTC (permalink / raw)
To: linux-nfs
In-Reply-To: <1479156935-34479-2-git-send-email-trond.myklebust@primarydata.com>
We don't need to ask for the change attribute when returning a delegation
or recovering from a server reboot, and it could actually cause us to
obtain an incorrect value if we're using a pNFS flavour that requires
LAYOUTCOMMIT.
Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
---
fs/nfs/nfs4proc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 03109b69c036..1897591689f6 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -226,7 +226,6 @@ static const u32 nfs4_pnfs_open_bitmap[3] = {
static const u32 nfs4_open_noattr_bitmap[3] = {
FATTR4_WORD0_TYPE
- | FATTR4_WORD0_CHANGE
| FATTR4_WORD0_FILEID,
};
--
2.7.4
^ permalink raw reply related
* [PATCH v2 3/5] NFSv4: Don't request a GETATTR on open_downgrade.
From: Trond Myklebust @ 2016-11-14 20:55 UTC (permalink / raw)
To: linux-nfs
In-Reply-To: <1479156935-34479-3-git-send-email-trond.myklebust@primarydata.com>
If we're not closing the file completely, there is no need to request
close-to-open attributes.
Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
---
fs/nfs/nfs4xdr.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/fs/nfs/nfs4xdr.c b/fs/nfs/nfs4xdr.c
index fc89e5ed07ee..43cc989b5c06 100644
--- a/fs/nfs/nfs4xdr.c
+++ b/fs/nfs/nfs4xdr.c
@@ -2328,7 +2328,6 @@ static void nfs4_xdr_enc_open_downgrade(struct rpc_rqst *req,
encode_sequence(xdr, &args->seq_args, &hdr);
encode_putfh(xdr, args->fh, &hdr);
encode_open_downgrade(xdr, args, &hdr);
- encode_getfattr(xdr, args->bitmask, &hdr);
encode_nops(&hdr);
}
@@ -6115,9 +6114,6 @@ static int nfs4_xdr_dec_open_downgrade(struct rpc_rqst *rqstp,
if (status)
goto out;
status = decode_open_downgrade(xdr, res);
- if (status != 0)
- goto out;
- decode_getfattr(xdr, res->fattr, res->server);
out:
return status;
}
--
2.7.4
^ permalink raw reply related
* [PATCH v2 4/5] NFSv4: Don't request close-to-open attribute when holding a delegation
From: Trond Myklebust @ 2016-11-14 20:55 UTC (permalink / raw)
To: linux-nfs
In-Reply-To: <1479156935-34479-4-git-send-email-trond.myklebust@primarydata.com>
If holding a delegation, we do not need to ask the server to return
close-to-open cache consistency attributes as part of the CLOSE
compound.
Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
---
fs/nfs/nfs4proc.c | 10 ++++++++--
fs/nfs/nfs4xdr.c | 3 ++-
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 1897591689f6..a21b3cb87453 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -3144,8 +3144,15 @@ static void nfs4_close_prepare(struct rpc_task *task, void *data)
goto out_wait;
}
- if (calldata->arg.fmode == 0)
+ if (calldata->arg.fmode == 0) {
task->tk_msg.rpc_proc = &nfs4_procedures[NFSPROC4_CLNT_CLOSE];
+
+ /* Close-to-open cache consistency revalidation */
+ if (!nfs4_have_delegation(inode, FMODE_READ))
+ calldata->arg.bitmask = NFS_SERVER(inode)->cache_consistency_bitmask;
+ else
+ calldata->arg.bitmask = NULL;
+ }
if (calldata->roc)
pnfs_roc_get_barrier(inode, &calldata->roc_barrier);
@@ -3228,7 +3235,6 @@ int nfs4_do_close(struct nfs4_state *state, gfp_t gfp_mask, int wait)
if (IS_ERR(calldata->arg.seqid))
goto out_free_calldata;
calldata->arg.fmode = 0;
- calldata->arg.bitmask = server->cache_consistency_bitmask;
calldata->res.fattr = &calldata->fattr;
calldata->res.seqid = calldata->arg.seqid;
calldata->res.server = server;
diff --git a/fs/nfs/nfs4xdr.c b/fs/nfs/nfs4xdr.c
index 43cc989b5c06..a8bebb52df78 100644
--- a/fs/nfs/nfs4xdr.c
+++ b/fs/nfs/nfs4xdr.c
@@ -2250,7 +2250,8 @@ static void nfs4_xdr_enc_close(struct rpc_rqst *req, struct xdr_stream *xdr,
encode_sequence(xdr, &args->seq_args, &hdr);
encode_putfh(xdr, args->fh, &hdr);
encode_close(xdr, args, &hdr);
- encode_getfattr(xdr, args->bitmask, &hdr);
+ if (args->bitmask != NULL)
+ encode_getfattr(xdr, args->bitmask, &hdr);
encode_nops(&hdr);
}
--
2.7.4
^ permalink raw reply related
* [PATCH v2 5/5] NFSv4: Optimise away forced revalidation when we know the attributes are OK
From: Trond Myklebust @ 2016-11-14 20:55 UTC (permalink / raw)
To: linux-nfs
In-Reply-To: <1479156935-34479-5-git-send-email-trond.myklebust@primarydata.com>
The NFS_INO_REVAL_FORCED flag needs to be set if we just got a delegation,
and we see that there might still be some ambiguity as to whether or not
our attribute or data cache are valid.
In practice, this means that a call to nfs_check_inode_attributes() will
have noticed a discrepancy between cached attributes and measured ones,
so let's move the setting of NFS_INO_REVAL_FORCED to there.
Signed-off-by: Trond Myklebust <trond.myklebust@primarydata.com>
---
fs/nfs/delegation.c | 4 ----
fs/nfs/inode.c | 2 +-
2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/fs/nfs/delegation.c b/fs/nfs/delegation.c
index dff600ae0d74..d7df5e67b0c1 100644
--- a/fs/nfs/delegation.c
+++ b/fs/nfs/delegation.c
@@ -391,10 +391,6 @@ int nfs_inode_set_delegation(struct inode *inode, struct rpc_cred *cred, struct
rcu_assign_pointer(nfsi->delegation, delegation);
delegation = NULL;
- /* Ensure we revalidate the attributes and page cache! */
- spin_lock(&inode->i_lock);
- nfsi->cache_validity |= NFS_INO_REVAL_FORCED;
- spin_unlock(&inode->i_lock);
trace_nfs4_set_delegation(inode, res->delegation_type);
out:
diff --git a/fs/nfs/inode.c b/fs/nfs/inode.c
index bf4ec5ecc97e..3575e3408bd7 100644
--- a/fs/nfs/inode.c
+++ b/fs/nfs/inode.c
@@ -1317,7 +1317,7 @@ static int nfs_check_inode_attributes(struct inode *inode, struct nfs_fattr *fat
invalid |= NFS_INO_INVALID_ATIME;
if (invalid != 0)
- nfs_set_cache_invalid(inode, invalid);
+ nfs_set_cache_invalid(inode, invalid | NFS_INO_REVAL_FORCED);
nfsi->read_cache_jiffies = fattr->time_start;
return 0;
--
2.7.4
^ permalink raw reply related
* [Qemu-devel] [PATCH 0/3] Migration fixes
From: Juan Quintela @ 2016-11-14 20:55 UTC (permalink / raw)
To: qemu-devel; +Cc: amit.shah, dgilbert
Hi
This are the fixes that were of the multifd patches.
The most important one is the second patch, that one that checks for valid flags on reception.
Please, review.
Juan Quintela (3):
migration: create Migration Incoming State at init time
migration: Test for disabled features on reception
migration: Don't create decompression threads if not enabled
include/migration/migration.h | 1 -
migration/migration.c | 38 +++++++++++++++++---------------------
migration/ram.c | 29 ++++++++++++++++++++++++++++-
migration/savevm.c | 4 ++--
4 files changed, 47 insertions(+), 25 deletions(-)
--
2.7.4
^ permalink raw reply
* [Qemu-devel] [PATCH 2/3] migration: Test for disabled features on reception
From: Juan Quintela @ 2016-11-14 20:55 UTC (permalink / raw)
To: qemu-devel; +Cc: amit.shah, dgilbert
In-Reply-To: <1479156950-2517-1-git-send-email-quintela@redhat.com>
Right now, if we receive a compressed page or a xbzrle page while this
features are disabled, Bad Things (TM) can happen. Just add a test for
them.
Signed-off-by: Juan Quintela <quintela@redhat.com>
---
migration/ram.c | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/migration/ram.c b/migration/ram.c
index fb9252d..4bb707c 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -2464,7 +2464,7 @@ static int ram_load_postcopy(QEMUFile *f)
static int ram_load(QEMUFile *f, void *opaque, int version_id)
{
- int flags = 0, ret = 0;
+ int flags = 0, ret = 0, invalid_flags;
static uint64_t seq_iter;
int len = 0;
/*
@@ -2479,6 +2479,15 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id)
ret = -EINVAL;
}
+ invalid_flags = 0;
+
+ if (!migrate_use_xbzrle()) {
+ invalid_flags |= RAM_SAVE_FLAG_XBZRLE;
+ }
+
+ if (!migrate_use_compression()) {
+ invalid_flags |= RAM_SAVE_FLAG_COMPRESS_PAGE;
+ }
/* This RCU critical section can be very long running.
* When RCU reclaims in the code start to become numerous,
* it will be necessary to reduce the granularity of this
@@ -2499,6 +2508,18 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id)
flags = addr & ~TARGET_PAGE_MASK;
addr &= TARGET_PAGE_MASK;
+ if (flags & invalid_flags) {
+ if (flags & invalid_flags & RAM_SAVE_FLAG_XBZRLE) {
+ error_report("Received an unexpected XBRLE page");
+ }
+ if (flags & invalid_flags & RAM_SAVE_FLAG_COMPRESS_PAGE) {
+ error_report("Received an unexpected compressed page");
+ }
+
+ ret = -EINVAL;
+ break;
+ }
+
if (flags & (RAM_SAVE_FLAG_COMPRESS | RAM_SAVE_FLAG_PAGE |
RAM_SAVE_FLAG_COMPRESS_PAGE | RAM_SAVE_FLAG_XBZRLE)) {
RAMBlock *block = ram_block_from_stream(f, flags);
--
2.7.4
^ permalink raw reply related
* [Qemu-devel] [PATCH 1/3] migration: create Migration Incoming State at init time
From: Juan Quintela @ 2016-11-14 20:55 UTC (permalink / raw)
To: qemu-devel; +Cc: amit.shah, dgilbert
In-Reply-To: <1479156950-2517-1-git-send-email-quintela@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
---
include/migration/migration.h | 1 -
migration/migration.c | 38 +++++++++++++++++---------------------
migration/savevm.c | 4 ++--
3 files changed, 19 insertions(+), 24 deletions(-)
diff --git a/include/migration/migration.h b/include/migration/migration.h
index c309d23..a184509 100644
--- a/include/migration/migration.h
+++ b/include/migration/migration.h
@@ -119,7 +119,6 @@ struct MigrationIncomingState {
};
MigrationIncomingState *migration_incoming_get_current(void);
-MigrationIncomingState *migration_incoming_state_new(QEMUFile *f);
void migration_incoming_state_destroy(void);
/*
diff --git a/migration/migration.c b/migration/migration.c
index e331f28..51ca9b4 100644
--- a/migration/migration.c
+++ b/migration/migration.c
@@ -111,32 +111,28 @@ MigrationState *migrate_get_current(void)
return ¤t_migration;
}
-/* For incoming */
-static MigrationIncomingState *mis_current;
-
MigrationIncomingState *migration_incoming_get_current(void)
{
- return mis_current;
-}
+ static bool once;
+ static MigrationIncomingState mis_current;
-MigrationIncomingState *migration_incoming_state_new(QEMUFile* f)
-{
- mis_current = g_new0(MigrationIncomingState, 1);
- mis_current->from_src_file = f;
- mis_current->state = MIGRATION_STATUS_NONE;
- QLIST_INIT(&mis_current->loadvm_handlers);
- qemu_mutex_init(&mis_current->rp_mutex);
- qemu_event_init(&mis_current->main_thread_load_event, false);
-
- return mis_current;
+ if (!once) {
+ mis_current.state = MIGRATION_STATUS_NONE;
+ memset(&mis_current, 0, sizeof(MigrationIncomingState));
+ QLIST_INIT(&mis_current.loadvm_handlers);
+ qemu_mutex_init(&mis_current.rp_mutex);
+ qemu_event_init(&mis_current.main_thread_load_event, false);
+ once = true;
+ }
+ return &mis_current;
}
void migration_incoming_state_destroy(void)
{
- qemu_event_destroy(&mis_current->main_thread_load_event);
- loadvm_free_handlers(mis_current);
- g_free(mis_current);
- mis_current = NULL;
+ struct MigrationIncomingState *mis = migration_incoming_get_current();
+
+ qemu_event_destroy(&mis->main_thread_load_event);
+ loadvm_free_handlers(mis);
}
@@ -382,11 +378,11 @@ static void process_incoming_migration_bh(void *opaque)
static void process_incoming_migration_co(void *opaque)
{
QEMUFile *f = opaque;
- MigrationIncomingState *mis;
+ MigrationIncomingState *mis = migration_incoming_get_current();
PostcopyState ps;
int ret;
- mis = migration_incoming_state_new(f);
+ mis->from_src_file = f;
postcopy_state_set(POSTCOPY_INCOMING_NONE);
migrate_set_state(&mis->state, MIGRATION_STATUS_NONE,
MIGRATION_STATUS_ACTIVE);
diff --git a/migration/savevm.c b/migration/savevm.c
index 0363372..d44a38c 100644
--- a/migration/savevm.c
+++ b/migration/savevm.c
@@ -2159,7 +2159,6 @@ void qmp_xen_load_devices_state(const char *filename, Error **errp)
qio_channel_set_name(QIO_CHANNEL(ioc), "migration-xen-load-state");
f = qemu_fopen_channel_input(QIO_CHANNEL(ioc));
- migration_incoming_state_new(f);
ret = qemu_loadvm_state(f);
qemu_fclose(f);
if (ret < 0) {
@@ -2175,6 +2174,7 @@ int load_vmstate(const char *name)
QEMUFile *f;
int ret;
AioContext *aio_context;
+ MigrationIncomingState *mis = migration_incoming_get_current();
if (!bdrv_all_can_snapshot(&bs)) {
error_report("Device '%s' is writable but does not support snapshots.",
@@ -2225,7 +2225,7 @@ int load_vmstate(const char *name)
}
qemu_system_reset(VMRESET_SILENT);
- migration_incoming_state_new(f);
+ mis->from_src_file = f;
aio_context_acquire(aio_context);
ret = qemu_loadvm_state(f);
--
2.7.4
^ permalink raw reply related
* [Qemu-devel] [PATCH 3/3] migration: Don't create decompression threads if not enabled
From: Juan Quintela @ 2016-11-14 20:55 UTC (permalink / raw)
To: qemu-devel; +Cc: amit.shah, dgilbert
In-Reply-To: <1479156950-2517-1-git-send-email-quintela@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
--
I removed the [HACK] part because previous patch just check that
compression pages are not received.
Signed-off-by: Juan Quintela <quintela@redhat.com>
---
migration/ram.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/migration/ram.c b/migration/ram.c
index 4bb707c..24e2591 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -2260,6 +2260,9 @@ void migrate_decompress_threads_create(void)
{
int i, thread_count;
+ if (!migrate_use_compression()) {
+ return;
+ }
thread_count = migrate_decompress_threads();
decompress_threads = g_new0(QemuThread, thread_count);
decomp_param = g_new0(DecompressParam, thread_count);
@@ -2281,6 +2284,9 @@ void migrate_decompress_threads_join(void)
{
int i, thread_count;
+ if (!migrate_use_compression()) {
+ return;
+ }
thread_count = migrate_decompress_threads();
for (i = 0; i < thread_count; i++) {
qemu_mutex_lock(&decomp_param[i].mutex);
--
2.7.4
^ permalink raw reply related
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