* [PATCH 26/26] ARM: tegra: colibri_t30: update compatibility comment
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Update compatibility comment.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index e10e0f2b6034..cf7637cfb47d 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -3,7 +3,7 @@
/*
* Toradex Colibri T30 Module Device Tree
- * Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E; IT: V1.1A
+ * Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E, V1.1F; IT: V1.1A, V1.1B
*/
/ {
model = "Toradex Colibri T30";
--
2.14.4
^ permalink raw reply related
* [PATCH 4.17 59/63] net: usb: asix: replace mii_nway_restart in resume path
From: Greg Kroah-Hartman @ 2018-07-23 12:25 UTC (permalink / raw)
To: linux-kernel
Cc: Greg Kroah-Hartman, stable, Alexander Couzens, David S. Miller
In-Reply-To: <20180723122446.351334162@linuxfoundation.org>
4.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Alexander Couzens <lynxis@fe80.eu>
[ Upstream commit 5c968f48021a9b3faa61ac2543cfab32461c0e05 ]
mii_nway_restart is not pm aware which results in a rtnl deadlock.
Implement mii_nway_restart manual by setting BMCR_ANRESTART if
BMCR_ANENABLE is set.
To reproduce:
* plug an asix based usb network interface
* wait until the device enters PM (~5 sec)
* `ip link set eth1 up` will never return
Fixes: d9fe64e51114 ("net: asix: Add in_pm parameter")
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/net/usb/asix_devices.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--- a/drivers/net/usb/asix_devices.c
+++ b/drivers/net/usb/asix_devices.c
@@ -642,10 +642,12 @@ static void ax88772_restore_phy(struct u
priv->presvd_phy_advertise);
/* Restore BMCR */
+ if (priv->presvd_phy_bmcr & BMCR_ANENABLE)
+ priv->presvd_phy_bmcr |= BMCR_ANRESTART;
+
asix_mdio_write_nopm(dev->net, dev->mii.phy_id, MII_BMCR,
priv->presvd_phy_bmcr);
- mii_nway_restart(&dev->mii);
priv->presvd_phy_advertise = 0;
priv->presvd_phy_bmcr = 0;
}
^ permalink raw reply
* [PATCH 25/26] ARM: tegra: colibri_t30: annotate ehci instance 1
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Annotate EHCI instance 1 (USB2_DP/N) connecting to ASIX AX88772B USB to
Ethernet chip being on-module.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index d3f72e567d5a..e10e0f2b6034 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -939,7 +939,7 @@
};
};
- /* EHCI instance 1: USB2_DP/N -> AX88772B */
+ /* EHCI instance 1: USB2_DP/N -> AX88772B (On-module) */
usb@7d004000 {
status = "okay";
#address-cells = <1>;
--
2.14.4
^ permalink raw reply related
* [PATCH 24/26] ARM: tegra: colibri_t30: annotate sd card detect
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Annotate SD card detect.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 08ca7cc7e0db..c0b41faa4503 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -102,7 +102,7 @@
sdhci@78000200 {
status = "okay";
bus-width = <4>;
- cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
+ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
no-1-8-v;
};
--
2.14.4
^ permalink raw reply related
* [PATCH 23/26] ARM: tegra: colibri_t30: enable hda over hdmi
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Enable HDA over HDMI.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 7f7a693f6e08..d3f72e567d5a 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -911,6 +911,10 @@
};
};
+ hda@70030000 {
+ status = "okay";
+ };
+
ahub@70080000 {
i2s@70080500 {
status = "okay";
--
2.14.4
^ permalink raw reply related
* [PATCH 22/26] ARM: tegra: colibri_t30: add gpio hog to unreset usb ethernet chip
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add GPIO hog to unreset ASIX AX88772B USB Ethernet chip.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index e32109475bc8..7f7a693f6e08 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -1034,3 +1034,12 @@
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
+
+&gpio {
+ lan_reset_n {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LAN_RESET#";
+ };
+};
--
2.14.4
^ permalink raw reply related
* [PATCH 21/26] ARM: tegra: colibri_t30: remove unused nvidia,is-wired property
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Remove unused nvidia,is-wired property.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 211457ea0b72..e32109475bc8 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -949,7 +949,6 @@
usb-phy@7d004000 {
status = "okay";
- nvidia,is-wired = <1>;
vbus-supply = <®_lan_v_bus>;
};
--
2.14.4
^ permalink raw reply related
* [PATCH 20/26] ARM: tegra: colibri_t30: move input include to carrier board
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Move input include to carrier board.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 1 +
arch/arm/boot/dts/tegra30-colibri.dtsi | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index d888180e0507..08ca7cc7e0db 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
+#include <dt-bindings/input/input.h>
#include "tegra30-colibri.dtsi"
/ {
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 27e81ffb35c3..211457ea0b72 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0
-#include <dt-bindings/input/input.h>
#include "tegra30.dtsi"
/*
--
2.14.4
^ permalink raw reply related
* [PATCH 19/26] ARM: tegra: colibri_t30: line break long compatible property line
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Line break long compatible property line.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 75373bf17b20..d888180e0507 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -5,7 +5,8 @@
/ {
model = "Toradex Colibri T30 on Colibri Evaluation Board";
- compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30", "nvidia,tegra30";
+ compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30",
+ "nvidia,tegra30";
aliases {
rtc0 = "/i2c@7000c000/rtc@68";
--
2.14.4
^ permalink raw reply related
* [PATCH 18/26] ARM: tegra: colibri_t30: rename clk to clock
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Rename clk to clock.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +-
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 621cd15cdfd1..75373bf17b20 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -136,7 +136,7 @@
};
clocks {
- clk16m: clk@1 {
+ clk16m: clock@1 {
compatible = "fixed-clock";
reg = <1>;
#clock-cells = <0>;
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 14ce77ebf4a5..27e81ffb35c3 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -959,7 +959,7 @@
#address-cells = <1>;
#size-cells = <0>;
- clk32k_in: clk@0 {
+ clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
--
2.14.4
^ permalink raw reply related
* Zram writeback feature unstable with heavy swap utilization - BUG: Bad page state in process...
From: Tino Lehnig @ 2018-07-23 12:29 UTC (permalink / raw)
To: minchan, ngupta; +Cc: linux-kernel
[-- Attachment #1: Type: text/plain, Size: 7164 bytes --]
Hello,
after enabling the writeback feature in zram, I encountered the kernel
bug below with heavy swap utilization. There is one specific workload
that triggers the bug reliably and that is running Windows in KVM while
overcommitting memory. The Windows VMs would fill all allocated memory
with zero pages while booting. A few seconds after the host hits zram
swap, the console on the host is flooded with the bug message. A few
more seconds later I also encountered filesystem errors on the host
causing the root filesystem to be mounted read-only. The filesystem
errors do not occur when leaving RAM available for the host OS by
limiting physical memory of the QEMU processes via cgroups.
I started three KVM instances with the following commands in my tests.
Any Windows ISO or disk image can be used. Less instances and smaller
allocated memory will also trigger the bug as long as swapping occurs.
The type of writeback device does not seem to matter. I have tried a
SATA SSD and an NVMe Optane drive so far. My test machine has 256 GB of
RAM and one CPU. I saw the same behavior on another machine with two
CPUs and 128 GB of RAM.
The bug does not occur when using zram as swap without "backing_dev"
being set, but I had even more severe problems when running the same
test on Ubuntu Kernels 4.15 and 4.17. Regardless of the writeback
feature being used or not, the host would eventually lock up entirely
when swap is in use on zram. The lockups may not be related directly to
zram though and were apparently fixed in 4.18. I had absolutely no
problems on Ubuntu Kernel 4.13 either, before the writeback feature was
introduced.
Thank you for your attention.
--
commands used:
modprobe zram
echo 1 > /sys/block/zram0/reset
echo lz4 > /sys/block/zram0/comp_algorithm
echo /dev/nvme0n1 > /sys/block/zram0/backing_dev
echo 256G > /sys/block/zram0/disksize
mkswap /dev/zram0
swapon /dev/zram0
kvm -nographic -smp 20 -m 131072 -cdrom winpe.iso
--
log message:
BUG: Bad page state in process qemu-system-x86 pfn:3dfab21
page:ffffdfb137eac840 count:0 mapcount:0 mapping:0000000000000000 index:0x1
flags: 0x17fffc000000008(uptodate)
raw: 017fffc000000008 dead000000000100 dead000000000200 0000000000000000
raw: 0000000000000001 0000000000000000 00000000ffffffff 0000000000000000
page dumped because: PAGE_FLAGS_CHECK_AT_PREP flag set
bad because of flags: 0x8(uptodate)
Modules linked in: lz4 lz4_compress zram zsmalloc intel_rapl sb_edac
x86_pkg_temp_thermal intel_powerclamp coretemp kvm_intel kvm irqbypass
crct10dif_pclmul crc32_pclmul ghash_clmulni_intel bin
fmt_misc pcbc aesni_intel aes_x86_64 crypto_simd cryptd iTCO_wdt
glue_helper iTCO_vendor_support intel_cstate lpc_ich mei_me intel_uncore
intel_rapl_perf pcspkr joydev sg mfd_core ioatdma mei wmi evdev ipmi_si
ipmi_devintf ipmi_msghandler
acpi_power_meter acpi_pad button ip_tables x_tables autofs4 ext4
crc32c_generic crc16 mbcache jbd2 fscrypto hid_generic usbhid hid sd_mod
xhci_pci ehci_pci ahci libahci xhci_hcd ehci_hcd libata igb i2c_algo_bit
crc32c_intel scsi_mod i2c_i8
01 dca usbcore
CPU: 4 PID: 1039 Comm: qemu-system-x86 Tainted: G B
4.18.0-rc5+ #1
Hardware name: Supermicro Super Server/X10SRL-F, BIOS 2.0b 05/02/2017
Call Trace:
dump_stack+0x5c/0x7b
bad_page+0xba/0x120
get_page_from_freelist+0x1016/0x1250
__alloc_pages_nodemask+0xfa/0x250
alloc_pages_vma+0x7c/0x1c0
do_swap_page+0x347/0x920
? __update_load_avg_se.isra.38+0x1eb/0x1f0
? cpumask_next_wrap+0x3d/0x60
__handle_mm_fault+0x7b4/0x1110
? update_load_avg+0x5ea/0x720
handle_mm_fault+0xfc/0x1f0
__get_user_pages+0x12f/0x690
get_user_pages_unlocked+0x148/0x1f0
__gfn_to_pfn_memslot+0xff/0x3c0 [kvm]
try_async_pf+0x87/0x230 [kvm]
tdp_page_fault+0x132/0x290 [kvm]
? vmexit_fill_RSB+0xc/0x30 [kvm_intel]
kvm_mmu_page_fault+0x74/0x570 [kvm]
? vmexit_fill_RSB+0xc/0x30 [kvm_intel]
? vmexit_fill_RSB+0x18/0x30 [kvm_intel]
? vmexit_fill_RSB+0xc/0x30 [kvm_intel]
? vmexit_fill_RSB+0x18/0x30 [kvm_intel]
? vmexit_fill_RSB+0xc/0x30 [kvm_intel]
? vmexit_fill_RSB+0x18/0x30 [kvm_intel]
? vmexit_fill_RSB+0xc/0x30 [kvm_intel]
? vmexit_fill_RSB+0x18/0x30 [kvm_intel]
? vmexit_fill_RSB+0xc/0x30 [kvm_intel]
? vmexit_fill_RSB+0x18/0x30 [kvm_intel]
? vmexit_fill_RSB+0xc/0x30 [kvm_intel]
? vmx_vcpu_run+0x375/0x620 [kvm_intel]
kvm_arch_vcpu_ioctl_run+0x9b3/0x1990 [kvm]
? __update_load_avg_se.isra.38+0x1eb/0x1f0
? kvm_vcpu_ioctl+0x388/0x5d0 [kvm]
kvm_vcpu_ioctl+0x388/0x5d0 [kvm]
? __switch_to+0x395/0x450
? __switch_to+0x395/0x450
do_vfs_ioctl+0xa2/0x630
? __schedule+0x3fd/0x890
ksys_ioctl+0x70/0x80
? exit_to_usermode_loop+0xca/0xf0
__x64_sys_ioctl+0x16/0x20
do_syscall_64+0x55/0x100
entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x7fb30361add7
Code: 00 00 00 48 8b 05 c1 80 2b 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff
ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d 01
f0 ff ff 73 01 c3 48 8b 0d 91 80 2b 00 f7 d8 64 89 01 48
RSP: 002b:00007fb2e97f98b8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
RAX: ffffffffffffffda RBX: 000000000000ae80 RCX: 00007fb30361add7
RDX: 0000000000000000 RSI: 000000000000ae80 RDI: 0000000000000015
RBP: 00005652b984e0f0 R08: 00005652b7d513d0 R09: 0000000000000001
R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
R13: 00007fb308c66000 R14: 0000000000000000 R15: 00005652b984e0f0
--
ver_linux: Debian 9.5 with Kernel 4.18.0-rc5+
GNU C 6.3.0
GNU Make 4.1
Binutils 2.28
Util-linux 2.29.2
Mount 2.29.2
Module-init-tools 23
E2fsprogs 1.43.4
Linux C Library 2.24
Dynamic linker (ldd) 2.24
Linux C++ Library 6.0.22
Procps 3.3.12
Kbd 2.0.3
Console-tools 2.0.3
Sh-utils 8.26
Udev 232
--
cpuinfo:
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 79
model name : Intel(R) Xeon(R) CPU E5-2630 v4 @ 2.20GHz
stepping : 1
microcode : 0xb000021
cpu MHz : 1200.632
cache size : 25600 KB
physical id : 0
siblings : 20
core id : 0
cpu cores : 10
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 20
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl
xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor
ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1
sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand
lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single
pti intel_ppin tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust
bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a rdseed adx smap
intel_pt xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local
dtherm ida arat pln pts
bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass
bogomips : 4400.00
clflush size : 64
cache_alignment : 64
address sizes : 46 bits physical, 48 bits virtual
power management:
--
Kind regards,
Tino Lehnig
[-- Attachment #2: config-4.18.0-rc5+.gz --]
[-- Type: application/gzip, Size: 40628 bytes --]
^ permalink raw reply
* [PATCH 17/26] ARM: tegra: colibri_t30: enable emmc ddr52 mode
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add mmc-ddr-1_8v property enabling eMMC DDR52 mode.
root@colibri-t30:~# cat /sys/kernel/debug/mmc1/ios
clock: 52000000 Hz
actual clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 8 (mmc DDR52)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
root@colibri-t30:~# hdparm -t /dev/mmcblk1
/dev/mmcblk1:
Timing buffered disk reads: 222 MB in 3.00 seconds = 73.92 MB/sec
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 0a2115f59e41..14ce77ebf4a5 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -927,6 +927,7 @@
non-removable;
vmmc-supply = <®_module_3v3>; /* VCC */
vqmmc-supply = <®_1v8_vio>; /* VCCQ */
+ mmc-ddr-1_8v;
emmc: emmc@0 {
reg = <0>;
--
2.14.4
^ permalink raw reply related
* [PATCH 16/26] ARM: tegra: colibri_t30: add proper emmc vmmc and vqmmc supplies
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add proper eMMC vmmc and vqmmc supplies e.g. fixing signalling voltage.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 6608243e1d55..0a2115f59e41 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -925,6 +925,8 @@
#size-cells = <0>;
bus-width = <8>;
non-removable;
+ vmmc-supply = <®_module_3v3>; /* VCC */
+ vqmmc-supply = <®_1v8_vio>; /* VCCQ */
emmc: emmc@0 {
reg = <0>;
--
2.14.4
^ permalink raw reply related
* [PATCH 15/26] ARM: tegra: colibri_t30: add i2c-thermtrip
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add i2c-thermtrip which would set the DEV_OFF bit in the DCDC control
register of the TPS65911 PMIC.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 8266e42e1630..6608243e1d55 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -902,6 +902,14 @@
nvidia,core-pwr-off-time = <0>;
nvidia,core-power-req-active-high;
nvidia,sys-clock-req-active-high;
+
+ /* Set DEV_OFF bit in DCDC control register of TPS65911 PMIC */
+ i2c-thermtrip {
+ nvidia,i2c-controller-id = <4>;
+ nvidia,bus-addr = <0x2d>;
+ nvidia,reg-addr = <0x3e>;
+ nvidia,reg-data = <0x1>;
+ };
};
ahub@70080000 {
--
2.14.4
^ permalink raw reply related
* [PATCH 14/26] ARM: tegra: colibri_t30: further lm95245 temperature sensor annotation
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Further LM95245 temperature sensor annotation.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index ace72a53186a..8266e42e1630 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -870,7 +870,7 @@
/*
* LM95245 temperature sensor
- * Note: OVERT_N directly connected to PMIC PWRDN
+ * Note: OVERT1# directly connected to TPS65911 PMIC PWRDN
*/
temp-sensor@4c {
compatible = "national,lm95245";
--
2.14.4
^ permalink raw reply related
* [PATCH 13/26] ARM: tegra: colibri_t30: use proper irq-gpio for stmpe811
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Use proper irq-gpio for stmpe811 touch controller.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index c80b9bf44752..ace72a53186a 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -836,8 +836,7 @@
stmpe811@41 {
compatible = "st,stmpe811";
reg = <0x41>;
- interrupts = <TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
- interrupt-parent = <&gpio>;
+ irq-gpio = <&gpio TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
id = <0>;
blocks = <0x5>;
--
2.14.4
^ permalink raw reply related
* [PATCH 12/26] ARM: tegra: colibri_t30: add missing pinmux
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Explicitly mux all T30 SoC balls now:
- Colibri Address/Data Bus (GMI)
- Colibri DDC
- Colibri EXT_IO*
- Colibri GPIO
- Colibri HOTPLUG_DETECT (HDMI)
- Colibri I2C
- Colibri LCD (L_* resp. LDD<*>)
- Colibri MMC_CD
- Colibri nRESET_OUT
- Colibri Parallel Camera (Optional)
- Colibri PWM<B>, <C>, <D>
- Colibri VGA
- Colibri USBC_DET
- Colibri USBH_PEN
- Colibri USBH_OC
- on-module AX88772B LAN control signals
- Colibri nBATT_FAULT(SENSE) and nVDD_FAULT(SENSE
- not connected and therefore disabled signals
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 486 +++++++++++++++++++++++++++++++++
1 file changed, 486 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 55dcd9d0dcce..c80b9bf44752 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -47,6 +47,156 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ /* Colibri Address/Data Bus (GMI) */
+ gmi_ad0_pg0 {
+ nvidia,pins = "gmi_ad0_pg0",
+ "gmi_ad2_pg2",
+ "gmi_ad3_pg3",
+ "gmi_ad4_pg4",
+ "gmi_ad5_pg5",
+ "gmi_ad6_pg6",
+ "gmi_ad7_pg7",
+ "gmi_ad8_ph0",
+ "gmi_ad9_ph1",
+ "gmi_ad10_ph2",
+ "gmi_ad11_ph3",
+ "gmi_ad12_ph4",
+ "gmi_ad13_ph5",
+ "gmi_ad14_ph6",
+ "gmi_ad15_ph7",
+ "gmi_adv_n_pk0",
+ "gmi_clk_pk1",
+ "gmi_cs4_n_pk2",
+ "gmi_cs2_n_pk3",
+ "gmi_iordy_pi5",
+ "gmi_oe_n_pi1",
+ "gmi_wait_pi7",
+ "gmi_wr_n_pi0",
+ "dap1_fs_pn0",
+ "dap1_din_pn1",
+ "dap1_dout_pn2",
+ "dap1_sclk_pn3",
+ "dap2_fs_pa2",
+ "dap2_sclk_pa3",
+ "dap2_din_pa4",
+ "dap2_dout_pa5",
+ "spi1_sck_px5",
+ "spi1_mosi_px4",
+ "spi1_cs0_n_px6",
+ "spi2_cs0_n_px3",
+ "spi2_miso_px1",
+ "spi2_mosi_px0",
+ "spi2_sck_px2",
+ "uart2_cts_n_pj5",
+ "uart2_rts_n_pj6";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ /* Further pins may be used as GPIOs */
+ dap4_din_pp5 {
+ nvidia,pins = "dap4_din_pp5",
+ "dap4_dout_pp6",
+ "dap4_fs_pp4",
+ "dap4_sclk_pp7",
+ "pbb7",
+ "sdmmc1_clk_pz0",
+ "sdmmc1_cmd_pz1",
+ "sdmmc1_dat0_py7",
+ "sdmmc1_dat1_py6",
+ "sdmmc1_dat3_py4",
+ "uart3_cts_n_pa1",
+ "uart3_txd_pw6",
+ "uart3_rxd_pw7";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_d18_pm2 {
+ nvidia,pins = "lcd_d18_pm2",
+ "lcd_d19_pm3",
+ "lcd_d20_pm4",
+ "lcd_d21_pm5",
+ "lcd_d22_pm6",
+ "lcd_d23_pm7",
+ "lcd_dc0_pn6",
+ "pex_l2_clkreq_n_pcc7";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_cs0_n_pn4 {
+ nvidia,pins = "lcd_cs0_n_pn4",
+ "lcd_sdin_pz2",
+ "pu0",
+ "pu1",
+ "pu2",
+ "pu3",
+ "pu4",
+ "pu5",
+ "pu6",
+ "spi1_miso_px7",
+ "uart3_rts_n_pc0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_pwr0_pb2 {
+ nvidia,pins = "lcd_pwr0_pb2",
+ "lcd_sck_pz4",
+ "lcd_sdout_pn5",
+ "lcd_wr_n_pz3";
+ nvidia,function = "hdcp";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb4 {
+ nvidia,pins = "pbb4",
+ "pbb5",
+ "pbb6";
+ nvidia,function = "displayb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ /* Multiplexed RDnWR and therefore disabled */
+ lcd_cs1_n_pw0 {
+ nvidia,pins = "lcd_cs1_n_pw0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ /* Multiplexed GMI_CLK and therefore disabled */
+ owr {
+ nvidia,pins = "owr";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ /* Tri-stating GMI_WR_N on nPWE SODIMM pin 99 */
+ sdmmc3_dat4_pd1 {
+ nvidia,pins = "sdmmc3_dat4_pd1";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ /* Not tri-stating GMI_WR_N on RDnWR SODIMM pin 93 */
+ sdmmc3_dat5_pd0 {
+ nvidia,pins = "sdmmc3_dat5_pd0";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
/* Colibri BL_ON */
pv2 {
nvidia,pins = "pv2";
@@ -72,6 +222,113 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
+ /* Colibri DDC */
+ ddc_scl_pv4 {
+ nvidia,pins = "ddc_scl_pv4",
+ "ddc_sda_pv5";
+ nvidia,function = "i2c4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri EXT_IO* */
+ gen2_i2c_scl_pt5 {
+ nvidia,pins = "gen2_i2c_scl_pt5",
+ "gen2_i2c_sda_pt6";
+ nvidia,function = "rsvd4";
+ nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spdif_in_pk6 {
+ nvidia,pins = "spdif_in_pk6";
+ nvidia,function = "hda";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri GPIO */
+ clk2_out_pw5 {
+ nvidia,pins = "clk2_out_pw5",
+ "pcc2",
+ "pv3",
+ "sdmmc1_dat2_py5";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_pwr1_pc1 {
+ nvidia,pins = "lcd_pwr1_pc1",
+ "pex_l1_clkreq_n_pdd6",
+ "pex_l1_rst_n_pdd5";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pv1 {
+ nvidia,pins = "pv1",
+ "sdmmc3_dat0_pb7",
+ "sdmmc3_dat1_pb6";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri HOTPLUG_DETECT (HDMI) */
+ hdmi_int_pn7 {
+ nvidia,pins = "hdmi_int_pn7";
+ nvidia,function = "hdmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri I2C */
+ gen1_i2c_scl_pc4 {
+ nvidia,pins = "gen1_i2c_scl_pc4",
+ "gen1_i2c_sda_pc5";
+ nvidia,function = "i2c1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri LCD (L_* resp. LDD<*>) */
+ lcd_d0_pe0 {
+ nvidia,pins = "lcd_d0_pe0",
+ "lcd_d1_pe1",
+ "lcd_d2_pe2",
+ "lcd_d3_pe3",
+ "lcd_d4_pe4",
+ "lcd_d5_pe5",
+ "lcd_d6_pe6",
+ "lcd_d7_pe7",
+ "lcd_d8_pf0",
+ "lcd_d9_pf1",
+ "lcd_d10_pf2",
+ "lcd_d11_pf3",
+ "lcd_d12_pf4",
+ "lcd_d13_pf5",
+ "lcd_d14_pf6",
+ "lcd_d15_pf7",
+ "lcd_d16_pm0",
+ "lcd_d17_pm1",
+ "lcd_de_pj1",
+ "lcd_hsync_pj3",
+ "lcd_pclk_pb3",
+ "lcd_vsync_pj4";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
/*
* Colibri L_BIAS, LCD_M1 is muxed with LCD_DE
* todays display need DE, disable LCD_M1
@@ -101,6 +358,105 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ /* Colibri MMC_CD */
+ gmi_wp_n_pc7 {
+ nvidia,pins = "gmi_wp_n_pc7";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ /* Multiplexed and therefore disabled */
+ cam_mclk_pcc0 {
+ nvidia,pins = "cam_mclk_pcc0";
+ nvidia,function = "vi_alt3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ cam_i2c_scl_pbb1 {
+ nvidia,pins = "cam_i2c_scl_pbb1",
+ "cam_i2c_sda_pbb2";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+ };
+ pbb0 {
+ nvidia,pins = "pbb0",
+ "pcc1";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "displayb";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Colibri nRESET_OUT */
+ gmi_rst_n_pi4 {
+ nvidia,pins = "gmi_rst_n_pi4";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ /*
+ * Colibri Parallel Camera (Optional)
+ * pins multiplexed with others and therefore disabled
+ */
+ vi_vsync_pd6 {
+ nvidia,pins = "vi_d0_pt4",
+ "vi_d1_pd5",
+ "vi_d2_pl0",
+ "vi_d3_pl1",
+ "vi_d4_pl2",
+ "vi_d5_pl3",
+ "vi_d6_pl4",
+ "vi_d7_pl5",
+ "vi_d8_pl6",
+ "vi_d9_pl7",
+ "vi_d10_pt2",
+ "vi_d11_pt3",
+ "vi_hsync_pd7",
+ "vi_mclk_pt1",
+ "vi_pclk_pt0",
+ "vi_vsync_pd6";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Colibri PWM<B> */
+ sdmmc3_dat2_pb5 {
+ nvidia,pins = "sdmmc3_dat2_pb5";
+ nvidia,function = "pwm1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Colibri PWM<C> */
+ sdmmc3_clk_pa6 {
+ nvidia,pins = "sdmmc3_clk_pa6";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Colibri PWM<D> */
+ sdmmc3_cmd_pa7 {
+ nvidia,pins = "sdmmc3_cmd_pa7";
+ nvidia,function = "pwm3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
/* Colibri SSP */
ulpi_clk_py0 {
@@ -122,6 +478,16 @@
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
+ /* Colibri VGA not supported and therefore disabled */
+ crt_hsync_pv6 {
+ nvidia,pins = "crt_hsync_pv6",
+ "crt_vsync_pv7";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
/* Colibri UART_A */
ulpi_data0 {
nvidia,pins = "ulpi_data0_po1",
@@ -157,6 +523,32 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ /* Colibri USBC_DET */
+ spdif_out_pk5 {
+ nvidia,pins = "spdif_out_pk5";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri USBH_PEN */
+ spi2_cs1_n_pw2 {
+ nvidia,pins = "spi2_cs1_n_pw2";
+ nvidia,function = "spi2_alt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Colibri USBH_OC */
+ spi2_cs2_n_pw3, {
+ nvidia,pins = "spi2_cs2_n_pw3";
+ nvidia,function = "spi2_alt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
/* eMMC (On-module) */
sdmmc4_clk_pcc4 {
nvidia,pins = "sdmmc4_clk_pcc4",
@@ -182,6 +574,100 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
+ /* LAN_EXT_WAKEUP#, LAN_PME (On-module) */
+ pex_l0_rst_n_pdd1 {
+ nvidia,pins = "pex_l0_rst_n_pdd1",
+ "pex_wake_n_pdd3";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ /* LAN_V_BUS, LAN_RESET# (On-module) */
+ pex_l0_clkreq_n_pdd2 {
+ nvidia,pins = "pex_l0_clkreq_n_pdd2",
+ "pex_l0_prsnt_n_pdd0";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* nBATT_FAULT(SENSE), nVDD_FAULT(SENSE) */
+ pex_l2_rst_n_pcc6 {
+ nvidia,pins = "pex_l2_rst_n_pcc6",
+ "pex_l2_prsnt_n_pdd7";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Not connected and therefore disabled */
+ clk1_req_pee2 {
+ nvidia,pins = "clk1_req_pee2",
+ "pex_l1_prsnt_n_pdd4";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ clk2_req_pcc5 {
+ nvidia,pins = "clk2_req_pcc5",
+ "clk3_out_pee0",
+ "clk3_req_pee1",
+ "clk_32k_out_pa0",
+ "hdmi_cec_pee3",
+ "sys_clk_req_pz5";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_dqs_pi2 {
+ nvidia,pins = "gmi_dqs_pi2",
+ "kb_col2_pq2",
+ "kb_col3_pq3",
+ "kb_col4_pq4",
+ "kb_col5_pq5",
+ "kb_row4_pr4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_col0_pq0 {
+ nvidia,pins = "kb_col0_pq0",
+ "kb_col1_pq1",
+ "kb_col6_pq6",
+ "kb_col7_pq7",
+ "kb_row5_pr5",
+ "kb_row6_pr6",
+ "kb_row7_pr7",
+ "kb_row9_ps1";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row0_pr0 {
+ nvidia,pins = "kb_row0_pr0",
+ "kb_row1_pr1",
+ "kb_row2_pr2",
+ "kb_row3_pr3";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6";
+ nvidia,function = "hdcp";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
/* Power I2C (On-module) */
pwr_i2c_scl_pz6 {
nvidia,pins = "pwr_i2c_scl_pz6",
--
2.14.4
^ permalink raw reply related
* [PATCH 11/26] ARM: tegra: colibri_t30: pinmux clean-up
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Clean-up pinmuxing:
- white-space clean-up
- explicitly disable LCD_M1 in favour of LCD_DE on L_BIAS
- explicitly disable multiplexed SSPFRM and SSPTXD
- get rid of nvidia,lock property
- add missing eMMC sdmmc4_cmd_pt7 and explicitly enable input
- explicitly disable lcd_dc1_pd2 (e.g. LM95245 I2C address pin)
- annotate TOUCH_PEN_INT# being on-module
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 32 ++++++++++++++++++--------------
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index fedcd2f7912b..55dcd9d0dcce 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -38,10 +38,10 @@
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
dap3_fs_pp0 {
- nvidia,pins = "dap3_fs_pp0",
- "dap3_sclk_pp3",
- "dap3_din_pp1",
- "dap3_dout_pp2";
+ nvidia,pins = "dap3_fs_pp0",
+ "dap3_sclk_pp3",
+ "dap3_din_pp1",
+ "dap3_dout_pp2";
nvidia,function = "i2s2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -79,9 +79,9 @@
lcd_m1_pw1 {
nvidia,pins = "lcd_m1_pw1";
nvidia,function = "rsvd3";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
/* Colibri MMC */
@@ -112,12 +112,14 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ /* Multiplexed SSPFRM, SSPTXD and therefore disabled */
sdmmc3_dat6_pd3 {
nvidia,pins = "sdmmc3_dat6_pd3",
"sdmmc3_dat7_pd4";
nvidia,function = "spdif";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
/* Colibri UART_A */
@@ -155,13 +157,15 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- /* eMMC */
+ /* eMMC (On-module) */
sdmmc4_clk_pcc4 {
nvidia,pins = "sdmmc4_clk_pcc4",
+ "sdmmc4_cmd_pt7",
"sdmmc4_rst_n_pcc3";
nvidia,function = "sdmmc4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
sdmmc4_dat0_paa0 {
nvidia,pins = "sdmmc4_dat0_paa0",
@@ -175,6 +179,7 @@
nvidia,function = "sdmmc4";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
/* Power I2C (On-module) */
@@ -185,7 +190,6 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
@@ -197,12 +201,12 @@
lcd_dc1_pd2 {
nvidia,pins = "lcd_dc1_pd2";
nvidia,function = "rsvd3";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
- /* TOUCH_PEN_INT# */
+ /* TOUCH_PEN_INT# (On-module) */
pv0 {
nvidia,pins = "pv0";
nvidia,function = "rsvd1";
--
2.14.4
^ permalink raw reply related
* [PATCH 10/26] ARM: tegra: colibri_t30: drop pwmleds
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Drop pwmleds in favour of using regular PWMs.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 20 --------------------
1 file changed, 20 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index a3c607d07a1b..621cd15cdfd1 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -167,26 +167,6 @@
power-supply = <®_3v3>;
};
- pwmleds {
- compatible = "pwm-leds";
-
- pwmb {
- label = "PWM<B>";
- pwms = <&pwm 1 19600>;
- max-brightness = <255>;
- };
- pwmc {
- label = "PWM<C>";
- pwms = <&pwm 2 19600>;
- max-brightness = <255>;
- };
- pwmd {
- label = "PWM<D>";
- pwms = <&pwm 3 19600>;
- max-brightness = <255>;
- };
- };
-
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V_SW";
--
2.14.4
^ permalink raw reply related
* [PATCH 09/26] ARM: tegra: colibri_t30: reorder backlight properties
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reorder backlight properties.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 70d3a89825a4..a3c607d07a1b 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -127,13 +127,12 @@
backlight: backlight {
compatible = "pwm-backlight";
- /* PWM<A> */
- pwms = <&pwm 0 5000000>;
brightness-levels = <255 128 64 32 16 8 4 0>;
default-brightness-level = <6>;
/* BL_ON */
enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
power-supply = <®_3v3>;
+ pwms = <&pwm 0 5000000>; /* PWM<A> */
};
clocks {
--
2.14.4
^ permalink raw reply related
* Re: [PATCH v3 4/5] compress/zlib: support burst enqueue/dequeue
From: De Lara Guarch, Pablo @ 2018-07-23 12:36 UTC (permalink / raw)
To: Shally Verma
Cc: dev@dpdk.org, pathreya@caviumnetworks.com,
mchalla@caviumnetworks.com, ashish.gupta@caviumnetworks.com,
sunila.sahu@caviumnetworks.com, Sunila Sahu
In-Reply-To: <1532197069-24224-5-git-send-email-shally.verma@caviumnetworks.com>
> -----Original Message-----
> From: Shally Verma [mailto:shally.verma@caviumnetworks.com]
> Sent: Saturday, July 21, 2018 7:18 PM
> To: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>
> Cc: dev@dpdk.org; pathreya@caviumnetworks.com;
> mchalla@caviumnetworks.com; ashish.gupta@caviumnetworks.com;
> sunila.sahu@caviumnetworks.com; Sunila Sahu <ssahu@caviumnetworks.com>
> Subject: [PATCH v3 4/5] compress/zlib: support burst enqueue/dequeue
>
> From: Sunila Sahu <ssahu@caviumnetworks.com>
>
> Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
> Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
> Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
> ---
> drivers/compress/zlib/zlib_pmd.c | 254
...
> +def_end:
> + /* Update op stats */
> + switch (op->status) {
> + case RTE_COMP_OP_STATUS_SUCCESS:
> + op->consumed += strm->total_in;
Compilation issue here:
drivers/compress/zlib/zlib_pmd.c:94:16: error: this statement may fall through [-Werror=implicit-fallthrough=]
op->consumed += strm->total_in;
~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~
I think you are missing a "/* Fall-through */" comment here.
Thanks,
Pablo
> + case RTE_COMP_OP_STATUS_OUT_OF_SPACE_TERMINATED:
> + op->produced += strm->total_out;
> + break;
^ permalink raw reply
* [PATCH 08/26] ARM: tegra: colibri_t30: move dr_mode property from phy to controller
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Move dr_mode property from USB PHY node to controller.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 19af6ccd57b2..70d3a89825a4 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -107,11 +107,11 @@
/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
usb@7d000000 {
status = "okay";
+ dr_mode = "otg";
};
usb-phy@7d000000 {
status = "okay";
- dr_mode = "otg";
vbus-supply = <®_usbc_vbus>;
};
--
2.14.4
^ permalink raw reply related
* [PATCH 07/26] ARM: tegra: colibri_t30: white-space clean-up
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
White-space clean-up.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 5b32a70ceff2..19af6ccd57b2 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -27,6 +27,7 @@
nvidia,panel = <&panel>;
};
};
+
hdmi@54280000 {
status = "okay";
hdmi-supply = <®_5v0>;
@@ -78,6 +79,7 @@
spi@7000d400 {
status = "okay";
spi-max-frequency = <25000000>;
+
can0: can@0 {
compatible = "microchip,mcp2515";
reg = <0>;
@@ -86,6 +88,7 @@
interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_EDGE_RISING>;
spi-max-frequency = <10000000>;
};
+
spidev0: spi@1 {
compatible = "spidev";
reg = <1>;
@@ -124,7 +127,6 @@
backlight: backlight {
compatible = "pwm-backlight";
-
/* PWM<A> */
pwms = <&pwm 0 5000000>;
brightness-levels = <255 128 64 32 16 8 4 0>;
@@ -162,7 +164,6 @@
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
compatible = "edt,et057090dhu", "simple-panel";
-
backlight = <&backlight>;
power-supply = <®_3v3>;
};
--
2.14.4
^ permalink raw reply related
* [PATCH 06/26] ARM: tegra: colibri_t30: annotate uarts
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Annotate UARTs.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 1c057b285153..5b32a70ceff2 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -33,15 +33,18 @@
};
};
+ /* Colibri UART-A */
serial@70006000 {
status = "okay";
};
+ /* Colibri UART-C */
serial@70006040 {
compatible = "nvidia,tegra30-hsuart";
status = "okay";
};
+ /* Colibri UART-B */
serial@70006300 {
compatible = "nvidia,tegra30-hsuart";
status = "okay";
--
2.14.4
^ permalink raw reply related
* [PATCH 05/26] ARM: tegra: colibri_t30: add missing regulators
From: Marcel Ziswiler @ 2018-07-23 12:36 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
In-Reply-To: <20180723123658.980-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add missing regulators:
- reg_module_3v3_audio being VDDA supply of SGTL5000
- VDDD supply of SGTL5000 actually being reg_1v8_vio
- reg_lan_v_bus being USB Ethernet chip vbus supply
- carrier board HDMI supply being reg_5v0
- carrier board reg_3v3 actually being backlight and panel power supply
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 10 ++++++++++
arch/arm/boot/dts/tegra30-colibri.dtsi | 21 ++++++++++++++++++++-
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 5eb665d89435..1c057b285153 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -29,6 +29,7 @@
};
hdmi@54280000 {
status = "okay";
+ hdmi-supply = <®_5v0>;
};
};
@@ -127,6 +128,7 @@
default-brightness-level = <6>;
/* BL_ON */
enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
+ power-supply = <®_3v3>;
};
clocks {
@@ -159,6 +161,7 @@
compatible = "edt,et057090dhu", "simple-panel";
backlight = <&backlight>;
+ power-supply = <®_3v3>;
};
pwmleds {
@@ -181,6 +184,13 @@
};
};
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V_SW";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5V_SW";
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index c58bd41a68ae..fedcd2f7912b 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -229,7 +229,8 @@
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
- VDDA-supply = <®_module_3v3>;
+ VDDA-supply = <®_module_3v3_audio>;
+ VDDD-supply = <®_1v8_vio>;
VDDIO-supply = <®_module_3v3>;
clocks = <&tegra_car TEGRA30_CLK_EXTERN1>;
};
@@ -450,6 +451,7 @@
usb-phy@7d004000 {
status = "okay";
nvidia,is-wired = <1>;
+ vbus-supply = <®_lan_v_bus>;
};
clocks {
@@ -493,6 +495,15 @@
regulator-always-on;
};
+ reg_lan_v_bus: regulator-lan-v-bus {
+ compatible = "regulator-fixed";
+ regulator-name = "LAN_V_BUS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
+ };
+
reg_module_3v3: regulator-module-3v3 {
compatible = "regulator-fixed";
regulator-name = "+V3.3";
@@ -501,6 +512,14 @@
regulator-always-on;
};
+ reg_module_3v3_audio: regulator-module-3v3-audio {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3_AUDIO_AVDD_S";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
sound {
compatible = "toradex,tegra-audio-sgtl5000-colibri_t30",
"nvidia,tegra-audio-sgtl5000";
--
2.14.4
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