* Re: [PATCH 1/4] sched/topology: SD_ASYM_CPUCAPACITY flag detection
From: Qais Yousef @ 2018-07-23 16:07 UTC (permalink / raw)
To: Morten Rasmussen
Cc: vincent.guittot, peterz, linux-kernel, dietmar.eggemann, mingo,
valentin.schneider, linux-arm-kernel
In-Reply-To: <20180723152551.GA29978@e105550-lin.cambridge.arm.com>
On 23/07/18 16:27, Morten Rasmussen wrote:
[...]
>>> + /*
>>> + * Examine topology from all cpu's point of views to detect the lowest
>>> + * sched_domain_topology_level where a highest capacity cpu is visible
>>> + * to everyone.
>>> + */
>>> + for_each_cpu(i, cpu_map) {
>>> + unsigned long max_capacity = arch_scale_cpu_capacity(NULL, i);
>>> + int tl_id = 0;
>>> +
>>> + for_each_sd_topology(tl) {
>>> + if (tl_id < asym_level)
>>> + goto next_level;
>>> +
>> I think if you increment and then continue here you might save the extra
>> branch. I didn't look at any disassembly though to verify the generated
>> code.
>>
>> I wonder if we can introduce for_each_sd_topology_from(tl, starting_level)
>> so that you can start searching from a provided level - which will make this
>> skipping logic unnecessary? So the code will look like
>>
>> for_each_sd_topology_from(tl, asymc_level) {
>> ...
>> }
> Both options would work. Increment+contrinue instead of goto would be
> slightly less readable I think since we would still have the increment
> at the end of the loop, but easy to do. Introducing
> for_each_sd_topology_from() improve things too, but I wonder if it is
> worth it.
I don't mind the current form to be honest. I agree it's not worth it if
it is called infrequent enough.
>>> @@ -1647,18 +1707,27 @@ build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *att
>>> struct s_data d;
>>> struct rq *rq = NULL;
>>> int i, ret = -ENOMEM;
>>> + struct sched_domain_topology_level *tl_asym;
>>> alloc_state = __visit_domain_allocation_hell(&d, cpu_map);
>>> if (alloc_state != sa_rootdomain)
>>> goto error;
>>> + tl_asym = asym_cpu_capacity_level(cpu_map);
>>> +
>> Or maybe this is not a hot path and we don't care that much about optimizing
>> the search since you call it unconditionally here even for systems that
>> don't care?
> It does increase the cost of things like hotplug slightly and
> repartitioning of root_domains a slightly but I don't see how we can
> avoid it if we want generic code to set this flag. If the costs are not
> acceptable I think the only option is to make the detection architecture
> specific.
I think hotplug is already expensive and this overhead would be small in
comparison. But this could be called when frequency changes if I
understood correctly - this is the one I wasn't sure how 'hot' it could
be. I wouldn't expect frequency changes at a very high rate because it's
relatively expensive too..
> In any case, AFAIK rebuilding the sched_domain hierarchy shouldn't be a
> normal and common thing to do. If checking for the flag is not
> acceptable on SMP-only architectures, I can move it under arch/arm[,64]
> although it is not as clean.
>
I like the approach and I think it's nice and clean. If it actually
appears in some profiles I think we have room to optimize it.
--
Qais Yousef
^ permalink raw reply
* [PATCH 1/4] sched/topology: SD_ASYM_CPUCAPACITY flag detection
From: Qais Yousef @ 2018-07-23 16:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180723152551.GA29978@e105550-lin.cambridge.arm.com>
On 23/07/18 16:27, Morten Rasmussen wrote:
[...]
>>> + /*
>>> + * Examine topology from all cpu's point of views to detect the lowest
>>> + * sched_domain_topology_level where a highest capacity cpu is visible
>>> + * to everyone.
>>> + */
>>> + for_each_cpu(i, cpu_map) {
>>> + unsigned long max_capacity = arch_scale_cpu_capacity(NULL, i);
>>> + int tl_id = 0;
>>> +
>>> + for_each_sd_topology(tl) {
>>> + if (tl_id < asym_level)
>>> + goto next_level;
>>> +
>> I think if you increment and then continue here you might save the extra
>> branch. I didn't look at any disassembly though to verify the generated
>> code.
>>
>> I wonder if we can introduce for_each_sd_topology_from(tl, starting_level)
>> so that you can start searching from a provided level - which will make this
>> skipping logic unnecessary? So the code will look like
>>
>> ??? ??? ??? for_each_sd_topology_from(tl, asymc_level) {
>> ??? ??? ??? ??? ...
>> ??? ??? ??? }
> Both options would work. Increment+contrinue instead of goto would be
> slightly less readable I think since we would still have the increment
> at the end of the loop, but easy to do. Introducing
> for_each_sd_topology_from() improve things too, but I wonder if it is
> worth it.
I don't mind the current form to be honest. I agree it's not worth it if
it is called infrequent enough.
>>> @@ -1647,18 +1707,27 @@ build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *att
>>> struct s_data d;
>>> struct rq *rq = NULL;
>>> int i, ret = -ENOMEM;
>>> + struct sched_domain_topology_level *tl_asym;
>>> alloc_state = __visit_domain_allocation_hell(&d, cpu_map);
>>> if (alloc_state != sa_rootdomain)
>>> goto error;
>>> + tl_asym = asym_cpu_capacity_level(cpu_map);
>>> +
>> Or maybe this is not a hot path and we don't care that much about optimizing
>> the search since you call it unconditionally here even for systems that
>> don't care?
> It does increase the cost of things like hotplug slightly and
> repartitioning of root_domains a slightly but I don't see how we can
> avoid it if we want generic code to set this flag. If the costs are not
> acceptable I think the only option is to make the detection architecture
> specific.
I think hotplug is already expensive and this overhead would be small in
comparison. But this could be called when frequency changes if I
understood correctly - this is the one I wasn't sure how 'hot' it could
be. I wouldn't expect frequency changes at a very high rate because it's
relatively expensive too..
> In any case, AFAIK rebuilding the sched_domain hierarchy shouldn't be a
> normal and common thing to do. If checking for the flag is not
> acceptable on SMP-only architectures, I can move it under arch/arm[,64]
> although it is not as clean.
>
I like the approach and I think it's nice and clean. If it actually
appears in some profiles I think we have room to optimize it.
--
Qais Yousef
^ permalink raw reply
* Re: [PATCH] bluetooth: btusb: Replace GFP_ATOMIC with GFP_KERNEL in inject_cmd_complete()
From: Marcel Holtmann @ 2018-07-23 16:05 UTC (permalink / raw)
To: Jia-Ju Bai; +Cc: Johan Hedberg, linux-bluetooth, linux-kernel
In-Reply-To: <20180723033851.8141-1-baijiaju1990@gmail.com>
Hi Jia-Ju,
> inject_cmd_complete() is only called by btusb_send_frame_intel(),
> which is set to hdev->send, and hdev->send() is never
> called in atomic context.
>
> inject_cmd_complete() calls bt_skb_alloc() with GFP_ATOMIC,
> which is not necessary.
> GFP_ATOMIC can be replaced with GFP_KERNEL.
>
> This is found by a static analysis tool named DCNS written by myself.
> I also manually check the kernel code before reporting it.
>
> Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>
> ---
> drivers/bluetooth/btusb.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
all 6 patches have been applied to bluetooth-next tree.
Regards
Marcel
^ permalink raw reply
* Re: [PATCH 2/2] xen/pv: Call get_cpu_address_sizes to set x86_virt/phys_bits
From: Boris Ostrovsky @ 2018-07-23 15:04 UTC (permalink / raw)
To: M. Vefa Bicakci, linux-kernel
Cc: Kirill A. Shutemov, Andy Lutomirski, Ingo Molnar, H. Peter Anvin,
Thomas Gleixner, Juergen Gross, xen-devel, x86, stable
In-Reply-To: <13b774d7-bc8c-039a-fbc0-52318f535883@runbox.com>
On 07/22/2018 11:57 AM, M. Vefa Bicakci wrote:
> On 07/21/2018 07:17 PM, M. Vefa Bicakci wrote:
>> On 07/21/2018 05:25 PM, Boris Ostrovsky wrote:
>>> On 07/21/2018 03:49 PM, M. Vefa Bicakci wrote:
>>>> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
>>>> index 439a94bf89ad..87afb000142a 100644
>>>> --- a/arch/x86/xen/enlighten_pv.c
>>>> +++ b/arch/x86/xen/enlighten_pv.c
>>>> @@ -1257,6 +1257,7 @@ asmlinkage __visible void __init
>>>> xen_start_kernel(void)
>>>> ����� /* Work out if we support NX */
>>>> ����� get_cpu_cap(&boot_cpu_data);
>>>> +��� get_cpu_address_sizes(&boot_cpu_data);
>>>> ����� x86_configure_nx();
>>>
>>>
>>> Have you observed any problems without this call? get_cpu_cap() is only
>>> called here to set X86_FEATURE_NX, and is then called again, together
>>> with get_cpu_address_sizes(), from early_identify_cpu().
>>
>> Thank you for the reviews! Without the call to get_cpu_address_sizes,
>> paravirtualized virtual machines do not boot up kernels with versions
>> 4.17 and up at all; this includes dom0 and domU. No domU logs are
>> generated in dom0's /var/log/xen/console/ directory either, despite
>> having earlyprintk=xen on the kernel command line for my test domU.
>
> Hello Boris,
>
> I debugged this further with a debugging version of Xen (so that I can
> get early kernel print-outs via the "xen_raw_console_write" function),
> and I found the root cause of the boot up failure.
>
> In summary, the issue is due to the following call path in version
> 4.17 (and higher, I assume), which the kernel goes through /only/ when
> CONFIG_DEBUG_VIRTUAL is enabled:
>
> enlighten_pv.c::xen_start_kernel
> � mmu_pv.c::xen_reserve_special_pages
> ��� page.h::__pa
> ����� physaddr.c::__phys_addr
> ������� physaddr.h::phys_addr_valid // uses boot_cpu_data.x86_phys_bits
>
> The return value of phys_addr_valid is used with the VIRTUAL_BUG_ON
> macro,
> which evaluates to BUG_ON in case CONFIG_DEBUG_VIRTUAL is enabled.
Ah, that's why it hasn't been detected.
>
> It looks like the call to get_cpu_address_size is required in the
> xen_start_kernel function. Perhaps there is a more elegant way to
> resolve this issue as well.
>
> Another approach could be to check in the phys_addr_valid function
> whether
> boot_cpu_data.x86_phys_bits has been initialized or not, I think, but
> I am
> not sure about the correctness of this approach.
No, I think your patch is good. The only thing I'd suggest is to move
the call a few lines down. The way it is placed now may create
impression that we are calling get_cpu_address_sizes() to figure out NX
support.
-boris
^ permalink raw reply
* Re: [PATCH] drivers/memory/Kconfig: Add CONFIG_OF dependency
From: Arnd Bergmann @ 2018-07-23 16:04 UTC (permalink / raw)
To: Boris Brezillon
Cc: Randy Dunlap, Anders Roxell, Miquel Raynal,
Linux Kernel Mailing List, Rob Herring, DTML
In-Reply-To: <CAK8P3a10SsWuPXzOyRcNKa+ukvj_Gq13JyDTngoU8DJu6_MR0Q@mail.gmail.com>
On Mon, Jul 23, 2018 at 5:40 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Mon, Jul 23, 2018 at 11:41 AM, Boris Brezillon
> <boris.brezillon@bootlin.com> wrote:
>> On Mon, 23 Jul 2018 11:34:43 +0200
>> Arnd Bergmann <arnd@arndb.de> wrote:
>>
>>> On Sun, Jul 22, 2018 at 8:29 AM, Boris Brezillon
>>> <boris.brezillon@bootlin.com> wrote:
>>> > +Arnd, Rob and the DT ML.
>>> >
>>> > On Sat, 21 Jul 2018 14:53:47 -0700
>>> > Randy Dunlap <rdunlap@infradead.org> wrote:
>>> >
>>> >> On 07/21/2018 01:00 PM, Anders Roxell wrote:
>>> >> > JZ4780_NEMC doesn't depend on OF, and if OF isn't enabled we get this
>>> >> > error:
>>> >> > drivers/memory/jz4780-nemc.c: In function ‘jz4780_nemc_num_banks’:
>>> >> > drivers/memory/jz4780-nemc.c:72:10: error: implicit declaration of
>>> >> > function ‘of_read_number’; did you mean ‘down_read_nested’?
>>> >> > [-Werror=implicit-function-declaration]
>>> >> > bank = of_read_number(prop, 1);
>>> >> > ^~~~~~~~~~~~~~
>>> >> > down_read_nested
>>> >
>>> > Looks like of.h defines stubs so that people can compile-test without
>>> > CONFIG_OF selected. Maybe we should move of_read_number() and
>>> > of_read_ulong() out of the #ifdef CONFIG_OF section.
>>>
>>> That seems fine, though the added dependency seems appropriate
>>> here as well. of_read_number() is rarely used, and for the most part in
>>> powerpc specific code that is guaranteed to have CONFIG_OF enabled,
>>> so it's not that likely to cause many more problems.
>>
>> Ok, then I'll let Miquel apply Anders' patch to the NAND tree.
>>
>> Thanks for your feedback.
>
> My randconfig build bot just ran into a second problem with this driver
> with CONFIG_GPIOLIB disabled:
>
> drivers/mtd/nand/raw/jz4740_nand.c: In function 'jz_nand_dev_ready':
> drivers/mtd/nand/raw/jz4740_nand.c:133:9: error: implicit declaration
> of function 'gpiod_get_value_cansleep'; did you mean
> 'gpio_get_value_cansleep'? [-Werror=implicit-function-declaration]
> return gpiod_get_value_cansleep(nand->busy_gpio);
> ^~~~~~~~~~~~~~~~~~~~~~~~
> gpio_get_value_cansleep
> drivers/mtd/nand/raw/jz4740_nand.c: In function 'jz_nand_probe':
> drivers/mtd/nand/raw/jz4740_nand.c:388:20: error: implicit declaration
> of function 'devm_gpiod_get_optional'; did you mean
> 'devm_gpio_request_one'? [-Werror=implicit-function-declaration]
> nand->busy_gpio = devm_gpiod_get_optional(&pdev->dev, "busy", GPIOD_IN);
> ^~~~~~~~~~~~~~~~~~~~~~~
> devm_gpio_request_one
> drivers/mtd/nand/raw/jz4740_nand.c:388:64: error: 'GPIOD_IN'
> undeclared (first use in this function); did you mean 'GPIOF_IN'?
> nand->busy_gpio = devm_gpiod_get_optional(&pdev->dev, "busy", GPIOD_IN);
> ^~~~~~~~
> GPIOF_IN
>
>
> We could add another dependency here or (my preference) include
> linux/gpio/consumer.h to fix that. Do you want a separate patch for
> it, or should Anders send a combined patch?
One more failure, not analyzed yet:
/git/arm-soc/drivers/mtd/nand/raw/jz4740_nand.c: In function
'jz_nand_select_chip':
/git/arm-soc/drivers/mtd/nand/raw/jz4740_nand.c:87:9: error: implicit
declaration of function 'readl'; did you mean 'krealloc'?
[-Werror=implicit-function-declaration]
ctrl = readl(nand->base + JZ_REG_NAND_CTRL);
^~~~~
Arnd
^ permalink raw reply
* Re: [Qemu-devel] [PATCH v4 1/3] spapr: introduce a fixed IRQ number space
From: Cédric Le Goater @ 2018-07-23 16:04 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, Greg Kurz
In-Reply-To: <20180720021850.GE18205@umbus.fritz.box>
On 07/20/2018 04:18 AM, David Gibson wrote:
> On Fri, Jul 06, 2018 at 11:07:11AM +0200, Cédric Le Goater wrote:
>> This proposal introduces a new IRQ number space layout using static
>> numbers for all devices, depending on a device index, and a bitmap
>> allocator for the MSI IRQ numbers which are negotiated by the guest at
>> runtime.
>>
>> As the VIO device model does not have a device index but a "reg"
>> property, we introduce a formula to compute an IRQ number from a "reg"
>> value. It should minimize most of the collisions.
>>
>> The previous layout is kept in pre-3.0 machines raising the
>> 'legacy_irq_allocation' machine class flag.
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>> The new XICS layout will only be activated when a new pseries-3.1
>> machine is introduced.
>
> Looking good. I've noted a few nits below, but they're very minor -
> I wouldn't even bother to ask for the changes if we didn't have to
> wait for 3.1 anyway.
Yes. np. I have taken into account the nits. We just need to agree
on a reg_to_irq formula now.
Thanks,
C.
>
>
>>
>> include/hw/ppc/spapr.h | 5 ++++
>> include/hw/ppc/spapr_irq.h | 32 ++++++++++++++++++++++
>> hw/ppc/spapr.c | 32 +++++++++++++++++++++-
>> hw/ppc/spapr_events.c | 12 ++++++--
>> hw/ppc/spapr_irq.c | 56 ++++++++++++++++++++++++++++++++++++++
>> hw/ppc/spapr_pci.c | 29 ++++++++++++++++----
>> hw/ppc/spapr_vio.c | 47 ++++++++++++++++++++++++++++----
>> hw/ppc/Makefile.objs | 2 +-
>> 8 files changed, 199 insertions(+), 16 deletions(-)
>> create mode 100644 include/hw/ppc/spapr_irq.h
>> create mode 100644 hw/ppc/spapr_irq.c
>>
>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>> index 7e5de1a6fd42..73067f5ee8aa 100644
>> --- a/include/hw/ppc/spapr.h
>> +++ b/include/hw/ppc/spapr.h
>> @@ -8,6 +8,7 @@
>> #include "hw/ppc/spapr_drc.h"
>> #include "hw/mem/pc-dimm.h"
>> #include "hw/ppc/spapr_ovec.h"
>> +#include "hw/ppc/spapr_irq.h"
>>
>> struct VIOsPAPRBus;
>> struct sPAPRPHBState;
>> @@ -101,6 +102,8 @@ struct sPAPRMachineClass {
>> bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
>> bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */
>> bool pre_2_10_has_unused_icps;
>> + bool legacy_irq_allocation;
>> +
>> void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index,
>> uint64_t *buid, hwaddr *pio,
>> hwaddr *mmio32, hwaddr *mmio64,
>> @@ -167,6 +170,8 @@ struct sPAPRMachineState {
>> char *kvm_type;
>>
>> const char *icp_type;
>> + int32_t irq_map_nr;
>> + unsigned long *irq_map;
>>
>> bool cmd_line_caps[SPAPR_CAP_NUM];
>> sPAPRCapabilities def, eff, mig;
>> diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
>> new file mode 100644
>> index 000000000000..6f7f50548809
>> --- /dev/null
>> +++ b/include/hw/ppc/spapr_irq.h
>> @@ -0,0 +1,32 @@
>> +/*
>> + * QEMU PowerPC sPAPR IRQ backend definitions
>> + *
>> + * Copyright (c) 2018, IBM Corporation.
>> + *
>> + * This code is licensed under the GPL version 2 or later. See the
>> + * COPYING file in the top-level directory.
>> + */
>> +
>> +#ifndef HW_SPAPR_IRQ_H
>> +#define HW_SPAPR_IRQ_H
>> +
>> +/*
>> + * IRQ range offsets per device type
>> + */
>> +#define SPAPR_IRQ_EPOW 0x1000 /* XICS_IRQ_BASE offset */
>> +#define SPAPR_IRQ_HOTPLUG 0x1001
>> +#define SPAPR_IRQ_VIO 0x1100 /* 256 VIO devices */
>> +#define SPAPR_IRQ_PCI_LSI 0x1200 /* 32+ PHBs devices */
>> +
>> +#define SPAPR_IRQ_MSI 0x1300 /* Offset of the dynamic range covered
>> + * by the bitmap allocator */
>> +
>> +typedef struct sPAPRMachineState sPAPRMachineState;
>> +
>> +void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis);
>> +int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32_t num, bool align,
>> + Error **errp);
>> +void spapr_irq_msi_free(sPAPRMachineState *spapr, int irq, uint32_t num);
>> +void spapr_irq_msi_reset(sPAPRMachineState *spapr);
>> +
>> +#endif
>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>> index 3f5e1d3ec21a..7bc9a48abf04 100644
>> --- a/hw/ppc/spapr.c
>> +++ b/hw/ppc/spapr.c
>> @@ -189,6 +189,11 @@ static void xics_system_init(MachineState *machine, int nr_irqs, Error **errp)
>> sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
>> Error *local_err = NULL;
>>
>> + /* Initialize the MSI IRQ allocator. */
>> + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + spapr_irq_msi_init(spapr, XICS_IRQ_BASE + nr_irqs - SPAPR_IRQ_MSI);
>> + }
>> +
>> if (kvm_enabled()) {
>> if (machine_kernel_irqchip_allowed(machine) &&
>> !xics_kvm_init(spapr, &local_err)) {
>> @@ -1636,6 +1641,10 @@ static void spapr_machine_reset(void)
>> ppc_set_compat(first_ppc_cpu, spapr->max_compat_pvr, &error_fatal);
>> }
>>
>> + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + spapr_irq_msi_reset(spapr);
>> + }
>> +
>> qemu_devices_reset();
>>
>> /* DRC reset may cause a device to be unplugged. This will cause troubles
>> @@ -1910,6 +1919,24 @@ static const VMStateDescription vmstate_spapr_patb_entry = {
>> },
>> };
>>
>> +static bool spapr_irq_map_needed(void *opaque)
>> +{
>> + sPAPRMachineState *spapr = opaque;
>> +
>> + return spapr->irq_map && !bitmap_empty(spapr->irq_map, spapr->irq_map_nr);
>> +}
>> +
>> +static const VMStateDescription vmstate_spapr_irq_map = {
>> + .name = "spapr_irq_map",
>> + .version_id = 1,
>> + .minimum_version_id = 1,
>> + .needed = spapr_irq_map_needed,
>> + .fields = (VMStateField[]) {
>> + VMSTATE_BITMAP(irq_map, sPAPRMachineState, 0, irq_map_nr),
>> + VMSTATE_END_OF_LIST()
>> + },
>> +};
>> +
>> static const VMStateDescription vmstate_spapr = {
>> .name = "spapr",
>> .version_id = 3,
>> @@ -1937,6 +1964,7 @@ static const VMStateDescription vmstate_spapr = {
>> &vmstate_spapr_cap_cfpc,
>> &vmstate_spapr_cap_sbbc,
>> &vmstate_spapr_cap_ibs,
>> + &vmstate_spapr_irq_map,
>> NULL
>> }
>> };
>> @@ -4067,7 +4095,9 @@ static void spapr_machine_3_0_instance_options(MachineState *machine)
>>
>> static void spapr_machine_3_0_class_options(MachineClass *mc)
>> {
>> - /* Defaults for the latest behaviour inherited from the base class */
>> + sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
>> +
>> + smc->legacy_irq_allocation = true;
>> }
>>
>> DEFINE_SPAPR_MACHINE(3_0, "3.0", true);
>> diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c
>> index e4f5946a2188..cab950d33446 100644
>> --- a/hw/ppc/spapr_events.c
>> +++ b/hw/ppc/spapr_events.c
>> @@ -709,7 +709,11 @@ void spapr_events_init(sPAPRMachineState *spapr)
>> {
>> int epow_irq;
>>
>> - epow_irq = spapr_irq_findone(spapr, &error_fatal);
>> + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + epow_irq = spapr_irq_findone(spapr, &error_fatal);
>> + } else {
>> + epow_irq = SPAPR_IRQ_EPOW;
>> + }
>
> Nit: these can be rearranged more briefly by initializing to the fixed
> value, then overriding in the legacy case.
>
>>
>> spapr_irq_claim(spapr, epow_irq, false, &error_fatal);
>>
>> @@ -731,7 +735,11 @@ void spapr_events_init(sPAPRMachineState *spapr)
>> if (spapr->use_hotplug_event_source) {
>> int hp_irq;
>>
>> - hp_irq = spapr_irq_findone(spapr, &error_fatal);
>> + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + hp_irq = spapr_irq_findone(spapr, &error_fatal);
>> + } else {
>> + hp_irq = SPAPR_IRQ_HOTPLUG;
>> + }
>
> Here too.
>
>> spapr_irq_claim(spapr, hp_irq, false, &error_fatal);
>>
>> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
>> new file mode 100644
>> index 000000000000..24e9c1d4433c
>> --- /dev/null
>> +++ b/hw/ppc/spapr_irq.c
>> @@ -0,0 +1,56 @@
>> +/*
>> + * QEMU PowerPC sPAPR IRQ interface
>> + *
>> + * Copyright (c) 2018, IBM Corporation.
>> + *
>> + * This code is licensed under the GPL version 2 or later. See the
>> + * COPYING file in the top-level directory.
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qemu/log.h"
>> +#include "qemu/error-report.h"
>> +#include "qapi/error.h"
>> +#include "hw/ppc/spapr.h"
>> +#include "hw/ppc/xics.h"
>> +
>> +void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis)
>> +{
>> + spapr->irq_map_nr = nr_msis;
>> + spapr->irq_map = bitmap_new(spapr->irq_map_nr);
>> +}
>> +
>> +int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32_t num, bool align,
>> + Error **errp)
>> +{
>> + int irq;
>> +
>> + /*
>> + * The 'align_mask' parameter of bitmap_find_next_zero_area()
>> + * should be one less than a power of 2; 0 means no
>> + * alignment. Adapt the 'align' value of the former allocator
>> + * to fit the requirements of bitmap_find_next_zero_area()
>> + */
>> + align -= 1;
>> +
>> + irq = bitmap_find_next_zero_area(spapr->irq_map, spapr->irq_map_nr, 0, num,
>> + align);
>> + if (irq == spapr->irq_map_nr) {
>> + error_setg(errp, "can't find a free %d-IRQ block", num);
>> + return -1;
>> + }
>> +
>> + bitmap_set(spapr->irq_map, irq, num);
>> +
>> + return irq + SPAPR_IRQ_MSI;
>> +}
>> +
>> +void spapr_irq_msi_free(sPAPRMachineState *spapr, int irq, uint32_t num)
>> +{
>> + bitmap_clear(spapr->irq_map, irq - SPAPR_IRQ_MSI, num);
>> +}
>> +
>> +void spapr_irq_msi_reset(sPAPRMachineState *spapr)
>> +{
>> + bitmap_clear(spapr->irq_map, 0, spapr->irq_map_nr);
>> +}
>> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
>> index 497b896c7d24..cba5340f4bad 100644
>> --- a/hw/ppc/spapr_pci.c
>> +++ b/hw/ppc/spapr_pci.c
>> @@ -334,6 +334,9 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>> return;
>> }
>>
>> + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + spapr_irq_msi_free(spapr, msi->first_irq, msi->num);
>> + }
>> spapr_irq_free(spapr, msi->first_irq, msi->num);
>> if (msi_present(pdev)) {
>> spapr_msi_setmsg(pdev, 0, false, 0, 0);
>> @@ -372,7 +375,13 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>> }
>>
>> /* Allocate MSIs */
>> - irq = spapr_irq_find(spapr, req_num, ret_intr_type == RTAS_TYPE_MSI, &err);
>> + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + irq = spapr_irq_find(spapr, req_num, ret_intr_type == RTAS_TYPE_MSI,
>> + &err);
>> + } else {
>> + irq = spapr_irq_msi_alloc(spapr, req_num,
>> + ret_intr_type == RTAS_TYPE_MSI, &err);
>> + }
>> if (err) {
>> error_reportf_err(err, "Can't allocate MSIs for device %x: ",
>> config_addr);
>> @@ -392,6 +401,9 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>>
>> /* Release previous MSIs */
>> if (msi) {
>> + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + spapr_irq_msi_free(spapr, msi->first_irq, msi->num);
>> + }
>> spapr_irq_free(spapr, msi->first_irq, msi->num);
>> g_hash_table_remove(phb->msi, &config_addr);
>> }
>> @@ -1708,11 +1720,15 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
>> uint32_t irq;
>> Error *local_err = NULL;
>>
>> - irq = spapr_irq_findone(spapr, &local_err);
>> - if (local_err) {
>> - error_propagate(errp, local_err);
>> - error_prepend(errp, "can't allocate LSIs: ");
>> - return;
>> + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + irq = spapr_irq_findone(spapr, &local_err);
>> + if (local_err) {
>> + error_propagate(errp, local_err);
>> + error_prepend(errp, "can't allocate LSIs: ");
>> + return;
>> + }
>> + } else {
>> + irq = SPAPR_IRQ_PCI_LSI + sphb->index * PCI_NUM_PINS + i;
>
> Here again, you can use the new fixed value as the default.
>
>> }
>>
>> spapr_irq_claim(spapr, irq, true, &local_err);
>> @@ -2123,6 +2139,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
>> _FDT(fdt_setprop(fdt, bus_off, "ranges", &ranges, sizeof_ranges));
>> _FDT(fdt_setprop(fdt, bus_off, "reg", &bus_reg, sizeof(bus_reg)));
>> _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pci-config-space-type", 0x1));
>> + /* TODO: fine tune the total count of allocatable MSIs per PHB */
>> _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi", XICS_IRQS_SPAPR));
>>
>> /* Dynamic DMA window */
>> diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
>> index be9af71437cc..a0695200f348 100644
>> --- a/hw/ppc/spapr_vio.c
>> +++ b/hw/ppc/spapr_vio.c
>> @@ -37,12 +37,13 @@
>>
>> #include "hw/ppc/spapr.h"
>> #include "hw/ppc/spapr_vio.h"
>> -#include "hw/ppc/xics.h"
>> #include "hw/ppc/fdt.h"
>> #include "trace.h"
>>
>> #include <libfdt.h>
>>
>> +#define SPAPR_VIO_REG_BASE 0x71000000
>> +
>> static void spapr_vio_get_irq(Object *obj, Visitor *v, const char *name,
>> void *opaque, Error **errp)
>> {
>> @@ -445,6 +446,32 @@ static void spapr_vio_busdev_reset(DeviceState *qdev)
>> }
>> }
>>
>> +/*
>> + * The register property of a VIO device is defined in livirt using a
>> + * base number + 0x1000 increment and in QEMU by incrementing the base
>> + * register number 0x71000000.
>> + *
>> + * The formula below tries to compute a unique index number from the
>> + * register value that will be used to define the IRQ number of the
>> + * VIO device. A maximum of 256 (0x100) VIO devices is covered.
>> + *
>> + * To minimize collisions, we define two distinct ranges depending on
>> + * the "reg" value definition:
>> + *
>> + * [0x00 - 0x7f] user/libvirt
>> + * [0x80 - 0xff] QEMU VIO model
>> + *
>> + * Collisions will be detected when the IRQ is claimed.
>> + */
>> +static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg)
>> +{
>> + if (reg >= SPAPR_VIO_REG_BASE) {
>> + return SPAPR_IRQ_VIO | (reg & 0x7f) | 0x80;
>> + } else {
>> + return SPAPR_IRQ_VIO | ((reg & 0x7f) ^ ((reg >> 12) & 0x7f));
>> + }
>> +}
>> +
>> static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
>> {
>> sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
>> @@ -485,10 +512,18 @@ static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
>> }
>>
>> if (!dev->irq) {
>> - dev->irq = spapr_irq_findone(spapr, &local_err);
>> - if (local_err) {
>> - error_propagate(errp, local_err);
>> - return;
>> + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
>> + dev->irq = spapr_irq_findone(spapr, &local_err);
>> + if (local_err) {
>> + error_propagate(errp, local_err);
>> + return;
>> + }
>> + } else {
>> + dev->irq = spapr_vio_reg_to_irq(dev->reg);
>> + if (dev->irq == SPAPR_IRQ_PCI_LSI) {
>> + error_setg(errp, "Too many VIO devices");
>> + return;
>> + }
>> }
>> }
>>
>> @@ -557,7 +592,7 @@ VIOsPAPRBus *spapr_vio_bus_init(void)
>> /* Create bus on bridge device */
>> qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio");
>> bus = SPAPR_VIO_BUS(qbus);
>> - bus->next_reg = 0x71000000;
>> + bus->next_reg = SPAPR_VIO_REG_BASE;
>>
>> /* hcall-vio */
>> spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
>> diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
>> index bcab6323b7ed..4ab556467289 100644
>> --- a/hw/ppc/Makefile.objs
>> +++ b/hw/ppc/Makefile.objs
>> @@ -4,7 +4,7 @@ obj-y += ppc.o ppc_booke.o fdt.o
>> obj-$(CONFIG_PSERIES) += spapr.o spapr_caps.o spapr_vio.o spapr_events.o
>> obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o
>> obj-$(CONFIG_PSERIES) += spapr_pci.o spapr_rtc.o spapr_drc.o spapr_rng.o
>> -obj-$(CONFIG_PSERIES) += spapr_cpu_core.o spapr_ovec.o
>> +obj-$(CONFIG_PSERIES) += spapr_cpu_core.o spapr_ovec.o spapr_irq.o
>> # IBM PowerNV
>> obj-$(CONFIG_POWERNV) += pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.o pnv_occ.o pnv_bmc.o
>> ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy)
>
^ permalink raw reply
* [PATCH v2 3/4] iio: adc: xilinx: Remove platform_get_irq from xadc_remove function
From: Manish Narani @ 2018-07-23 15:02 UTC (permalink / raw)
To: lakshmi.sai.krishna.potthuri, manish.narani, michal.simek, pmeerw,
lars, knaack.h, jic23
Cc: anirudh, sgoud, linux-kernel, linux-arm-kernel, linux-iio
In-Reply-To: <1532358123-23485-1-git-send-email-manish.narani@xilinx.com>
This patch avoids getting irq number in xadc_remove function. Instead
store 'irq' in xadc struct and use xadc->irq wherever needed.
This patch also resolves a warning reported by coverity where it asks to
check return value of platform_get_irq() for any errors in xadc_remove.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
---
drivers/iio/adc/xilinx-xadc-core.c | 10 +++++-----
drivers/iio/adc/xilinx-xadc.h | 1 +
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
index 0dd306d..44a2519 100644
--- a/drivers/iio/adc/xilinx-xadc-core.c
+++ b/drivers/iio/adc/xilinx-xadc-core.c
@@ -1175,6 +1175,7 @@ static int xadc_probe(struct platform_device *pdev)
xadc = iio_priv(indio_dev);
xadc->ops = id->data;
+ xadc->irq = irq;
init_completion(&xadc->completion);
mutex_init(&xadc->mutex);
spin_lock_init(&xadc->lock);
@@ -1225,11 +1226,11 @@ static int xadc_probe(struct platform_device *pdev)
if (ret)
goto err_free_samplerate_trigger;
- ret = xadc->ops->setup(pdev, indio_dev, irq);
+ ret = xadc->ops->setup(pdev, indio_dev, xadc->irq);
if (ret)
goto err_clk_disable_unprepare;
- ret = request_irq(irq, xadc->ops->interrupt_handler, 0,
+ ret = request_irq(xadc->irq, xadc->ops->interrupt_handler, 0,
dev_name(&pdev->dev), indio_dev);
if (ret)
goto err_clk_disable_unprepare;
@@ -1288,7 +1289,7 @@ static int xadc_probe(struct platform_device *pdev)
return 0;
err_free_irq:
- free_irq(irq, indio_dev);
+ free_irq(xadc->irq, indio_dev);
err_clk_disable_unprepare:
clk_disable_unprepare(xadc->clk);
err_free_samplerate_trigger:
@@ -1310,7 +1311,6 @@ static int xadc_remove(struct platform_device *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct xadc *xadc = iio_priv(indio_dev);
- int irq = platform_get_irq(pdev, 0);
iio_device_unregister(indio_dev);
if (xadc->ops->flags & XADC_FLAGS_BUFFERED) {
@@ -1318,7 +1318,7 @@ static int xadc_remove(struct platform_device *pdev)
iio_trigger_free(xadc->convst_trigger);
iio_triggered_buffer_cleanup(indio_dev);
}
- free_irq(irq, indio_dev);
+ free_irq(xadc->irq, indio_dev);
clk_disable_unprepare(xadc->clk);
cancel_delayed_work(&xadc->zynq_unmask_work);
kfree(xadc->data);
diff --git a/drivers/iio/adc/xilinx-xadc.h b/drivers/iio/adc/xilinx-xadc.h
index 62edbda..8c00095 100644
--- a/drivers/iio/adc/xilinx-xadc.h
+++ b/drivers/iio/adc/xilinx-xadc.h
@@ -68,6 +68,7 @@ struct xadc {
spinlock_t lock;
struct completion completion;
+ int irq;
};
struct xadc_ops {
--
2.1.1
^ permalink raw reply related
* [PATCH v2 2/4] iio: adc: xilinx: limit pcap clock frequency value
From: Manish Narani @ 2018-07-23 15:02 UTC (permalink / raw)
To: lakshmi.sai.krishna.potthuri, manish.narani, michal.simek, pmeerw,
lars, knaack.h, jic23
Cc: anirudh, sgoud, linux-kernel, linux-arm-kernel, linux-iio
In-Reply-To: <1532358123-23485-1-git-send-email-manish.narani@xilinx.com>
This patch limits the xadc pcap clock frequency value to be less than
200MHz. This fixes the issue when zynq is booted at higher frequency
values, pcap crosses the maximum limit of 200MHz(Fmax) as it is derived
from IOPLL.
If this limit is crossed it is required to alter the WEDGE and REDGE
bits of XADC_CFG register to make timings better in the interface. So to
avoid alteration of these bits every time, the pcap value should not
cross the Fmax limit.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
---
drivers/iio/adc/xilinx-xadc-core.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
index 23395fc..0dd306d 100644
--- a/drivers/iio/adc/xilinx-xadc-core.c
+++ b/drivers/iio/adc/xilinx-xadc-core.c
@@ -322,6 +322,7 @@ static irqreturn_t xadc_zynq_interrupt_handler(int irq, void *devid)
#define XADC_ZYNQ_TCK_RATE_MAX 50000000
#define XADC_ZYNQ_IGAP_DEFAULT 20
+#define XADC_ZYNQ_PCAP_RATE_MAX 200000000
static int xadc_zynq_setup(struct platform_device *pdev,
struct iio_dev *indio_dev, int irq)
@@ -332,6 +333,7 @@ static int xadc_zynq_setup(struct platform_device *pdev,
unsigned int div;
unsigned int igap;
unsigned int tck_rate;
+ int ret;
/* TODO: Figure out how to make igap and tck_rate configurable */
igap = XADC_ZYNQ_IGAP_DEFAULT;
@@ -343,6 +345,13 @@ static int xadc_zynq_setup(struct platform_device *pdev,
if (!pcap_rate)
return -EINVAL;
+ if (pcap_rate > XADC_ZYNQ_PCAP_RATE_MAX) {
+ ret = clk_set_rate(xadc->clk,
+ (unsigned long)XADC_ZYNQ_PCAP_RATE_MAX);
+ if (ret)
+ return ret;
+ }
+
if (tck_rate > pcap_rate / 2) {
div = 2;
} else {
@@ -368,6 +377,12 @@ static int xadc_zynq_setup(struct platform_device *pdev,
XADC_ZYNQ_CFG_REDGE | XADC_ZYNQ_CFG_WEDGE |
tck_div | XADC_ZYNQ_CFG_IGAP(igap));
+ if (pcap_rate > XADC_ZYNQ_PCAP_RATE_MAX) {
+ ret = clk_set_rate(xadc->clk, pcap_rate);
+ if (ret)
+ return ret;
+ }
+
return 0;
}
--
2.1.1
^ permalink raw reply related
* [PATCH v2 0/4] iio: adc: xilinx: XADC driver Enhancements and bug fixes
From: Manish Narani @ 2018-07-23 15:01 UTC (permalink / raw)
To: lakshmi.sai.krishna.potthuri, manish.narani, michal.simek, pmeerw,
lars, knaack.h, jic23
Cc: anirudh, sgoud, linux-kernel, linux-arm-kernel, linux-iio
This patch series resolves code style problems as reported by code analysis
tools.
Changes in v2:
- From the first version of patches, 2 patches are dropped in this
series.
- In the v1 patch set, 1/4 was not required as the issue is in
checkpatch.pl script and not in the code.
- In the v1 patch set 2/4 was applied on togreg branch of iio.git
- for 3/4 patch in v1 patch set, the patch is broken up in 2 patches
in this series as per review comments. They are now 1/4 and 2/4 in
this series.
- 4/4 patch in the v1 patch set was basically to resolve coverity
warning for platform_get_irq() in xadc_remove function, but that was
causing potential race condition. Fixed that in this series (3/4).
- A new patch is added in this series for moving request_irq() before
enabling interrupts.
Manish Narani (4):
iio: adc: xilinx: Check for return values in clk related functions
iio: adc: xilinx: limit pcap clock frequency value
iio: adc: xilinx: Remove platform_get_irq from xadc_remove function
iio: adc: xilinx: Move request_irq before enabling interrupts
drivers/iio/adc/xilinx-xadc-core.c | 40 +++++++++++++++++++++++++++++---------
drivers/iio/adc/xilinx-xadc.h | 1 +
2 files changed, 32 insertions(+), 9 deletions(-)
--
2.1.1
^ permalink raw reply
* Re: bisected: 4.18-rc* regression: x86-32 troubles (with timers?)
From: Arnd Bergmann @ 2018-07-23 16:03 UTC (permalink / raw)
To: Meelis Roos; +Cc: Daniel Borkmann, Linux Kernel list, Networking
In-Reply-To: <alpine.LRH.2.21.1807210154100.8506@math.ut.ee>
On Sat, Jul 21, 2018 at 1:01 AM, Meelis Roos <mroos@linux.ee> wrote:
> Added netdev and Daniel Borkmann - please see
> https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1724795.html
> for the original report. It seems to be about BPF instead.
>
> Meanwhile I have found more machines with the trouble. Still no clear
> mark in the config - some x86-32 machines that have
> CONFIG_BPF=y
> CONFIG_BPF_SYSCALL=y
> CONFIG_BPF_JIT_ALWAYS_ON=y
> are working fine.
>
>> The new bisect seems to have also led me to a strange commit. This time
>> I tried to be careful and tested most on two reboots before classifying
>> as good.
>>
>> However, f4e3ec0d573e was suspicious - it failed to autoload e1000 but
>> had no other errors. On both boots with this kernel, modprobe e1000 and
>> ifup -a made the system work so I assumed it was good, while it might
>> not have been. Will try bisecting with f4e3ec0d573e marked bad.
>
> Now this seems more relevant:
>
> mroos@rx100s2:~/linux$ nice git bisect good
> 24dea04767e6e5175f4750770281b0c17ac6a2fb is the first bad commit
> commit 24dea04767e6e5175f4750770281b0c17ac6a2fb
> Author: Daniel Borkmann <daniel@iogearbox.net>
> Date: Fri May 4 01:08:23 2018 +0200
>
> bpf, x32: remove ld_abs/ld_ind
>
> Since LD_ABS/LD_IND instructions are now removed from the core and
> reimplemented through a combination of inlined BPF instructions and
> a slow-path helper, we can get rid of the complexity from x32 JIT.
This does seem much more likely than the previous bisection, given
that you ended up in an x86-32 specific commit (the subject says x32,
but that is a mistake). I also checked that systemd indeed does
call into bpf in a number of places, possibly for the journald socket.
OTOH, it's still hard to tell how that commit can have ended up
corrupting the clock read function in systemd. To cross-check,
could you try reverting that commit on the latest kernel and see
if it still works?
Arnd
^ permalink raw reply
* Re: [PATCH 02/14] format-patch: add --interdiff option to embed diff in cover letter
From: Duy Nguyen @ 2018-07-23 16:02 UTC (permalink / raw)
To: Eric Sunshine
Cc: Git Mailing List, Johannes Schindelin,
Ævar Arnfjörð Bjarmason, Stefan Beller
In-Reply-To: <20180722095717.17912-3-sunshine@sunshineco.com>
On Sun, Jul 22, 2018 at 11:57 AM Eric Sunshine <sunshine@sunshineco.com> wrote:
> diff --git a/interdiff.c b/interdiff.c
> new file mode 100644
> index 0000000000..d0fac10c7c
> --- /dev/null
> +++ b/interdiff.c
> @@ -0,0 +1,17 @@
> +#include "cache.h"
> +#include "commit.h"
> +#include "revision.h"
> +#include "interdiff.h"
> +
> +void show_interdiff(struct rev_info *rev)
> +{
> + struct diff_options opts;
> +
> + memcpy(&opts, &rev->diffopt, sizeof(opts));
> + opts.output_format = DIFF_FORMAT_PATCH;
> + diff_setup_done(&opts);
> +
> + diff_tree_oid(rev->idiff_oid1, rev->idiff_oid2, "", &opts);
> + diffcore_std(&opts);
> + diff_flush(&opts);
> +}
Is it worth adding a new file just for a single function? I haven't
read the rest of the series, but the cover letter's diffstat suggests
this is it. Is interdiff intended to become a lot more complicated in
the future? If not maybe just add this function in diff-lib.c
--
Duy
^ permalink raw reply
* [igt-dev] ✓ Fi.CI.IGT: success for lib: Don't assert all KMS drivers support edid_override
From: Patchwork @ 2018-07-23 16:02 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
In-Reply-To: <20180723133613.6418-1-chris@chris-wilson.co.uk>
== Series Details ==
Series: lib: Don't assert all KMS drivers support edid_override
URL : https://patchwork.freedesktop.org/series/47060/
State : success
== Summary ==
= CI Bug Log - changes from IGT_4570_full -> IGTPW_1630_full =
== Summary - WARNING ==
Minor unknown changes coming with IGTPW_1630_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_1630_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/47060/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in IGTPW_1630_full:
=== IGT changes ===
==== Warnings ====
igt@kms_atomic_interruptible@legacy-pageflip:
shard-snb: SKIP -> PASS +1
igt@pm_rc6_residency@rc6-accuracy:
shard-kbl: SKIP -> PASS +1
== Known issues ==
Here are the changes found in IGTPW_1630_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_suspend@sysfs-reader:
shard-snb: PASS -> INCOMPLETE (fdo#105411)
igt@gem_exec_schedule@pi-ringfull-vebox:
shard-glk: NOTRUN -> FAIL (fdo#103158)
igt@kms_flip@2x-flip-vs-expired-vblank:
shard-glk: PASS -> FAIL (fdo#105363)
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#102887, fdo#105363)
igt@kms_rotation_crc@primary-rotation-180:
shard-snb: PASS -> FAIL (fdo#103925)
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
==== Possible fixes ====
igt@gem_mmap_gtt@coherency:
shard-glk: FAIL (fdo#100587) -> SKIP +1
igt@gem_ppgtt@blt-vs-render-ctxn:
shard-kbl: INCOMPLETE (fdo#106023, fdo#103665) -> PASS
igt@kms_flip@plain-flip-ts-check-interruptible:
shard-glk: FAIL (fdo#100368) -> PASS +1
igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-pwrite:
shard-glk: FAIL (fdo#103167) -> PASS
igt@kms_rotation_crc@sprite-rotation-180:
shard-snb: FAIL (fdo#103925) -> PASS
igt@perf_pmu@multi-client-vcs1:
shard-snb: INCOMPLETE (fdo#105411) -> SKIP
igt@prime_vgem@coherency-gtt:
shard-apl: FAIL (fdo#100587) -> SKIP +1
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#100587 https://bugs.freedesktop.org/show_bug.cgi?id=100587
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* IGT: IGT_4570 -> IGTPW_1630
* Linux: CI_DRM_4519 -> CI_DRM_4521
CI_DRM_4519: f14c0ec8fe9acce6fd1be84766f854ab8874eb33 @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_4521: a4ebbd84c682fd30edbde6ac0e48d150d4c5c066 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_1630: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1630/
IGT_4570: 65cdccdc7bcbb791d791aeeeecb784a382110a3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1630/shards.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply
* Re: [PATCH v2 5/6] 9p: Use a slab for allocating requests
From: Greg Kurz @ 2018-07-23 14:24 UTC (permalink / raw)
To: Dominique Martinet
Cc: Matthew Wilcox, v9fs-developer, Latchesar Ionkov,
Eric Van Hensbergen, Ron Minnich, linux-kernel, linux-fsdevel
In-Reply-To: <20180723122531.GA9773@nautica>
On Mon, 23 Jul 2018 14:25:31 +0200
Dominique Martinet <asmadeus@codewreck.org> wrote:
> Greg Kurz wrote on Mon, Jul 23, 2018:
> > The patch is quite big and I'm not sure I can find time to review it
> > carefully, but I'll try to help anyway.
>
> No worry, thanks for this already.
>
> > > Sorry for coming back to this patch now, I just noticed something that's
> > > actually probably a fairly big hit on performance...
> > >
> > > While the slab is just as good as the array for the request itself, this
> > > makes every single request allocate "fcalls" everytime instead of
> > > reusing a cached allocation.
> > > The default msize is 8k and these allocs probably are fairly efficient,
> > > but some transports like RDMA allow to increase this to up to 1MB... And
> >
> > It can be even bigger with virtio:
> >
> > #define VIRTQUEUE_NUM 128
> >
> > .maxsize = PAGE_SIZE * (VIRTQUEUE_NUM - 3),
> >
> > On a typical ppc64 server class setup with 64KB pages, this is nearly 8MB.
>
> I don't think I'll be able to test 64KB pages, and it's "just" 500k with
> 4K pages so I'll go with IB.
> I just finished reinstalling my IB-enabled VMs, now to get some iops
> test running (dbench maybe) and I'll get some figures to be able to play
> with different models and evaluate the impact of these.
>
Sounds like a good plan.
> > > One thing is that the buffers are all going to be the same size for a
> > > given client (.... except virtio zc buffers, I wonder what I'm missing
> > > or why that didn't blow up before?)
> >
> > ZC allocates a 4KB buffer, which is more than enough to hold the 7-byte 9P
> > header and the "dqd" part of all messages that may use ZC, ie, 16 bytes.
> > So I'm not sure to catch what could blow up.
>
> ZC requests won't blow up, but from what I can see with the current
> (old) request cache array, if a ZC request has a not-yet used tag it'll
> allocate a new 4k buffer, then if a normal request uses that tag it'll
> get the 4k buffer instead of an msize sized one.
>
Indeed.
> On the client size the request would be posted with req->rc->capacity
> which would correctly be 4k, but I'm not sure what would happen if qemu
> tries to write more than the given size to that request?
>
QEMU would detect that the sg list doesn't have enough capacity.
Old QEMUs used to return a RERROR or RLERROR message with ENOBUFS
in this case. This didn't made sense to hijack the 9P protocol, which
is transport agnostic to report misconfigured buffers. Especially, in
the worst case, maybe we wouldn't even have enough space for the error
response... So, since QEMU 2.10, we put the virtio 9p device into
broken state instead, ie, inoperative until it gets reset.
I guess this situation was never hit because server responses mostly
need less than 4KB...
> > > It's a shame because I really like that patch, I'll try to find time to
> > > run some light benchmark with varying msizes eventually but I'm not sure
> > > when I'll find time for that... Hopefully before the 4.19 merge window!
> > >
> >
> > Yeah, the open-coded cache we have now really obfuscates things.
> >
> > Maybe have a per-client kmem_cache object for non-ZC requests with
> > size msize [*], and a global kmem_cache object for ZC requests with
> > fixed size P9_ZC_HDR_SZ.
> >
> > [*] the server can require a smaller msize during version negotiation,
> > so maybe we should change the kmem_cache object in this case.
>
> Yeah, if we're going to want to accomodate non-power of two buffers, I
> think we'll need a separate kmem_cache for them.
> The ZC requests could be made into exactly 4k and these could come with
> regular kmalloc just fine, it looks like trying to create a cache of
> that size would just return the same cache used by kmalloc anyway so
> it's probably easier to fall back to kmalloc if requested alloc size
> doesn't match what we were hoping for.
>
You're right, ZC requests could rely on kmalloc() directly.
> I'll try to get figures for various approaches before the merge window
> for 4.19 starts, it's getting closer though...
>
Great thanks for your effort, but we've been leaving with this code
since the beginning. If this misses the 4.19 merge window, we'll have
more time to validate the approach and polish the fix for 4.20 :)
Cheers,
--
Greg
^ permalink raw reply
* [PATCH v2] fs: ceph: Adding new return type vm_fault_t
From: Souptick Joarder @ 2018-07-23 16:02 UTC (permalink / raw)
To: willy, zyan, sage, idryomov
Cc: ceph-devel, linux-kernel, ajitn.linux, brajeswar.linux,
sabyasachi.linux
Use new return type vm_fault_t for page_mkwrite
and fault handler.
Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com>
Reviewed-by: Matthew Wilcox <mawilcox@microsoft.com>
---
v2: Fixed kbuild warning
fs/ceph/addr.c | 62 ++++++++++++++++++++++++++++++----------------------------
1 file changed, 32 insertions(+), 30 deletions(-)
diff --git a/fs/ceph/addr.c b/fs/ceph/addr.c
index 292b3d7..26beebe 100644
--- a/fs/ceph/addr.c
+++ b/fs/ceph/addr.c
@@ -1431,7 +1431,7 @@ static void ceph_restore_sigs(sigset_t *oldset)
/*
* vm ops
*/
-static int ceph_filemap_fault(struct vm_fault *vmf)
+static vm_fault_t ceph_filemap_fault(struct vm_fault *vmf)
{
struct vm_area_struct *vma = vmf->vma;
struct inode *inode = file_inode(vma->vm_file);
@@ -1439,8 +1439,9 @@ static int ceph_filemap_fault(struct vm_fault *vmf)
struct ceph_file_info *fi = vma->vm_file->private_data;
struct page *pinned_page = NULL;
loff_t off = vmf->pgoff << PAGE_SHIFT;
- int want, got, ret;
+ int want, got, err;
sigset_t oldset;
+ vm_fault_t ret = VM_FAULT_SIGBUS;
ceph_block_sigs(&oldset);
@@ -1452,8 +1453,8 @@ static int ceph_filemap_fault(struct vm_fault *vmf)
want = CEPH_CAP_FILE_CACHE;
got = 0;
- ret = ceph_get_caps(ci, CEPH_CAP_FILE_RD, want, -1, &got, &pinned_page);
- if (ret < 0)
+ err = ceph_get_caps(ci, CEPH_CAP_FILE_RD, want, -1, &got, &pinned_page);
+ if (err < 0)
goto out_restore;
dout("filemap_fault %p %llu~%zd got cap refs on %s\n",
@@ -1465,16 +1466,17 @@ static int ceph_filemap_fault(struct vm_fault *vmf)
ceph_add_rw_context(fi, &rw_ctx);
ret = filemap_fault(vmf);
ceph_del_rw_context(fi, &rw_ctx);
+ dout("filemap_fault %p %llu~%zd drop cap refs %s ret %x\n",
+ inode, off, (size_t)PAGE_SIZE,
+ ceph_cap_string(got), ret);
} else
- ret = -EAGAIN;
+ err = -EAGAIN;
- dout("filemap_fault %p %llu~%zd dropping cap refs on %s ret %d\n",
- inode, off, (size_t)PAGE_SIZE, ceph_cap_string(got), ret);
if (pinned_page)
put_page(pinned_page);
ceph_put_cap_refs(ci, got);
- if (ret != -EAGAIN)
+ if (err != -EAGAIN)
goto out_restore;
/* read inline data */
@@ -1482,7 +1484,6 @@ static int ceph_filemap_fault(struct vm_fault *vmf)
/* does not support inline data > PAGE_SIZE */
ret = VM_FAULT_SIGBUS;
} else {
- int ret1;
struct address_space *mapping = inode->i_mapping;
struct page *page = find_or_create_page(mapping, 0,
mapping_gfp_constraint(mapping,
@@ -1491,32 +1492,32 @@ static int ceph_filemap_fault(struct vm_fault *vmf)
ret = VM_FAULT_OOM;
goto out_inline;
}
- ret1 = __ceph_do_getattr(inode, page,
+ err = __ceph_do_getattr(inode, page,
CEPH_STAT_CAP_INLINE_DATA, true);
- if (ret1 < 0 || off >= i_size_read(inode)) {
+ if (err < 0 || off >= i_size_read(inode)) {
unlock_page(page);
put_page(page);
- if (ret1 < 0)
- ret = ret1;
+ if (err == -ENOMEM)
+ ret = VM_FAULT_OOM;
else
ret = VM_FAULT_SIGBUS;
goto out_inline;
}
- if (ret1 < PAGE_SIZE)
- zero_user_segment(page, ret1, PAGE_SIZE);
+ if (err < PAGE_SIZE)
+ zero_user_segment(page, err, PAGE_SIZE);
else
flush_dcache_page(page);
SetPageUptodate(page);
vmf->page = page;
ret = VM_FAULT_MAJOR | VM_FAULT_LOCKED;
out_inline:
- dout("filemap_fault %p %llu~%zd read inline data ret %d\n",
+ dout("filemap_fault %p %llu~%zd read inline data ret %x\n",
inode, off, (size_t)PAGE_SIZE, ret);
}
out_restore:
ceph_restore_sigs(&oldset);
- if (ret < 0)
- ret = (ret == -ENOMEM) ? VM_FAULT_OOM : VM_FAULT_SIGBUS;
+ if (err < 0)
+ ret = vmf_error(err);
return ret;
}
@@ -1524,7 +1525,7 @@ static int ceph_filemap_fault(struct vm_fault *vmf)
/*
* Reuse write_begin here for simplicity.
*/
-static int ceph_page_mkwrite(struct vm_fault *vmf)
+static vm_fault_t ceph_page_mkwrite(struct vm_fault *vmf)
{
struct vm_area_struct *vma = vmf->vma;
struct inode *inode = file_inode(vma->vm_file);
@@ -1535,8 +1536,9 @@ static int ceph_page_mkwrite(struct vm_fault *vmf)
loff_t off = page_offset(page);
loff_t size = i_size_read(inode);
size_t len;
- int want, got, ret;
+ int want, got, err;
sigset_t oldset;
+ vm_fault_t ret = VM_FAULT_SIGBUS;
prealloc_cf = ceph_alloc_cap_flush();
if (!prealloc_cf)
@@ -1550,10 +1552,10 @@ static int ceph_page_mkwrite(struct vm_fault *vmf)
lock_page(page);
locked_page = page;
}
- ret = ceph_uninline_data(vma->vm_file, locked_page);
+ err = ceph_uninline_data(vma->vm_file, locked_page);
if (locked_page)
unlock_page(locked_page);
- if (ret < 0)
+ if (err < 0)
goto out_free;
}
@@ -1570,9 +1572,9 @@ static int ceph_page_mkwrite(struct vm_fault *vmf)
want = CEPH_CAP_FILE_BUFFER;
got = 0;
- ret = ceph_get_caps(ci, CEPH_CAP_FILE_WR, want, off + len,
+ err = ceph_get_caps(ci, CEPH_CAP_FILE_WR, want, off + len,
&got, NULL);
- if (ret < 0)
+ if (err < 0)
goto out_free;
dout("page_mkwrite %p %llu~%zd got cap refs on %s\n",
@@ -1590,13 +1592,13 @@ static int ceph_page_mkwrite(struct vm_fault *vmf)
break;
}
- ret = ceph_update_writeable_page(vma->vm_file, off, len, page);
- if (ret >= 0) {
+ err = ceph_update_writeable_page(vma->vm_file, off, len, page);
+ if (err >= 0) {
/* success. we'll keep the page locked. */
set_page_dirty(page);
ret = VM_FAULT_LOCKED;
}
- } while (ret == -EAGAIN);
+ } while (err == -EAGAIN);
if (ret == VM_FAULT_LOCKED ||
ci->i_inline_version != CEPH_INLINE_NONE) {
@@ -1610,14 +1612,14 @@ static int ceph_page_mkwrite(struct vm_fault *vmf)
__mark_inode_dirty(inode, dirty);
}
- dout("page_mkwrite %p %llu~%zd dropping cap refs on %s ret %d\n",
+ dout("page_mkwrite %p %llu~%zd dropping cap refs on %s ret %x\n",
inode, off, len, ceph_cap_string(got), ret);
ceph_put_cap_refs(ci, got);
out_free:
ceph_restore_sigs(&oldset);
ceph_free_cap_flush(prealloc_cf);
- if (ret < 0)
- ret = (ret == -ENOMEM) ? VM_FAULT_OOM : VM_FAULT_SIGBUS;
+ if (err < 0)
+ ret = vmf_error(err);
return ret;
}
--
1.9.1
^ permalink raw reply related
* Re: [PATCH 1/1] getxattr: use correct xattr length
From: Christian Brauner @ 2018-07-23 15:00 UTC (permalink / raw)
To: Serge E. Hallyn; +Cc: linux-fsdevel, linux-kernel, cjwatson, ebiederm, viro
In-Reply-To: <20180613154537.GA29950@mail.hallyn.com>
On Wed, Jun 13, 2018 at 10:45:37AM -0500, Serge Hallyn wrote:
> On Thu, Jun 07, 2018 at 01:43:48PM +0200, Christian Brauner wrote:
> > When running in a container with a user namespace, if you call getxattr
> > with name = "system.posix_acl_access" and size % 8 != 4, then getxattr
> > silently skips the user namespace fixup that it normally does resulting in
> > un-fixed-up data being returned.
> > This is caused by posix_acl_fix_xattr_to_user() being passed the total
> > buffer size and not the actual size of the xattr as returned by
> > vfs_getxattr().
> > This commit passes the actual length of the xattr as returned by
> > vfs_getxattr() down.
> >
> > A reproducer for the issue is:
> >
> > touch acl_posix
> >
> > setfacl -m user:0:rwx acl_posix
> >
> > and the compile:
> >
> > #define _GNU_SOURCE
> > #include <errno.h>
> > #include <stdio.h>
> > #include <stdlib.h>
> > #include <string.h>
> > #include <sys/types.h>
> > #include <unistd.h>
> > #include <attr/xattr.h>
> >
> > /* Run in user namespace with nsuid 0 mapped to uid != 0 on the host. */
> > int main(int argc, void **argv)
> > {
> > ssize_t ret1, ret2;
> > char buf1[128], buf2[132];
> > int fret = EXIT_SUCCESS;
> > char *file;
> >
> > if (argc < 2) {
> > fprintf(stderr,
> > "Please specify a file with "
> > "\"system.posix_acl_access\" permissions set\n");
> > _exit(EXIT_FAILURE);
> > }
> > file = argv[1];
> >
> > ret1 = getxattr(file, "system.posix_acl_access",
> > buf1, sizeof(buf1));
> > if (ret1 < 0) {
> > fprintf(stderr, "%s - Failed to retrieve "
> > "\"system.posix_acl_access\" "
> > "from \"%s\"\n", strerror(errno), file);
> > _exit(EXIT_FAILURE);
> > }
> >
> > ret2 = getxattr(file, "system.posix_acl_access",
> > buf2, sizeof(buf2));
> > if (ret2 < 0) {
> > fprintf(stderr, "%s - Failed to retrieve "
> > "\"system.posix_acl_access\" "
> > "from \"%s\"\n", strerror(errno), file);
> > _exit(EXIT_FAILURE);
> > }
> >
> > if (ret1 != ret2) {
> > fprintf(stderr, "The value of \"system.posix_acl_"
> > "access\" for file \"%s\" changed "
> > "between two successive calls\n", file);
> > _exit(EXIT_FAILURE);
> > }
> >
> > for (ssize_t i = 0; i < ret2; i++) {
> > if (buf1[i] == buf2[i])
> > continue;
> >
> > fprintf(stderr,
> > "Unexpected different in byte %zd: "
> > "%02x != %02x\n", i, buf1[i], buf2[i]);
> > fret = EXIT_FAILURE;
> > }
> >
> > if (fret == EXIT_SUCCESS)
> > fprintf(stderr, "Test passed\n");
> > else
> > fprintf(stderr, "Test failed\n");
> >
> > _exit(fret);
> > }
> > and run:
> >
> > ./tester acl_posix
> >
> > On a non-fixed up kernel this should return something like:
> >
> > root@c1:/# ./t
> > Unexpected different in byte 16: ffffffa0 != 00
> > Unexpected different in byte 17: ffffff86 != 00
> > Unexpected different in byte 18: 01 != 00
> >
> > and on a fixed kernel:
> >
> > root@c1:~# ./t
> > Test passed
> >
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=199945
> > Reported-by: Colin Watson <cjwatson@ubuntu.com>
> > Signed-off-by: Christian Brauner <christian@brauner.io>
>
> D'oh, sorry, I thought I had replied to this!
>
> Acked-by: Serge Hallyn <serge@hallyn.com>
Should this still land as a bugfix in 4.18?
Christian
>
> thanks,
> Serge
>
> > ---
> > fs/xattr.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/fs/xattr.c b/fs/xattr.c
> > index f9cb1db187b7..1bee74682513 100644
> > --- a/fs/xattr.c
> > +++ b/fs/xattr.c
> > @@ -539,7 +539,7 @@ getxattr(struct dentry *d, const char __user *name, void __user *value,
> > if (error > 0) {
> > if ((strcmp(kname, XATTR_NAME_POSIX_ACL_ACCESS) == 0) ||
> > (strcmp(kname, XATTR_NAME_POSIX_ACL_DEFAULT) == 0))
> > - posix_acl_fix_xattr_to_user(kvalue, size);
> > + posix_acl_fix_xattr_to_user(kvalue, error);
> > if (size && copy_to_user(value, kvalue, error))
> > error = -EFAULT;
> > } else if (error == -ERANGE && size >= XATTR_SIZE_MAX) {
> > --
> > 2.17.0
^ permalink raw reply
* [Intel-wired-lan] e1000: ensure to free old tx/rx rings in set_ringparam()
From: Jeff Kirsher @ 2018-07-23 16:01 UTC (permalink / raw)
To: intel-wired-lan
In-Reply-To: <20180723160130.8911-1-jeffrey.t.kirsher@intel.com>
From: Bo Chen <chenbo@pdx.edu>
In 'e1000_set_ringparam()', the tx_ring and rx_ring are updated with new value
and the old tx/rx rings are freed only when the device is up. There are resource
leaks on old tx/rx rings when the device is not up. This bug is reported by COD,
a tool for testing kernel module binaries I am building.
This patch fixes the bug by always calling 'kfree()' on old tx/rx rings in
'e1000_set_ringparam()'.
Signed-off-by: Bo Chen <chenbo@pdx.edu>
Reviewed-by: Alexander Duyck <alexander.h.duyck@intel.com>
---
drivers/net/ethernet/intel/e1000/e1000_ethtool.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/intel/e1000/e1000_ethtool.c b/drivers/net/ethernet/intel/e1000/e1000_ethtool.c
index bdb3f8e65ed4..27b006b60f8b 100644
--- a/drivers/net/ethernet/intel/e1000/e1000_ethtool.c
+++ b/drivers/net/ethernet/intel/e1000/e1000_ethtool.c
@@ -624,14 +624,14 @@ static int e1000_set_ringparam(struct net_device *netdev,
adapter->tx_ring = tx_old;
e1000_free_all_rx_resources(adapter);
e1000_free_all_tx_resources(adapter);
- kfree(tx_old);
- kfree(rx_old);
adapter->rx_ring = rxdr;
adapter->tx_ring = txdr;
err = e1000_up(adapter);
if (err)
goto err_setup;
}
+ kfree(tx_old);
+ kfree(rx_old);
clear_bit(__E1000_RESETTING, &adapter->flags);
return 0;
^ permalink raw reply related
* [Intel-wired-lan] e1000: check on netif_running() before calling e1000_up()
From: Jeff Kirsher @ 2018-07-23 16:01 UTC (permalink / raw)
To: intel-wired-lan
From: Bo Chen <chenbo@pdx.edu>
When the device is not up, the call to 'e1000_up()' from the error handling path
of 'e1000_set_ringparam()' causes a kernel oops with a null-pointer
dereference. The null-pointer dereference is triggered in function
'e1000_alloc_rx_buffers()' at line 'buffer_info = &rx_ring->buffer_info[i]'.
This bug was reported by COD, a tool for testing kernel module binaries I am
building. This bug was also detected by KFI from Dr. Kai Cong.
This patch fixes the bug by checking on 'netif_running()' before calling
'e1000_up()' in 'e1000_set_ringparam()'.
Signed-off-by: Bo Chen <chenbo@pdx.edu>
Acked-by: Alexander Duyck <alexander.h.duyck@intel.com>
---
drivers/net/ethernet/intel/e1000/e1000_ethtool.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/e1000/e1000_ethtool.c b/drivers/net/ethernet/intel/e1000/e1000_ethtool.c
index bdb3f8e65ed4..c1e4e94f100f 100644
--- a/drivers/net/ethernet/intel/e1000/e1000_ethtool.c
+++ b/drivers/net/ethernet/intel/e1000/e1000_ethtool.c
@@ -644,7 +644,8 @@ static int e1000_set_ringparam(struct net_device *netdev,
err_alloc_rx:
kfree(txdr);
err_alloc_tx:
- e1000_up(adapter);
+ if (netif_running(adapter->netdev))
+ e1000_up(adapter);
err_setup:
clear_bit(__E1000_RESETTING, &adapter->flags);
return err;
^ permalink raw reply related
* [PATCH] docs: use the make wildcard function instead of find
From: Roger Pau Monne @ 2018-07-23 16:00 UTC (permalink / raw)
To: xen-devel; +Cc: Wei Liu, Ian Jackson, Roger Pau Monne
The regexp used with find in order to list the man pages doesn't work
with FreeBSD find, so use a wildcard instead. No functional change.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
---
docs/Makefile | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/docs/Makefile b/docs/Makefile
index b300bb6be1..fba6673db6 100644
--- a/docs/Makefile
+++ b/docs/Makefile
@@ -8,10 +8,10 @@ DATE := $(shell date +%Y-%m-%d)
DOC_ARCHES := arm x86_32 x86_64
# Documentation sources to build
-MAN1SRC-y := $(sort $(shell find man/ -regex '.*\.\(pod\|markdown\)\.1' -print))
-MAN5SRC-y := $(sort $(shell find man/ -regex '.*\.\(pod\|markdown\)\.5' -print))
-MAN7SRC-y := $(sort $(shell find man/ -regex '.*\.\(pod\|markdown\)\.7' -print))
-MAN8SRC-y := $(sort $(shell find man/ -regex '.*\.\(pod\|markdown\)\.8' -print))
+MAN1SRC-y := $(sort $(wildcard man/*.pod.1 man/*.markdown.1))
+MAN5SRC-y := $(sort $(wildcard man/*.pod.5 man/*.markdown.5))
+MAN7SRC-y := $(sort $(wildcard man/*.pod.7 man/*.markdown.7))
+MAN8SRC-y := $(sort $(wildcard man/*.pod.8 man/*.markdown.8))
MARKDOWNSRC-y := $(sort $(shell find misc -name '*.markdown' -print))
--
2.18.0
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related
* [Intel-wired-lan] [jkirsher-next-queue:dev-queue] BUILD SUCCESS 9fc8e9984f18d769abd6673df16c6647f4de390e
From: kbuild test robot @ 2018-07-23 16:00 UTC (permalink / raw)
To: intel-wired-lan
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue.git dev-queue
branch HEAD: 9fc8e9984f18d769abd6673df16c6647f4de390e ixgbe: Refactor queue disable logic to take completion time into account
elapsed time: 29m
configs tested: 85
The following configs have been built successfully.
More configs may be tested in the coming days.
x86_64 acpi-redef
x86_64 allyesdebian
x86_64 nfsroot
microblaze mmu_defconfig
microblaze nommu_defconfig
i386 randconfig-n0-201829
x86_64 randconfig-x007-201829
x86_64 randconfig-x003-201829
x86_64 randconfig-x000-201829
x86_64 randconfig-x005-201829
x86_64 randconfig-x004-201829
x86_64 randconfig-x008-201829
x86_64 randconfig-x001-201829
x86_64 randconfig-x009-201829
x86_64 randconfig-x002-201829
x86_64 randconfig-x006-201829
ia64 alldefconfig
ia64 allnoconfig
ia64 defconfig
i386 randconfig-i0-201829
i386 randconfig-i1-201829
alpha defconfig
parisc allnoconfig
parisc b180_defconfig
parisc c3000_defconfig
parisc defconfig
i386 randconfig-a0-201829
i386 randconfig-a1-201829
openrisc or1ksim_defconfig
um i386_defconfig
um x86_64_defconfig
x86_64 randconfig-x018-201829
x86_64 randconfig-x011-201829
x86_64 randconfig-x015-201829
x86_64 randconfig-x019-201829
x86_64 randconfig-x014-201829
x86_64 randconfig-x010-201829
x86_64 randconfig-x013-201829
x86_64 randconfig-x016-201829
x86_64 randconfig-x017-201829
x86_64 randconfig-x012-201829
m68k m5475evb_defconfig
m68k multi_defconfig
m68k sun3_defconfig
i386 randconfig-s0-201829
i386 randconfig-s1-201829
c6x evmc6678_defconfig
h8300 h8300h-sim_defconfig
nios2 10m50_defconfig
xtensa common_defconfig
xtensa iss_defconfig
i386 randconfig-x012-201829
i386 randconfig-x017-201829
i386 randconfig-x014-201829
i386 randconfig-x016-201829
i386 randconfig-x013-201829
i386 randconfig-x011-201829
i386 randconfig-x018-201829
i386 randconfig-x010-201829
i386 randconfig-x015-201829
i386 randconfig-x019-201829
i386 randconfig-x078-201829
i386 randconfig-x070-201829
i386 randconfig-x075-201829
i386 randconfig-x076-201829
i386 randconfig-x074-201829
i386 randconfig-x079-201829
i386 randconfig-x071-201829
i386 randconfig-x073-201829
i386 randconfig-x072-201829
i386 randconfig-x077-201829
sh allnoconfig
sh rsk7269_defconfig
sh sh7785lcr_32bit_defconfig
sh titan_defconfig
i386 randconfig-x008-201829
i386 randconfig-x009-201829
i386 randconfig-x005-201829
i386 randconfig-x000-201829
i386 randconfig-x003-201829
i386 randconfig-x001-201829
i386 randconfig-x004-201829
i386 randconfig-x006-201829
i386 randconfig-x007-201829
i386 randconfig-x002-201829
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
^ permalink raw reply
* [Buildroot] [PATCH 1/1] whois: bump to version 5.3.2
From: Fabrice Fontaine @ 2018-07-23 16:00 UTC (permalink / raw)
To: buildroot
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
---
package/whois/whois.hash | 4 ++--
package/whois/whois.mk | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/package/whois/whois.hash b/package/whois/whois.hash
index e69b95d999..4fdfebce0f 100644
--- a/package/whois/whois.hash
+++ b/package/whois/whois.hash
@@ -1,5 +1,5 @@
-# From http://snapshot.debian.org/archive/debian/20180522T155750Z/pool/main/w/whois/whois_5.3.1.dsc
-sha256 ef4ead31306a388d9c8c83d67f56c94ed8b4c85e94f60baea2f5b1660445893e whois_5.3.1.tar.xz
+# From http://snapshot.debian.org/archive/debian/20180715T153200Z/pool/main/w/whois/whois_5.3.2.dsc
+sha256 79714ba89172bca08a2443f59885daa4af0c5f8d6a49bc9e7f2a83559a286354 whois_5.3.2.tar.xz
# Hash for license file:
sha256 8177f97513213526df2cf6184d8ff986c675afb514d4e68a404010521b880643 COPYING
diff --git a/package/whois/whois.mk b/package/whois/whois.mk
index 6b6069c51a..c162f1cf38 100644
--- a/package/whois/whois.mk
+++ b/package/whois/whois.mk
@@ -4,8 +4,8 @@
#
################################################################################
-WHOIS_VERSION = 5.3.1
-WHOIS_SITE = http://snapshot.debian.org/archive/debian/20180522T155750Z/pool/main/w/whois
+WHOIS_VERSION = 5.3.2
+WHOIS_SITE = http://snapshot.debian.org/archive/debian/20180715T153200Z/pool/main/w/whois
WHOIS_SOURCE = whois_$(WHOIS_VERSION).tar.xz
WHOIS_DEPENDENCIES = $(TARGET_NLS_DEPENDENCIES)
WHOIS_MAKE_ENV = $(TARGET_MAKE_ENV)
--
2.14.1
^ permalink raw reply related
* [PATCH 01/12] mfd: dt-bindings: Add wcd9335 mfd bindings
From: Srinivas Kandagatla @ 2018-07-23 15:53 UTC (permalink / raw)
To: lee.jones, robh+dt, broonie
Cc: mark.rutland, lgirdwood, tiwai, bgoswami, devicetree,
linux-kernel, vkoul, alsa-devel, Srinivas Kandagatla
In-Reply-To: <20180723155410.9494-1-srinivas.kandagatla@linaro.org>
Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC, supports
Qualcomm Technologies, Inc. (QTI) multimedia solutions, including
the MSM8996, MSM8976, and MSM8956 chipsets. It has in-build
Soundwire controller, interrupt mux. It supports both I2S/I2C and
SLIMbus audio interfaces.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../devicetree/bindings/mfd/qcom,wcd9335.txt | 130 +++++++++++++++++++++
1 file changed, 130 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/qcom,wcd9335.txt
diff --git a/Documentation/devicetree/bindings/mfd/qcom,wcd9335.txt b/Documentation/devicetree/bindings/mfd/qcom,wcd9335.txt
new file mode 100644
index 000000000000..1f8c9e8d4e3d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/qcom,wcd9335.txt
@@ -0,0 +1,130 @@
+QCOM WCD9335 Codec
+
+Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC, supports
+Qualcomm Technologies, Inc. (QTI) multimedia solutions, including
+the MSM8996, MSM8976, and MSM8956 chipsets. It has in-build
+Soundwire controller, interrupt mux. It supports both I2S/I2C and
+SLIMbus audio interfaces.
+
+Required properties with SLIMbus Interface:
+
+- compatible:
+ Usage: required
+ Value type: <stringlist>
+ Definition: For SLIMbus interface it should be "slimMID,PID",
+ textual representation of Manufacturer ID, Product Code,
+ shall be in lower case hexadecimal with leading zeroes
+ suppressed. Refer to slimbus/bus.txt for details.
+ Should be:
+ "slim217,1a0" for MSM8996 and APQ8096 SoCs with SLIMbus.
+
+- reg
+ Usage: required
+ Value type: <u32 u32>
+ Definition: Should be ('Device index', 'Instance ID')
+
+- interrupts
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Interrupts via WCD INTR1 and INTR2 pins
+
+- interrupt-names:
+ Usage: required
+ Value type: <String array>
+ Definition: Interrupt names of WCD INTR1 and INTR2
+ Should be: "intr1", "intr2"
+
+- reset-gpio:
+ Usage: required
+ Value type: <String Array>
+ Definition: Reset gpio line
+
+- qcom,ifd:
+ Usage: required
+ Value type: <phandle>
+ Definition: SLIM interface device
+
+- clocks:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: See clock-bindings.txt section "consumers". List of
+ three clock specifiers for mclk, mclk2 and slimbus clock.
+
+- clock-names:
+ Usage: required
+ Value type: <string>
+ Definition: Must contain "mclk", "mclk2" and "slimbus" strings.
+
+- vdd-buck-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain a reference to the 1.8V buck supply
+
+- vdd-buck-sido-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain a reference to the 1.8V SIDO buck supply
+
+- vdd-rx-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain a reference to the 1.8V rx supply
+
+- vdd-tx-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain a reference to the 1.8V tx supply
+
+- vdd-vbat-supply:
+ Usage: Optional
+ Value type: <phandle>
+ Definition: Should contain a reference to the vbat supply
+
+- vdd-micbias-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain a reference to the micbias supply
+
+- vdd-io-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain a reference to the 1.8V io supply
+
+- interrupt-controller:
+ Usage: required
+ Definition: Indicating that this is a interrupt controller
+
+- #interrupt-cells:
+ Usage: required
+ Value type: <int>
+ Definition: should be 1
+
+= WCD9335 Child devices
+Each subnode of WCD9335 represents a functional blocks like
+"audio codec", "soundwire Controller" of WCD. The name of the
+nodes are not important. The properties of these nodes are
+defined by the individual bindings for the specific device.
+
+Example:
+
+wcd9335@1 {
+ compatible = "slim217,1a0";
+ reg = <1 0>;
+ interrupts = <&msmgpio 54 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "intr2"
+ reset-gpio = <&msmgpio 64 0>;
+ qcom,ifd = <&wc9335_ifd>;
+ clock-names = "mclk", "native";
+ clocks = <&rpmcc RPM_SMD_DIV_CLK1>,
+ <&rpmcc RPM_SMD_BB_CLK1>;
+ vdd-buck-supply = <&pm8994_s4>;
+ vdd-rx-supply = <&pm8994_s4>;
+ vdd-buck-sido-supply = <&pm8994_s4>;
+ vdd-tx-supply = <&pm8994_s4>;
+ vdd-io-supply = <&pm8994_s4>;
+
+ codec {
+ compatible = "qcom,wcd9335-codec";
+ #sound-dai-cells = <1>;
+ };
+}
--
2.16.2
^ permalink raw reply related
* [PATCH 02/12] mfd: wcd9335: add support to wcd9335 core
From: Srinivas Kandagatla @ 2018-07-23 15:54 UTC (permalink / raw)
To: lee.jones, robh+dt, broonie
Cc: mark.rutland, lgirdwood, tiwai, bgoswami, devicetree,
linux-kernel, vkoul, alsa-devel, Srinivas Kandagatla
In-Reply-To: <20180723155410.9494-1-srinivas.kandagatla@linaro.org>
Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC,
It has mulitple blocks like Soundwire controller, codec,
Codec processing engine, ClassH controller, interrupt mux.
It supports both I2S/I2C and SLIMbus audio interfaces.
This patch adds support to SLIMbus audio interface.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/mfd/Kconfig | 18 ++
drivers/mfd/Makefile | 4 +
drivers/mfd/wcd9335-core.c | 269 ++++++++++++++++
include/linux/mfd/wcd9335/registers.h | 580 ++++++++++++++++++++++++++++++++++
include/linux/mfd/wcd9335/wcd9335.h | 40 +++
5 files changed, 911 insertions(+)
create mode 100644 drivers/mfd/wcd9335-core.c
create mode 100644 include/linux/mfd/wcd9335/registers.h
create mode 100644 include/linux/mfd/wcd9335/wcd9335.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index f3fa516011ec..6e5b5f3cfe20 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1807,6 +1807,24 @@ config MFD_WM97xx
support for the WM97xx, in order to use the actual functionaltiy of
the device other drivers must be enabled.
+config MFD_WCD9335
+ tristate
+ select MFD_CORE
+ select REGMAP
+ select REGMAP_IRQ
+
+config MFD_WCD9335_SLIM
+ tristate "Qualcomm WCD9335 with SLIMbus"
+ select MFD_WCD9335
+ select REGMAP_SLIMBUS
+ depends on SLIMBUS
+ help
+ The WCD9335 is a standalone Hi-Fi audio codec IC, supports
+ Qualcomm Technologies, Inc. (QTI) multimedia solutions, including
+ the MSM8996, MSM8976, and MSM8956 chipsets. It has inbuild
+ Soundwire controller, interrupt mux. It supports both I2S/I2C and
+ SLIMbus audio interfaces. This option selects SLIMbus audio interface.
+
config MFD_STW481X
tristate "Support for ST Microelectronics STw481x"
depends on I2C && (ARCH_NOMADIK || COMPILE_TEST)
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 2852a6042ecf..a4697370640b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -56,6 +56,10 @@ endif
ifeq ($(CONFIG_MFD_CS47L24),y)
obj-$(CONFIG_MFD_ARIZONA) += cs47l24-tables.o
endif
+
+obj-$(CONFIG_MFD_WCD9335) += wcd9335.o
+wcd9335-objs := wcd9335-core.o
+
obj-$(CONFIG_MFD_WM8400) += wm8400-core.o
wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o
wm831x-objs += wm831x-auxadc.o
diff --git a/drivers/mfd/wcd9335-core.c b/drivers/mfd/wcd9335-core.c
new file mode 100644
index 000000000000..ccdd27c3a351
--- /dev/null
+++ b/drivers/mfd/wcd9335-core.c
@@ -0,0 +1,269 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018, Linaro Limited
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slimbus.h>
+#include <linux/regmap.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/mfd/core.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/mfd/wcd9335/wcd9335.h>
+#include <linux/mfd/wcd9335/registers.h>
+
+static const struct regmap_range_cfg wcd9335_ranges[] = {
+ { .name = "WCD9335",
+ .range_min = 0x0,
+ .range_max = WCD9335_MAX_REGISTER,
+ .selector_reg = WCD9335_REG(0x0, 0),
+ .selector_mask = 0xff,
+ .selector_shift = 0,
+ .window_start = 0x0,
+ .window_len = 0x1000,
+ },
+};
+
+struct regmap_config wcd9335_regmap_config = {
+ .reg_bits = 16,
+ .val_bits = 8,
+ .cache_type = REGCACHE_RBTREE,
+ .max_register = WCD9335_MAX_REGISTER,
+ .can_multi_write = true,
+ .ranges = wcd9335_ranges,
+ .num_ranges = ARRAY_SIZE(wcd9335_ranges),
+};
+
+static const struct regmap_range_cfg wcd9335_ifd_ranges[] = {
+ { .name = "WCD9335-IFD",
+ .range_min = 0x0,
+ .range_max = WCD9335_REG(0, 0x7ff),
+ .selector_reg = WCD9335_REG(0, 0x0),
+ .selector_mask = 0xff,
+ .selector_shift = 0,
+ .window_start = 0x0,
+ .window_len = 0x1000,
+ },
+};
+
+struct regmap_config wcd9335_ifd_regmap_config = {
+ .reg_bits = 16,
+ .val_bits = 8,
+ .can_multi_write = true,
+ .max_register = WCD9335_REG(0, 0x7FF),
+ .ranges = wcd9335_ifd_ranges,
+ .num_ranges = ARRAY_SIZE(wcd9335_ifd_ranges),
+};
+
+static int wcd9335_parse_dt(struct wcd9335 *wcd)
+{
+ struct device *dev = wcd->dev;
+ struct device_node *np = dev->of_node;
+ int ret;
+
+ wcd->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
+ if (wcd->reset_gpio < 0) {
+ dev_err(dev, "Reset gpio missing in DT\n");
+ return wcd->reset_gpio;
+ }
+
+ wcd->mclk = devm_clk_get(dev, "mclk");
+ if (IS_ERR(wcd->mclk)) {
+ dev_err(dev, "mclk not found\n");
+ return PTR_ERR(wcd->mclk);
+ }
+
+ wcd->native_clk = devm_clk_get(dev, "slimbus");
+ if (IS_ERR(wcd->native_clk)) {
+ dev_err(dev, "slimbus clk not found\n");
+ return PTR_ERR(wcd->native_clk);
+ }
+
+ wcd->supplies[0].supply = "vdd-buck";
+ wcd->supplies[1].supply = "vdd-buck-sido";
+ wcd->supplies[2].supply = "vdd-tx";
+ wcd->supplies[3].supply = "vdd-rx";
+ wcd->supplies[4].supply = "vdd-io";
+
+ ret = regulator_bulk_get(dev, WCD9335_MAX_SUPPLY, wcd->supplies);
+ if (ret != 0) {
+ dev_err(dev, "Failed to get supplies: err = %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int wcd9335_power_on_reset(struct wcd9335 *wcd)
+{
+ struct device *dev = wcd->dev;
+ int ret;
+
+ ret = regulator_bulk_enable(WCD9335_MAX_SUPPLY, wcd->supplies);
+ if (ret != 0) {
+ dev_err(dev, "Failed to get supplies: err = %d\n", ret);
+ return ret;
+ }
+
+ /*
+ * For WCD9335, it takes about 600us for the Vout_A and
+ * Vout_D to be ready after BUCK_SIDO is powered up.
+ * SYS_RST_N shouldn't be pulled high during this time
+ */
+ usleep_range(600, 650);
+
+ gpio_direction_output(wcd->reset_gpio, 0);
+ msleep(20);
+ gpio_set_value(wcd->reset_gpio, 1);
+ msleep(20);
+
+ return 0;
+}
+
+static int wcd9335_bring_up(struct wcd9335 *wcd)
+{
+ struct regmap *rm = wcd->regmap;
+ int val, byte0;
+ int ret = 0;
+
+ regmap_read(rm, WCD9335_CHIP_TIER_CTRL_EFUSE_VAL_OUT0, &val);
+ regmap_read(rm, WCD9335_CHIP_TIER_CTRL_CHIP_ID_BYTE0, &byte0);
+
+ if ((val < 0) || (byte0 < 0)) {
+ dev_err(wcd->dev, "wcd9335 codec version detection fail!\n");
+ return -EINVAL;
+ }
+
+ if (byte0 == 0x1) {
+ dev_info(wcd->dev, "wcd9335 codec version is v2.0\n");
+ wcd->version = WCD9335_VERSION_2_0;
+ regmap_write(rm, WCD9335_CODEC_RPM_RST_CTL, 0x01);
+ regmap_write(rm, WCD9335_SIDO_SIDO_TEST_2, 0x00);
+ regmap_write(rm, WCD9335_SIDO_SIDO_CCL_8, 0x6F);
+ regmap_write(rm, WCD9335_BIAS_VBG_FINE_ADJ, 0x65);
+ regmap_write(rm, WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x5);
+ regmap_write(rm, WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x7);
+ regmap_write(rm, WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x3);
+ regmap_write(rm, WCD9335_CODEC_RPM_RST_CTL, 0x3);
+ } else {
+ dev_err(wcd->dev, "wcd9335 codec version not supported\n");
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static int wcd9335_slim_probe(struct slim_device *slim)
+{
+ struct device *dev = &slim->dev;
+ struct wcd9335 *wcd;
+ int ret = 0;
+
+ /* Interface device */
+ if (slim->e_addr.dev_index == 0)
+ return 0;
+
+ wcd = devm_kzalloc(dev, sizeof(*wcd), GFP_KERNEL);
+ if (!wcd)
+ return -ENOMEM;
+
+ wcd->dev = dev;
+ ret = wcd9335_parse_dt(wcd);
+ if (ret) {
+ dev_err(dev, "Error parsing DT (%d)\n", ret);
+ return ret;
+ }
+
+ ret = wcd9335_power_on_reset(wcd);
+ if (ret) {
+ dev_err(dev, "Error Powering\n");
+ return ret;
+ }
+
+ wcd->regmap = regmap_init_slimbus(slim, &wcd9335_regmap_config);
+ if (IS_ERR(wcd->regmap)) {
+ ret = PTR_ERR(wcd->regmap);
+ dev_err(dev, "Failed to allocate register map:%d\n", ret);
+ return ret;
+ }
+
+ dev_set_drvdata(dev, wcd);
+ wcd->slim = slim;
+ wcd->intf_type = WCD9335_INTERFACE_TYPE_SLIMBUS;
+
+ return 0;
+}
+
+static const struct mfd_cell wcd9335_devices[] = {
+ {
+ .name = "wcd9335-codec",
+ .of_compatible = "qcom,wcd9335-codec",
+ },
+};
+
+static int wcd9335_slim_status(struct slim_device *sdev,
+ enum slim_device_status s)
+{
+ struct device_node *ifd_np;
+ struct wcd9335 *wcd;
+ struct device *dev;
+ int ret;
+
+ /* Interface device */
+ if (sdev->e_addr.dev_index == 0)
+ return 0;
+
+ wcd = dev_get_drvdata(&sdev->dev);
+ dev = wcd->dev;
+
+ ifd_np = of_parse_phandle(wcd->dev->of_node, "qcom,ifd", 0);
+ if (!ifd_np) {
+ dev_err(wcd->dev, "No Interface device found\n");
+ return -EINVAL;
+ }
+
+ wcd->slim_ifd = of_slim_get_device(sdev->ctrl, ifd_np);
+ if (!wcd->slim_ifd) {
+ dev_err(wcd->dev, "Unable to get SLIM Interface device\n");
+ return -EINVAL;
+ }
+
+ wcd->ifd_regmap = regmap_init_slimbus(wcd->slim_ifd,
+ &wcd9335_ifd_regmap_config);
+ if (IS_ERR(wcd->ifd_regmap)) {
+ dev_err(dev, "Failed to allocate register map\n");
+ return PTR_ERR(wcd->ifd_regmap);
+ }
+
+ ret = wcd9335_bring_up(wcd);
+ if (ret) {
+ dev_err(dev, "Failed to bringup WCD9335\n");
+ return ret;
+ }
+
+ wcd->slim_ifd = wcd->slim_ifd;
+
+ return mfd_add_devices(wcd->dev, 0, wcd9335_devices,
+ ARRAY_SIZE(wcd9335_devices), NULL, 0, NULL);
+}
+
+static const struct slim_device_id wcd9335_slim_id[] = {
+ {0x217, 0x1a0, 0x1, 0x0},
+ {}
+};
+
+static struct slim_driver wcd9335_slim_driver = {
+ .driver = {
+ .name = "wcd9335-slim",
+ },
+ .probe = wcd9335_slim_probe,
+ .device_status = wcd9335_slim_status,
+ .id_table = wcd9335_slim_id,
+};
+
+module_slim_driver(wcd9335_slim_driver);
+MODULE_DESCRIPTION("WCD9335 slim driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mfd/wcd9335/registers.h b/include/linux/mfd/wcd9335/registers.h
new file mode 100644
index 000000000000..d6a81017c2b5
--- /dev/null
+++ b/include/linux/mfd/wcd9335/registers.h
@@ -0,0 +1,580 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _WCD9335_REGISTERS_H
+#define _WCD9335_REGISTERS_H
+
+#define WCD9335_PAGE_SIZE 0x256
+#define WCD9335_NUM_PAGES 0x256
+
+/*
+ * WCD9335 register base can change according to the mode it works in
+ * in slimbus mode the reg base starts from 0x800
+ * in i2s/i2c mode the reg base is 0x0
+ */
+#define WCD9335_REG(pg, r) ((pg << 12) | (r) | 0x800)
+#define WCD9335_REG_OFFSET(r) (r & 0xFF)
+#define WCD9335_PAGE_OFFSET(r) ((r >> 12) & 0xFF)
+
+/* Page-0 Registers */
+#define WCD9335_PAGE0_PAGE_REGISTER WCD9335_REG(0x00, 0x000)
+#define WCD9335_CODEC_RPM_CLK_GATE WCD9335_REG(0x00, 0x002)
+#define WCD9335_CODEC_RPM_CLK_GATE_MCLK_GATE_MASK GENMASK(1, 0)
+#define WCD9335_CODEC_RPM_CLK_MCLK_CFG WCD9335_REG(0x00, 0x003)
+#define WCD9335_CODEC_RPM_CLK_MCLK_CFG_9P6MHZ BIT(0)
+#define WCD9335_CODEC_RPM_CLK_MCLK_CFG_12P288MHZ BIT(0)
+#define WCD9335_CODEC_RPM_CLK_MCLK_CFG_MCLK_MASK GENMASK(1, 0)
+#define WCD9335_CODEC_RPM_RST_CTL WCD9335_REG(0x00, 0x009)
+#define WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL WCD9335_REG(0x00, 0x011)
+#define WCD9335_CHIP_TIER_CTRL_CHIP_ID_BYTE0 WCD9335_REG(0x00, 0x021)
+#define WCD9335_CHIP_TIER_CTRL_EFUSE_CTL WCD9335_REG(0x00, 0x025)
+#define WCD9335_CHIP_TIER_CTRL_EFUSE_SSTATE_MASK GENMASK(4, 1)
+#define WCD9335_CHIP_TIER_CTRL_EFUSE_EN_MASK BIT(0)
+#define WCD9335_CHIP_TIER_CTRL_EFUSE_ENABLE BIT(0)
+#define WCD9335_CHIP_TIER_CTRL_EFUSE_VAL_OUT0 WCD9335_REG(0x00, 0x029)
+#define WCD9335_CHIP_TIER_CTRL_EFUSE_STATUS WCD9335_REG(0x00, 0x039)
+#define WCD9335_INTR_PIN1_MASK0 WCD9335_REG(0x00, 0x089)
+#define WCD9335_INTR_PIN1_MASK1 WCD9335_REG(0x00, 0x08a)
+#define WCD9335_INTR_PIN1_MASK2 WCD9335_REG(0x00, 0x08b)
+#define WCD9335_INTR_PIN1_MASK3 WCD9335_REG(0x00, 0x08c)
+#define WCD9335_INTR_PIN1_STATUS0 WCD9335_REG(0x00, 0x091)
+#define WCD9335_INTR_PIN1_STATUS1 WCD9335_REG(0x00, 0x092)
+#define WCD9335_INTR_PIN1_STATUS2 WCD9335_REG(0x00, 0x093)
+#define WCD9335_INTR_PIN1_STATUS3 WCD9335_REG(0x00, 0x094)
+#define WCD9335_INTR_PIN1_CLEAR0 WCD9335_REG(0x00, 0x099)
+#define WCD9335_INTR_PIN1_CLEAR1 WCD9335_REG(0x00, 0x09a)
+#define WCD9335_INTR_PIN1_CLEAR2 WCD9335_REG(0x00, 0x09b)
+#define WCD9335_INTR_PIN1_CLEAR3 WCD9335_REG(0x00, 0x09c)
+#define WCD9335_INTR_PIN2_MASK0 WCD9335_REG(0x00, 0x0a1)
+#define WCD9335_INTR_PIN2_MASK1 WCD9335_REG(0x00, 0x0a2)
+#define WCD9335_INTR_PIN2_MASK2 WCD9335_REG(0x00, 0x0a3)
+#define WCD9335_INTR_PIN2_MASK3 WCD9335_REG(0x00, 0x0a4)
+#define WCD9335_INTR_PIN2_STATUS0 WCD9335_REG(0x00, 0x0a9)
+#define WCD9335_INTR_PIN2_STATUS1 WCD9335_REG(0x00, 0x0aa)
+#define WCD9335_INTR_PIN2_STATUS2 WCD9335_REG(0x00, 0x0ab)
+#define WCD9335_INTR_PIN2_STATUS3 WCD9335_REG(0x00, 0x0ac)
+#define WCD9335_INTR_PIN2_CLEAR0 WCD9335_REG(0x00, 0x0b1)
+#define WCD9335_INTR_PIN2_CLEAR1 WCD9335_REG(0x00, 0x0b2)
+#define WCD9335_INTR_PIN2_CLEAR2 WCD9335_REG(0x00, 0x0b3)
+#define WCD9335_INTR_PIN2_CLEAR3 WCD9335_REG(0x00, 0x0b4)
+#define WCD9335_INTR_LEVEL0 WCD9335_REG(0x00, 0x0e1)
+#define WCD9335_INTR_LEVEL1 WCD9335_REG(0x00, 0x0e2)
+#define WCD9335_INTR_LEVEL2 WCD9335_REG(0x00, 0x0e3)
+#define WCD9335_INTR_LEVEL3 WCD9335_REG(0x00, 0x0e4)
+
+/* Page-1 Registers */
+#define WCD9335_CPE_FLL_USER_CTL_0 WCD9335_REG(0x01, 0x001)
+#define WCD9335_CPE_FLL_USER_CTL_1 WCD9335_REG(0x01, 0x002)
+#define WCD9335_CPE_FLL_USER_CTL_2 WCD9335_REG(0x01, 0x003)
+#define WCD9335_CPE_FLL_USER_CTL_3 WCD9335_REG(0x01, 0x004)
+#define WCD9335_CPE_FLL_USER_CTL_4 WCD9335_REG(0x01, 0x005)
+#define WCD9335_CPE_FLL_USER_CTL_5 WCD9335_REG(0x01, 0x006)
+#define WCD9335_CPE_FLL_USER_CTL_6 WCD9335_REG(0x01, 0x007)
+#define WCD9335_CPE_FLL_USER_CTL_7 WCD9335_REG(0x01, 0x008)
+#define WCD9335_CPE_FLL_USER_CTL_8 WCD9335_REG(0x01, 0x009)
+#define WCD9335_CPE_FLL_USER_CTL_9 WCD9335_REG(0x01, 0x00a)
+#define WCD9335_CPE_FLL_L_VAL_CTL_0 WCD9335_REG(0x01, 0x00b)
+#define WCD9335_CPE_FLL_L_VAL_CTL_1 WCD9335_REG(0x01, 0x00c)
+#define WCD9335_CPE_FLL_DSM_FRAC_CTL_0 WCD9335_REG(0x01, 0x00d)
+#define WCD9335_CPE_FLL_DSM_FRAC_CTL_1 WCD9335_REG(0x01, 0x00e)
+#define WCD9335_CPE_FLL_CONFIG_CTL_0 WCD9335_REG(0x01, 0x00f)
+#define WCD9335_CPE_FLL_CONFIG_CTL_1 WCD9335_REG(0x01, 0x010)
+#define WCD9335_CPE_FLL_CONFIG_CTL_2 WCD9335_REG(0x01, 0x011)
+#define WCD9335_CPE_FLL_CONFIG_CTL_3 WCD9335_REG(0x01, 0x012)
+#define WCD9335_CPE_FLL_CONFIG_CTL_4 WCD9335_REG(0x01, 0x013)
+#define WCD9335_CPE_FLL_TEST_CTL_0 WCD9335_REG(0x01, 0x014)
+#define WCD9335_CPE_FLL_TEST_CTL_1 WCD9335_REG(0x01, 0x015)
+#define WCD9335_CPE_FLL_TEST_CTL_2 WCD9335_REG(0x01, 0x016)
+#define WCD9335_CPE_FLL_TEST_CTL_3 WCD9335_REG(0x01, 0x017)
+#define WCD9335_CPE_FLL_TEST_CTL_4 WCD9335_REG(0x01, 0x018)
+#define WCD9335_CPE_FLL_TEST_CTL_5 WCD9335_REG(0x01, 0x019)
+#define WCD9335_CPE_FLL_TEST_CTL_6 WCD9335_REG(0x01, 0x01a)
+#define WCD9335_CPE_FLL_TEST_CTL_7 WCD9335_REG(0x01, 0x01b)
+#define WCD9335_CPE_FLL_FREQ_CTL_0 WCD9335_REG(0x01, 0x01c)
+#define WCD9335_CPE_FLL_FREQ_CTL_1 WCD9335_REG(0x01, 0x01d)
+#define WCD9335_CPE_FLL_FREQ_CTL_2 WCD9335_REG(0x01, 0x01e)
+#define WCD9335_CPE_FLL_FREQ_CTL_3 WCD9335_REG(0x01, 0x01f)
+#define WCD9335_CPE_FLL_SSC_CTL_0 WCD9335_REG(0x01, 0x020)
+#define WCD9335_CPE_FLL_SSC_CTL_1 WCD9335_REG(0x01, 0x021)
+#define WCD9335_CPE_FLL_SSC_CTL_2 WCD9335_REG(0x01, 0x022)
+#define WCD9335_CPE_FLL_SSC_CTL_3 WCD9335_REG(0x01, 0x023)
+#define WCD9335_CPE_FLL_FLL_MODE WCD9335_REG(0x01, 0x024)
+#define WCD9335_CPE_FLL_STATUS_0 WCD9335_REG(0x01, 0x025)
+#define WCD9335_CPE_FLL_STATUS_1 WCD9335_REG(0x01, 0x026)
+#define WCD9335_CPE_FLL_STATUS_2 WCD9335_REG(0x01, 0x027)
+#define WCD9335_CPE_FLL_STATUS_3 WCD9335_REG(0x01, 0x028)
+#define WCD9335_I2S_FLL_USER_CTL_0 WCD9335_REG(0x01, 0x041)
+#define WCD9335_I2S_FLL_USER_CTL_1 WCD9335_REG(0x01, 0x042)
+#define WCD9335_I2S_FLL_USER_CTL_2 WCD9335_REG(0x01, 0x043)
+#define WCD9335_I2S_FLL_USER_CTL_3 WCD9335_REG(0x01, 0x044)
+#define WCD9335_I2S_FLL_USER_CTL_4 WCD9335_REG(0x01, 0x045)
+#define WCD9335_I2S_FLL_USER_CTL_5 WCD9335_REG(0x01, 0x046)
+#define WCD9335_I2S_FLL_USER_CTL_6 WCD9335_REG(0x01, 0x047)
+#define WCD9335_I2S_FLL_USER_CTL_7 WCD9335_REG(0x01, 0x048)
+#define WCD9335_I2S_FLL_USER_CTL_8 WCD9335_REG(0x01, 0x049)
+#define WCD9335_I2S_FLL_USER_CTL_9 WCD9335_REG(0x01, 0x04a)
+#define WCD9335_I2S_FLL_L_VAL_CTL_0 WCD9335_REG(0x01, 0x04b)
+#define WCD9335_I2S_FLL_L_VAL_CTL_1 WCD9335_REG(0x01, 0x04c)
+#define WCD9335_I2S_FLL_DSM_FRAC_CTL_0 WCD9335_REG(0x01, 0x04d)
+#define WCD9335_I2S_FLL_DSM_FRAC_CTL_1 WCD9335_REG(0x01, 0x04e)
+#define WCD9335_I2S_FLL_CONFIG_CTL_0 WCD9335_REG(0x01, 0x04f)
+#define WCD9335_I2S_FLL_CONFIG_CTL_1 WCD9335_REG(0x01, 0x050)
+#define WCD9335_I2S_FLL_CONFIG_CTL_2 WCD9335_REG(0x01, 0x051)
+#define WCD9335_I2S_FLL_CONFIG_CTL_3 WCD9335_REG(0x01, 0x052)
+#define WCD9335_I2S_FLL_CONFIG_CTL_4 WCD9335_REG(0x01, 0x053)
+#define WCD9335_I2S_FLL_TEST_CTL_0 WCD9335_REG(0x01, 0x054)
+#define WCD9335_I2S_FLL_TEST_CTL_1 WCD9335_REG(0x01, 0x055)
+#define WCD9335_I2S_FLL_TEST_CTL_2 WCD9335_REG(0x01, 0x056)
+#define WCD9335_I2S_FLL_TEST_CTL_3 WCD9335_REG(0x01, 0x057)
+#define WCD9335_I2S_FLL_TEST_CTL_4 WCD9335_REG(0x01, 0x058)
+#define WCD9335_I2S_FLL_TEST_CTL_5 WCD9335_REG(0x01, 0x059)
+#define WCD9335_I2S_FLL_TEST_CTL_6 WCD9335_REG(0x01, 0x05a)
+#define WCD9335_I2S_FLL_TEST_CTL_7 WCD9335_REG(0x01, 0x05b)
+#define WCD9335_I2S_FLL_FREQ_CTL_0 WCD9335_REG(0x01, 0x05c)
+#define WCD9335_I2S_FLL_FREQ_CTL_1 WCD9335_REG(0x01, 0x05d)
+#define WCD9335_I2S_FLL_FREQ_CTL_2 WCD9335_REG(0x01, 0x05e)
+#define WCD9335_I2S_FLL_FREQ_CTL_3 WCD9335_REG(0x01, 0x05f)
+#define WCD9335_I2S_FLL_SSC_CTL_0 WCD9335_REG(0x01, 0x060)
+#define WCD9335_I2S_FLL_SSC_CTL_1 WCD9335_REG(0x01, 0x061)
+#define WCD9335_I2S_FLL_SSC_CTL_2 WCD9335_REG(0x01, 0x062)
+#define WCD9335_I2S_FLL_SSC_CTL_3 WCD9335_REG(0x01, 0x063)
+#define WCD9335_I2S_FLL_FLL_MODE WCD9335_REG(0x01, 0x064)
+#define WCD9335_I2S_FLL_STATUS_0 WCD9335_REG(0x01, 0x065)
+#define WCD9335_I2S_FLL_STATUS_1 WCD9335_REG(0x01, 0x066)
+#define WCD9335_I2S_FLL_STATUS_2 WCD9335_REG(0x01, 0x067)
+#define WCD9335_I2S_FLL_STATUS_3 WCD9335_REG(0x01, 0x068)
+#define WCD9335_SB_FLL_USER_CTL_0 WCD9335_REG(0x01, 0x081)
+#define WCD9335_SB_FLL_USER_CTL_1 WCD9335_REG(0x01, 0x082)
+#define WCD9335_SB_FLL_USER_CTL_2 WCD9335_REG(0x01, 0x083)
+#define WCD9335_SB_FLL_USER_CTL_3 WCD9335_REG(0x01, 0x084)
+#define WCD9335_SB_FLL_USER_CTL_4 WCD9335_REG(0x01, 0x085)
+#define WCD9335_SB_FLL_USER_CTL_5 WCD9335_REG(0x01, 0x086)
+#define WCD9335_SB_FLL_USER_CTL_6 WCD9335_REG(0x01, 0x087)
+#define WCD9335_SB_FLL_USER_CTL_7 WCD9335_REG(0x01, 0x088)
+#define WCD9335_SB_FLL_USER_CTL_8 WCD9335_REG(0x01, 0x089)
+#define WCD9335_SB_FLL_USER_CTL_9 WCD9335_REG(0x01, 0x08a)
+#define WCD9335_SB_FLL_L_VAL_CTL_0 WCD9335_REG(0x01, 0x08b)
+#define WCD9335_SB_FLL_L_VAL_CTL_1 WCD9335_REG(0x01, 0x08c)
+#define WCD9335_SB_FLL_DSM_FRAC_CTL_0 WCD9335_REG(0x01, 0x08d)
+#define WCD9335_SB_FLL_DSM_FRAC_CTL_1 WCD9335_REG(0x01, 0x08e)
+#define WCD9335_SB_FLL_CONFIG_CTL_0 WCD9335_REG(0x01, 0x08f)
+#define WCD9335_SB_FLL_CONFIG_CTL_1 WCD9335_REG(0x01, 0x090)
+#define WCD9335_SB_FLL_CONFIG_CTL_2 WCD9335_REG(0x01, 0x091)
+#define WCD9335_SB_FLL_CONFIG_CTL_3 WCD9335_REG(0x01, 0x092)
+#define WCD9335_SB_FLL_CONFIG_CTL_4 WCD9335_REG(0x01, 0x093)
+#define WCD9335_SB_FLL_TEST_CTL_0 WCD9335_REG(0x01, 0x094)
+#define WCD9335_SB_FLL_TEST_CTL_1 WCD9335_REG(0x01, 0x095)
+#define WCD9335_SB_FLL_TEST_CTL_2 WCD9335_REG(0x01, 0x096)
+#define WCD9335_SB_FLL_TEST_CTL_3 WCD9335_REG(0x01, 0x097)
+#define WCD9335_SB_FLL_TEST_CTL_4 WCD9335_REG(0x01, 0x098)
+#define WCD9335_SB_FLL_TEST_CTL_5 WCD9335_REG(0x01, 0x099)
+#define WCD9335_SB_FLL_TEST_CTL_6 WCD9335_REG(0x01, 0x09a)
+#define WCD9335_SB_FLL_TEST_CTL_7 WCD9335_REG(0x01, 0x09b)
+#define WCD9335_SB_FLL_FREQ_CTL_0 WCD9335_REG(0x01, 0x09c)
+#define WCD9335_SB_FLL_FREQ_CTL_1 WCD9335_REG(0x01, 0x09d)
+#define WCD9335_SB_FLL_FREQ_CTL_2 WCD9335_REG(0x01, 0x09e)
+#define WCD9335_SB_FLL_FREQ_CTL_3 WCD9335_REG(0x01, 0x09f)
+#define WCD9335_SB_FLL_SSC_CTL_0 WCD9335_REG(0x01, 0x0a0)
+#define WCD9335_SB_FLL_SSC_CTL_1 WCD9335_REG(0x01, 0x0a1)
+#define WCD9335_SB_FLL_SSC_CTL_2 WCD9335_REG(0x01, 0x0a2)
+#define WCD9335_SB_FLL_SSC_CTL_3 WCD9335_REG(0x01, 0x0a3)
+#define WCD9335_SB_FLL_FLL_MODE WCD9335_REG(0x01, 0x0a4)
+#define WCD9335_SB_FLL_STATUS_0 WCD9335_REG(0x01, 0x0a5)
+#define WCD9335_SB_FLL_STATUS_1 WCD9335_REG(0x01, 0x0a6)
+#define WCD9335_SB_FLL_STATUS_2 WCD9335_REG(0x01, 0x0a7)
+#define WCD9335_SB_FLL_STATUS_3 WCD9335_REG(0x01, 0x0a8)
+
+/* Page-2 Registers */
+#define WCD9335_PAGE2_PAGE_REGISTER WCD9335_REG(0x02, 0x000)
+#define WCD9335_CPE_SS_DMIC0_CTL WCD9335_REG(0x02, 0x063)
+#define WCD9335_CPE_SS_DMIC1_CTL WCD9335_REG(0x02, 0x064)
+#define WCD9335_CPE_SS_DMIC2_CTL WCD9335_REG(0x02, 0x065)
+#define WCD9335_CPE_SS_DMIC_CFG WCD9335_REG(0x02, 0x066)
+#define WCD9335_SOC_MAD_AUDIO_CTL_2 WCD9335_REG(0x02, 0x084)
+
+/* Page-6 Registers */
+#define WCD9335_PAGE6_PAGE_REGISTER WCD9335_REG(0x06, 0x000)
+#define WCD9335_ANA_BIAS WCD9335_REG(0x06, 0x001)
+#define WCD9335_ANA_BIAS_EN_MASK BIT(7)
+#define WCD9335_ANA_BIAS_ENABLE BIT(7)
+#define WCD9335_ANA_BIAS_DISABLE 0
+#define WCD9335_ANA_BIAS_PRECHRG_EN_MASK BIT(6)
+#define WCD9335_ANA_BIAS_PRECHRG_ENABLE BIT(6)
+#define WCD9335_ANA_BIAS_PRECHRG_DISABLE 0
+#define WCD9335_ANA_BIAS_PRECHRG_CTL_MODE BIT(5)
+#define WCD9335_ANA_BIAS_PRECHRG_CTL_MODE_AUTO BIT(5)
+#define WCD9335_ANA_BIAS_PRECHRG_CTL_MODE_MANUAL 0
+#define WCD9335_ANA_CLK_TOP WCD9335_REG(0x06, 0x002)
+#define WCD9335_ANA_CLK_MCLK_EN_MASK BIT(2)
+#define WCD9335_ANA_CLK_MCLK_ENABLE BIT(2)
+#define WCD9335_ANA_CLK_MCLK_DISABLE 0
+#define WCD9335_ANA_CLK_MCLK_SRC_MASK BIT(3)
+#define WCD9335_ANA_CLK_MCLK_SRC_RCO BIT(3)
+#define WCD9335_ANA_CLK_MCLK_SRC_EXTERNAL 0
+#define WCD9335_ANA_CLK_EXT_CLKBUF_EN_MASK BIT(7)
+#define WCD9335_ANA_CLK_EXT_CLKBUF_ENABLE BIT(7)
+#define WCD9335_ANA_CLK_EXT_CLKBUF_DISABLE 0
+#define WCD9335_ANA_RCO WCD9335_REG(0x06, 0x003)
+#define WCD9335_ANA_RCO_BG_EN_MASK BIT(7)
+#define WCD9335_ANA_RCO_BG_ENABLE BIT(7)
+#define WCD9335_ANA_BUCK_VOUT_D WCD9335_REG(0x06, 0x005)
+#define WCD9335_ANA_BUCK_VOUT_MASK GENMASK(7, 0)
+#define WCD9335_ANA_BUCK_CTL WCD9335_REG(0x06, 0x006)
+#define WCD9335_ANA_BUCK_CTL_VOUT_D_IREF_MASK BIT(1)
+#define WCD9335_ANA_BUCK_CTL_VOUT_D_IREF_EXT BIT(1)
+#define WCD9335_ANA_BUCK_CTL_VOUT_D_IREF_INT 0
+#define WCD9335_ANA_BUCK_CTL_VOUT_D_VREF_MASK BIT(2)
+#define WCD9335_ANA_BUCK_CTL_VOUT_D_VREF_EXT BIT(2)
+#define WCD9335_ANA_BUCK_CTL_VOUT_D_VREF_INT 0
+#define WCD9335_ANA_BUCK_CTL_RAMP_START_MASK BIT(7)
+#define WCD9335_ANA_BUCK_CTL_RAMP_START_ENABLE BIT(7)
+#define WCD9335_ANA_BUCK_CTL_RAMP_START_DISABLE 0
+#define WCD9335_ANA_RX_SUPPLIES WCD9335_REG(0x06, 0x008)
+#define WCD9335_ANA_RX_BIAS_ENABLE_MASK BIT(0)
+#define WCD9335_ANA_RX_BIAS_ENABLE BIT(0)
+#define WCD9335_ANA_RX_BIAS_DISABLE 0
+#define WCD9335_ANA_HPH WCD9335_REG(0x06, 0x009)
+#define WCD9335_ANA_EAR WCD9335_REG(0x06, 0x00a)
+#define WCD9335_ANA_LO_1_2 WCD9335_REG(0x06, 0x00b)
+#define WCD9335_ANA_LO_3_4 WCD9335_REG(0x06, 0x00c)
+#define WCD9335_ANA_AMIC1 WCD9335_REG(0x06, 0x00e)
+#define WCD9335_ANA_AMIC2 WCD9335_REG(0x06, 0x00f)
+#define WCD9335_ANA_AMIC3 WCD9335_REG(0x06, 0x010)
+#define WCD9335_ANA_AMIC4 WCD9335_REG(0x06, 0x011)
+#define WCD9335_ANA_AMIC5 WCD9335_REG(0x06, 0x012)
+#define WCD9335_ANA_AMIC6 WCD9335_REG(0x06, 0x013)
+#define WCD9335_ANA_MICB1 WCD9335_REG(0x06, 0x022)
+#define WCD9335_ANA_MICB2 WCD9335_REG(0x06, 0x023)
+#define WCD9335_ANA_MICB2_RAMP WCD9335_REG(0x06, 0x024)
+#define WCD9335_ANA_MICB3 WCD9335_REG(0x06, 0x025)
+#define WCD9335_ANA_MICB4 WCD9335_REG(0x06, 0x026)
+#define WCD9335_ANA_VBADC WCD9335_REG(0x06, 0x027)
+#define WCD9335_BIAS_VBG_FINE_ADJ WCD9335_REG(0x06, 0x029)
+#define WCD9335_RCO_CTRL_2 WCD9335_REG(0x06, 0x02f)
+#define WCD9335_SIDO_SIDO_CCL_2 WCD9335_REG(0x06, 0x042)
+#define WCD9335_SIDO_SIDO_CCL_4 WCD9335_REG(0x06, 0x044)
+#define WCD9335_SIDO_SIDO_CCL_8 WCD9335_REG(0x06, 0x048)
+#define WCD9335_SIDO_SIDO_CCL_10 WCD9335_REG(0x06, 0x04a)
+#define WCD9335_SIDO_SIDO_CCL_10_ICHARG_PWR_SEL_C320FF 0x2
+/* Comparator 1 and 2 Bias current at 1P0UA with start pulse width of C320FF */
+#define WCD9335_SIDO_SIDO_CCL_DEF_VALUE 0x6e
+#define WCD9335_SIDO_SIDO_TEST_2 WCD9335_REG(0x06, 0x055)
+#define WCD9335_MBHC_ZDET_RAMP_CTL WCD9335_REG(0x06, 0x05a)
+#define WCD9335_VBADC_IBIAS_FE WCD9335_REG(0x06, 0x05e)
+#define WCD9335_FLYBACK_CTRL_1 WCD9335_REG(0x06, 0x0b1)
+#define WCD9335_RX_BIAS_HPH_PA WCD9335_REG(0x06, 0x0bb)
+#define WCD9335_RX_BIAS_HPH_PA_AMP_5_UA_MASK GENMASK(3, 0)
+#define WCD9335_RX_BIAS_HPH_RDACBUFF_CNP2 WCD9335_REG(0x06, 0x0bc)
+#define WCD9335_RX_BIAS_HPH_RDAC_LDO WCD9335_REG(0x06, 0x0bd)
+#define WCD9335_RX_BIAS_FLYB_BUFF WCD9335_REG(0x06, 0x0c7)
+#define WCD9335_RX_BIAS_FLYB_VPOS_5_UA_MASK GENMASK(3, 0)
+#define WCD9335_RX_BIAS_FLYB_I_0P0_UA 0
+#define WCD9335_RX_BIAS_FLYB_VNEG_5_UA_MASK GENMASK(7, 4)
+#define WCD9335_RX_BIAS_FLYB_MID_RST WCD9335_REG(0x06, 0x0c8)
+#define WCD9335_HPH_CNP_WG_CTL WCD9335_REG(0x06, 0x0cc)
+#define WCD9335_HPH_CNP_WG_CTL_CURR_LDIV_MASK GENMASK(2, 0)
+#define WCD9335_HPH_CNP_WG_CTL_CURR_LDIV_RATIO_500 0x2
+#define WCD9335_HPH_CNP_WG_CTL_CURR_LDIV_RATIO_1000 0x3
+#define WCD9335_HPH_OCP_CTL WCD9335_REG(0x06, 0x0ce)
+#define WCD9335_HPH_AUTO_CHOP WCD9335_REG(0x06, 0x0cf)
+#define WCD9335_HPH_AUTO_CHOP_MASK BIT(5)
+#define WCD9335_HPH_AUTO_CHOP_FORCE_ENABLE BIT(5)
+#define WCD9335_HPH_AUTO_CHOP_ENABLE_BY_CMPDR_GAIN 0
+#define WCD9335_HPH_PA_CTL1 WCD9335_REG(0x06, 0x0d1)
+#define WCD9335_HPH_PA_GM3_IB_SCALE_MASK GENMASK(3, 1)
+#define WCD9335_HPH_PA_CTL2 WCD9335_REG(0x06, 0x0d2)
+#define WCD9335_HPH_PA_CTL2_FORCE_PSRREH_MASK BIT(2)
+#define WCD9335_HPH_PA_CTL2_FORCE_PSRREH_ENABLE BIT(2)
+#define WCD9335_HPH_PA_CTL2_FORCE_PSRREH_DISABLE 0
+#define WCD9335_HPH_PA_CTL2_FORCE_IQCTRL_MASK BIT(3)
+#define WCD9335_HPH_PA_CTL2_FORCE_IQCTRL_ENABLE BIT(3)
+#define WCD9335_HPH_PA_CTL2_FORCE_IQCTRL_DISABLE 0
+#define WCD9335_HPH_PA_CTL2_HPH_PSRR_ENH_MASK BIT(5)
+#define WCD9335_HPH_PA_CTL2_HPH_PSRR_ENABLE BIT(5)
+#define WCD9335_HPH_PA_CTL2_HPH_PSRR_DISABLE 0
+#define WCD9335_HPH_L_EN WCD9335_REG(0x06, 0x0d3)
+#define WCD9335_HPH_CONST_SEL_L_MASK GENMASK(7, 6)
+#define WCD9335_HPH_CONST_SEL_L_BYPASS 0
+#define WCD9335_HPH_CONST_SEL_L_LP_PATH 0x40
+#define WCD9335_HPH_CONST_SEL_L_HQ_PATH 0x80
+#define WCD9335_HPH_PA_GAIN_MASK GENMASK(4, 0)
+#define WCD9335_HPH_GAIN_SRC_SEL_MASK BIT(5)
+#define WCD9335_HPH_GAIN_SRC_SEL_COMPANDER 0
+#define WCD9335_HPH_GAIN_SRC_SEL_REGISTER BIT(5)
+#define WCD9335_HPH_L_TEST WCD9335_REG(0x06, 0x0d4)
+#define WCD9335_HPH_R_EN WCD9335_REG(0x06, 0x0d6)
+#define WCD9335_HPH_R_TEST WCD9335_REG(0x06, 0x0d7)
+#define WCD9335_HPH_R_ATEST WCD9335_REG(0x06, 0x0d8)
+#define WCD9335_HPH_RDAC_LDO_CTL WCD9335_REG(0x06, 0x0db)
+#define WCD9335_HPH_RDAC_N1P65_LD_OUTCTL_MASK GENMASK(2, 0)
+#define WCD9335_HPH_RDAC_N1P65_LD_OUTCTL_V_N1P60 0x1
+#define WCD9335_HPH_RDAC_1P65_LD_OUTCTL_MASK GENMASK(6, 4)
+#define WCD9335_HPH_RDAC_1P65_LD_OUTCTL_V_N1P60 0x10
+#define WCD9335_HPH_REFBUFF_LP_CTL WCD9335_REG(0x06, 0x0de)
+#define WCD9335_HPH_L_DAC_CTL WCD9335_REG(0x06, 0x0df)
+#define WCD9335_HPH_DAC_LDO_POWERMODE_MASK BIT(0)
+#define WCD9335_HPH_DAC_LDO_POWERMODE_LOWPOWER 0
+#define WCD9335_HPH_DAC_LDO_POWERMODE_UHQA BIT(0)
+#define WCD9335_HPH_DAC_LDO_UHQA_OV_MASK BIT(1)
+#define WCD9335_HPH_DAC_LDO_UHQA_OV_ENABLE BIT(1)
+#define WCD9335_HPH_DAC_LDO_UHQA_OV_DISABLE 0
+
+#define WCD9335_EAR_CMBUFF WCD9335_REG(0x06, 0x0e2)
+#define WCD9335_DIFF_LO_LO2_COMPANDER WCD9335_REG(0x06, 0x0ea)
+#define WCD9335_DIFF_LO_LO1_COMPANDER WCD9335_REG(0x06, 0x0eb)
+#define WCD9335_DIFF_LO_COM_SWCAP_REFBUF_FREQ WCD9335_REG(0x06, 0x0f1)
+#define WCD9335_DIFF_LO_COM_PA_FREQ WCD9335_REG(0x06, 0x0f2)
+#define WCD9335_SE_LO_LO3_GAIN WCD9335_REG(0x06, 0x0f8)
+#define WCD9335_SE_LO_LO3_CTRL WCD9335_REG(0x06, 0x0f9)
+#define WCD9335_SE_LO_LO4_GAIN WCD9335_REG(0x06, 0x0fa)
+
+/* Page-10 Registers */
+#define WCD9335_CDC_TX0_TX_PATH_CTL WCD9335_REG(0x0a, 0x031)
+#define WCD9335_CDC_TX_PATH_CTL_PCM_RATE_MASK GENMASK(3, 0)
+#define WCD9335_CDC_TX_PATH_CTL(dec) WCD9335_REG(0xa, (0x31 + dec * 0x10))
+#define WCD9335_CDC_TX0_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x032)
+#define WCD9335_CDC_TX_ADC_AMIC_DMIC_SEL_MASK BIT(7)
+#define WCD9335_CDC_TX_ADC_DMIC_SEL BIT(7)
+#define WCD9335_CDC_TX_ADC_AMIC_SEL 0
+#define WCD9335_CDC_TX0_TX_VOL_CTL WCD9335_REG(0x0a, 0x034)
+#define WCD9335_CDC_TX0_TX_PATH_SEC2 WCD9335_REG(0x0a, 0x039)
+#define WCD9335_CDC_TX0_TX_PATH_SEC7 WCD9335_REG(0x0a, 0x03e)
+#define WCD9335_CDC_TX1_TX_PATH_CTL WCD9335_REG(0x0a, 0x041)
+#define WCD9335_CDC_TX1_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x042)
+#define WCD9335_CDC_TX2_TX_PATH_CTL WCD9335_REG(0x0a, 0x051)
+#define WCD9335_CDC_TX2_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x052)
+#define WCD9335_CDC_TX2_TX_VOL_CTL WCD9335_REG(0x0a, 0x054)
+#define WCD9335_CDC_TX3_TX_PATH_CTL WCD9335_REG(0x0a, 0x061)
+#define WCD9335_CDC_TX3_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x062)
+#define WCD9335_CDC_TX3_TX_VOL_CTL WCD9335_REG(0x0a, 0x064)
+#define WCD9335_CDC_TX4_TX_PATH_CTL WCD9335_REG(0x0a, 0x071)
+#define WCD9335_CDC_TX4_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x072)
+#define WCD9335_CDC_TX4_TX_VOL_CTL WCD9335_REG(0x0a, 0x074)
+#define WCD9335_CDC_TX5_TX_PATH_CTL WCD9335_REG(0x0a, 0x081)
+#define WCD9335_CDC_TX5_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x082)
+#define WCD9335_CDC_TX5_TX_VOL_CTL WCD9335_REG(0x0a, 0x084)
+#define WCD9335_CDC_TX6_TX_PATH_CTL WCD9335_REG(0x0a, 0x091)
+#define WCD9335_CDC_TX6_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x092)
+#define WCD9335_CDC_TX6_TX_VOL_CTL WCD9335_REG(0x0a, 0x094)
+#define WCD9335_CDC_TX7_TX_PATH_CTL WCD9335_REG(0x0a, 0x0a1)
+#define WCD9335_CDC_TX7_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x0a2)
+#define WCD9335_CDC_TX7_TX_VOL_CTL WCD9335_REG(0x0a, 0x0a4)
+#define WCD9335_CDC_TX8_TX_PATH_CTL WCD9335_REG(0x0a, 0x0b1)
+#define WCD9335_CDC_TX8_TX_PATH_CFG0 WCD9335_REG(0x0a, 0x0b2)
+#define WCD9335_CDC_TX8_TX_VOL_CTL WCD9335_REG(0x0a, 0x0b4)
+#define WCD9335_CDC_TX9_SPKR_PROT_PATH_CFG0 WCD9335_REG(0x0a, 0x0c3)
+#define WCD9335_CDC_TX10_SPKR_PROT_PATH_CFG0 WCD9335_REG(0x0a, 0x0c7)
+#define WCD9335_CDC_TX11_SPKR_PROT_PATH_CFG0 WCD9335_REG(0x0a, 0x0cb)
+#define WCD9335_CDC_TX12_SPKR_PROT_PATH_CFG0 WCD9335_REG(0x0a, 0x0cf)
+
+/* Page-11 Registers */
+#define WCD9335_PAGE11_PAGE_REGISTER WCD9335_REG(0x0b, 0x000)
+#define WCD9335_CDC_COMPANDER1_CTL0 WCD9335_REG(0x0b, 0x001)
+#define WCD9335_CDC_COMPANDER1_CTL(c) WCD9335_REG(0x0b, (0x001 + c * 0x8))
+#define WCD9335_CDC_COMPANDER_CLK_EN_MASK BIT(0)
+#define WCD9335_CDC_COMPANDER_CLK_ENABLE BIT(0)
+#define WCD9335_CDC_COMPANDER_CLK_DISABLE 0
+#define WCD9335_CDC_COMPANDER_SOFT_RST_MASK BIT(1)
+#define WCD9335_CDC_COMPANDER_SOFT_RST_ENABLE BIT(1)
+#define WCD9335_CDC_COMPANDER_SOFT_RST_DISABLE 0
+#define WCD9335_CDC_COMPANDER_HALT_MASK BIT(2)
+#define WCD9335_CDC_COMPANDER_HALT BIT(2)
+#define WCD9335_CDC_COMPANDER_NOHALT 0
+#define WCD9335_CDC_COMPANDER7_CTL3 WCD9335_REG(0x0b, 0x034)
+#define WCD9335_CDC_COMPANDER7_CTL7 WCD9335_REG(0x0b, 0x038)
+#define WCD9335_CDC_COMPANDER8_CTL3 WCD9335_REG(0x0b, 0x03c)
+#define WCD9335_CDC_COMPANDER8_CTL7 WCD9335_REG(0x0b, 0x040)
+#define WCD9335_CDC_RX0_RX_PATH_CTL WCD9335_REG(0x0b, 0x041)
+#define WCD9335_CDC_RX_PGA_MUTE_EN_MASK BIT(4)
+#define WCD9335_CDC_RX_PGA_MUTE_ENABLE BIT(4)
+#define WCD9335_CDC_RX_PGA_MUTE_DISABLE 0
+#define WCD9335_CDC_RX_CLK_EN_MASK BIT(5)
+#define WCD9335_CDC_RX_CLK_ENABLE BIT(5)
+#define WCD9335_CDC_RX_CLK_DISABLE 0
+#define WCD9335_CDC_RX_RESET_MASK BIT(6)
+#define WCD9335_CDC_RX_RESET_ENABLE BIT(6)
+#define WCD9335_CDC_RX_RESET_DISABLE 0
+#define WCD9335_CDC_RX_PATH_CTL(rx) WCD9335_REG(0x0b, (0x041 + rx * 0x14))
+#define WCD9335_CDC_RX0_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x042)
+#define WCD9335_CDC_RX0_RX_PATH_CFG1 WCD9335_REG(0x0b, 0x043)
+#define WCD9335_CDC_RX0_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x044)
+#define WCD9335_CDC_RX0_RX_VOL_CTL WCD9335_REG(0x0b, 0x045)
+#define WCD9335_CDC_RX0_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x046)
+#define WCD9335_CDC_MIX_PCM_RATE_MASK GENMASK(3, 0)
+#define WCD9335_CDC_RX_PATH_MIX_CTL(rx) WCD9335_REG(0x0b, (0x46 + rx * 0x14))
+#define WCD9335_CDC_RX0_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x047)
+#define WCD9335_CDC_RX0_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x048)
+#define WCD9335_CDC_RX0_RX_PATH_SEC0 WCD9335_REG(0x0b, 0x049)
+#define WCD9335_CDC_RX0_RX_PATH_SEC7 WCD9335_REG(0x0b, 0x050)
+#define WCD9335_CDC_RX0_RX_PATH_MIX_SEC0 WCD9335_REG(0x0b, 0x051)
+#define WCD9335_CDC_RX1_RX_PATH_CTL WCD9335_REG(0x0b, 0x055)
+#define WCD9335_CDC_RX1_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x056)
+#define WCD9335_CDC_RX1_RX_PATH_CFG(c) WCD9335_REG(0x0b, (0x056 + c * 0x14))
+#define WCD9335_CDC_RX_PATH_CFG_CMP_EN_MASK BIT(1)
+#define WCD9335_CDC_RX_PATH_CFG_CMP_ENABLE BIT(1)
+#define WCD9335_CDC_RX_PATH_CFG_CMP_DISABLE 0
+#define WCD9335_CDC_RX_PATH_CFG_HD2_EN_MASK BIT(2)
+#define WCD9335_CDC_RX_PATH_CFG_HD2_ENABLE BIT(2)
+#define WCD9335_CDC_RX_PATH_CFG_HD2_DISABLE 0
+#define WCD9335_CDC_RX_PATH_CFG0_DLY_ZN_EN_MASK BIT(3)
+#define WCD9335_CDC_RX_PATH_CFG0_DLY_ZN_EN BIT(3)
+#define WCD9335_CDC_RX_PATH_CFG0_DLY_ZN_DISABLE 0
+#define WCD9335_CDC_RX1_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x058)
+#define WCD9335_CDC_RX1_RX_VOL_CTL WCD9335_REG(0x0b, 0x059)
+#define WCD9335_CDC_RX1_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x05a)
+#define WCD9335_CDC_RX1_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x05b)
+#define WCD9335_CDC_RX1_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x05c)
+#define WCD9335_CDC_RX1_RX_PATH_SEC0 WCD9335_REG(0x0b, 0x05d)
+#define WCD9335_CDC_RX1_RX_PATH_SEC3 WCD9335_REG(0x0b, 0x060)
+#define WCD9335_CDC_RX_PATH_SEC_HD2_SCALE_MASK GENMASK(1, 0)
+#define WCD9335_CDC_RX_PATH_SEC_HD2_SCALE_2 0x1
+#define WCD9335_CDC_RX_PATH_SEC_HD2_SCALE_1 0
+#define WCD9335_CDC_RX_PATH_SEC_HD2_ALPHA_MASK GENMASK(5, 2)
+#define WCD9335_CDC_RX_PATH_SEC_HD2_ALPHA_0P2500 0x10
+#define WCD9335_CDC_RX_PATH_SEC_HD2_ALPHA_0P0000 0
+#define WCD9335_CDC_RX2_RX_PATH_CTL WCD9335_REG(0x0b, 0x069)
+#define WCD9335_CDC_RX2_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x06a)
+#define WCD9335_CDC_RX2_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x06c)
+#define WCD9335_CDC_RX2_RX_VOL_CTL WCD9335_REG(0x0b, 0x06d)
+#define WCD9335_CDC_RX2_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x06e)
+#define WCD9335_CDC_RX2_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x06f)
+#define WCD9335_CDC_RX2_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x070)
+#define WCD9335_CDC_RX2_RX_PATH_SEC0 WCD9335_REG(0x0b, 0x071)
+#define WCD9335_CDC_RX_PATH_DEM_INP_SEL_MASK GENMASK(1, 0)
+#define WCD9335_CDC_RX2_RX_PATH_SEC3 WCD9335_REG(0x0b, 0x074)
+#define WCD9335_CDC_RX3_RX_PATH_CTL WCD9335_REG(0x0b, 0x07d)
+#define WCD9335_CDC_RX3_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x07e)
+#define WCD9335_CDC_RX3_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x080)
+#define WCD9335_CDC_RX3_RX_VOL_CTL WCD9335_REG(0x0b, 0x081)
+#define WCD9335_CDC_RX3_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x082)
+#define WCD9335_CDC_RX3_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x083)
+#define WCD9335_CDC_RX3_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x084)
+#define WCD9335_CDC_RX4_RX_PATH_CTL WCD9335_REG(0x0b, 0x091)
+#define WCD9335_CDC_RX4_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x092)
+#define WCD9335_CDC_RX4_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x094)
+#define WCD9335_CDC_RX4_RX_VOL_CTL WCD9335_REG(0x0b, 0x095)
+#define WCD9335_CDC_RX4_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x096)
+#define WCD9335_CDC_RX4_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x097)
+#define WCD9335_CDC_RX4_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x098)
+#define WCD9335_CDC_RX5_RX_PATH_CTL WCD9335_REG(0x0b, 0x0a5)
+#define WCD9335_CDC_RX5_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0a6)
+#define WCD9335_CDC_RX5_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x0a8)
+#define WCD9335_CDC_RX5_RX_VOL_CTL WCD9335_REG(0x0b, 0x0a9)
+#define WCD9335_CDC_RX5_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x0aa)
+#define WCD9335_CDC_RX5_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x0ab)
+#define WCD9335_CDC_RX5_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x0ac)
+#define WCD9335_CDC_RX6_RX_PATH_CTL WCD9335_REG(0x0b, 0x0b9)
+#define WCD9335_CDC_RX6_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0ba)
+#define WCD9335_CDC_RX6_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x0bc)
+#define WCD9335_CDC_RX6_RX_VOL_CTL WCD9335_REG(0x0b, 0x0bd)
+#define WCD9335_CDC_RX6_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x0be)
+#define WCD9335_CDC_RX6_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x0bf)
+#define WCD9335_CDC_RX6_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x0c0)
+#define WCD9335_CDC_RX7_RX_PATH_CTL WCD9335_REG(0x0b, 0x0cd)
+#define WCD9335_CDC_RX7_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0ce)
+#define WCD9335_CDC_RX7_RX_PATH_CFG1 WCD9335_REG(0x0b, 0x0cf)
+#define WCD9335_CDC_RX7_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x0d0)
+#define WCD9335_CDC_RX7_RX_VOL_CTL WCD9335_REG(0x0b, 0x0d1)
+#define WCD9335_CDC_RX7_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x0d2)
+#define WCD9335_CDC_RX7_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x0d3)
+#define WCD9335_CDC_RX7_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x0d4)
+#define WCD9335_CDC_RX8_RX_PATH_CTL WCD9335_REG(0x0b, 0x0e1)
+#define WCD9335_CDC_RX8_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0e2)
+#define WCD9335_CDC_RX8_RX_PATH_CFG1 WCD9335_REG(0x0b, 0x0e3)
+#define WCD9335_CDC_RX8_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x0e4)
+#define WCD9335_CDC_RX8_RX_VOL_CTL WCD9335_REG(0x0b, 0x0e5)
+#define WCD9335_CDC_RX8_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x0e6)
+#define WCD9335_CDC_RX8_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x0e7)
+#define WCD9335_CDC_RX8_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x0e8)
+
+/* Page-12 Registers */
+#define WCD9335_PAGE12_PAGE_REGISTER WCD9335_REG(0x0c, 0x000)
+#define WCD9335_CDC_CLSH_K2_MSB WCD9335_REG(0x0c, 0x00a)
+#define WCD9335_CDC_CLSH_K2_LSB WCD9335_REG(0x0c, 0x00b)
+#define WCD9335_CDC_BOOST0_BOOST_CTL WCD9335_REG(0x0c, 0x01a)
+#define WCD9335_CDC_BOOST0_BOOST_CFG1 WCD9335_REG(0x0c, 0x01b)
+#define WCD9335_CDC_BOOST0_BOOST_CFG2 WCD9335_REG(0x0c, 0x01c)
+#define WCD9335_CDC_BOOST1_BOOST_CTL WCD9335_REG(0x0c, 0x022)
+#define WCD9335_CDC_BOOST1_BOOST_CFG1 WCD9335_REG(0x0c, 0x023)
+#define WCD9335_CDC_BOOST1_BOOST_CFG2 WCD9335_REG(0x0c, 0x024)
+
+/* Page-13 Registers */
+#define WCD9335_PAGE13_PAGE_REGISTER WCD9335_REG(0x0d, 0x000)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT0_CFG0 WCD9335_REG(0x0d, 0x001)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT_CFG0(i) WCD9335_REG(0xd, (0x1 + i * 0x2))
+#define WCD9335_CDC_RX_INP_MUX_RX_INT0_CFG1 WCD9335_REG(0xd, 0x002)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT_SEL_MASK GENMASK(3, 0)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT_CFG1(i) WCD9335_REG(0xd, (0x2 + i * 0x2))
+
+#define WCD9335_CDC_RX_INP_MUX_RX_INT1_CFG0 WCD9335_REG(0x0d, 0x003)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT1_CFG1 WCD9335_REG(0x0d, 0x004)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT2_CFG0 WCD9335_REG(0x0d, 0x005)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT2_CFG1 WCD9335_REG(0x0d, 0x006)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT3_CFG0 WCD9335_REG(0x0d, 0x007)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT3_CFG1 WCD9335_REG(0x0d, 0x008)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT4_CFG0 WCD9335_REG(0x0d, 0x009)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT4_CFG1 WCD9335_REG(0x0d, 0x00a)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT5_CFG0 WCD9335_REG(0x0d, 0x00b)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT5_CFG1 WCD9335_REG(0x0d, 0x00c)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT6_CFG0 WCD9335_REG(0x0d, 0x00d)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT6_CFG1 WCD9335_REG(0x0d, 0x00e)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT7_CFG0 WCD9335_REG(0x0d, 0x00f)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT7_CFG1 WCD9335_REG(0x0d, 0x010)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT8_CFG0 WCD9335_REG(0x0d, 0x011)
+#define WCD9335_CDC_RX_INP_MUX_RX_INT8_CFG1 WCD9335_REG(0x0d, 0x012)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX0_CFG0 WCD9335_REG(0x0d, 0x01d)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX0_CFG1 WCD9335_REG(0x0d, 0x01e)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX1_CFG0 WCD9335_REG(0x0d, 0x01f)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX1_CFG1 WCD9335_REG(0x0d, 0x020)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX2_CFG0 WCD9335_REG(0x0d, 0x021)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX2_CFG1 WCD9335_REG(0x0d, 0x022)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX3_CFG0 WCD9335_REG(0x0d, 0x023)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX3_CFG1 WCD9335_REG(0x0d, 0x024)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX4_CFG0 WCD9335_REG(0x0d, 0x025)
+#define WCD9335_CDC_TX_INP_MUX_SEL_AMIC 0x1
+#define WCD9335_CDC_TX_INP_MUX_SEL_DMIC 0
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX5_CFG0 WCD9335_REG(0x0d, 0x026)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX6_CFG0 WCD9335_REG(0x0d, 0x027)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX7_CFG0 WCD9335_REG(0x0d, 0x028)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX8_CFG0 WCD9335_REG(0x0d, 0x029)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX10_CFG0 WCD9335_REG(0x0d, 0x02b)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX11_CFG0 WCD9335_REG(0x0d, 0x02c)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX12_CFG0 WCD9335_REG(0x0d, 0x02d)
+#define WCD9335_CDC_TX_INP_MUX_ADC_MUX13_CFG0 WCD9335_REG(0x0d, 0x02e)
+#define WCD9335_CDC_IF_ROUTER_TX_MUX_CFG0 WCD9335_REG(0x0d, 0x03a)
+#define WCD9335_CDC_IF_ROUTER_TX_MUX_CFG1 WCD9335_REG(0x0d, 0x03b)
+#define WCD9335_CDC_IF_ROUTER_TX_MUX_CFG2 WCD9335_REG(0x0d, 0x03c)
+#define WCD9335_CDC_IF_ROUTER_TX_MUX_CFG3 WCD9335_REG(0x0d, 0x03d)
+#define WCD9335_CDC_CLK_RST_CTRL_MCLK_CONTROL WCD9335_REG(0x0d, 0x041)
+#define WCD9335_CDC_CLK_RST_CTRL_MCLK_EN_MASK BIT(0)
+#define WCD9335_CDC_CLK_RST_CTRL_MCLK_ENABLE BIT(0)
+#define WCD9335_CDC_CLK_RST_CTRL_MCLK_DISABLE 0
+#define WCD9335_CDC_CLK_RST_CTRL_FS_CNT_CONTROL WCD9335_REG(0x0d, 0x042)
+#define WCD9335_CDC_CLK_RST_CTRL_FS_CNT_EN_MASK BIT(0)
+#define WCD9335_CDC_CLK_RST_CTRL_FS_CNT_ENABLE BIT(0)
+#define WCD9335_CDC_CLK_RST_CTRL_FS_CNT_DISABLE 0
+#define WCD9335_CDC_TOP_TOP_CFG1 WCD9335_REG(0x0d, 0x082)
+#define WCD9335_MAX_REGISTER WCD9335_REG(0x80, 0x0FF)
+
+/* SLIMBUS Slave Registers */
+#define WCD9335_SLIM_PGD_PORT_INT_EN0 WCD9335_REG(0, 0x30)
+#define WCD9335_SLIM_PGD_PORT_INT_STATUS_RX_0 WCD9335_REG(0, 0x34)
+#define WCD9335_SLIM_PGD_PORT_INT_STATUS_RX_1 WCD9335_REG(0, 0x35)
+#define WCD9335_SLIM_PGD_PORT_INT_STATUS_TX_0 WCD9335_REG(0, 0x36)
+#define WCD9335_SLIM_PGD_PORT_INT_STATUS_TX_1 WCD9335_REG(0, 0x37)
+#define WCD9335_SLIM_PGD_PORT_INT_CLR_RX_0 WCD9335_REG(0, 0x38)
+#define WCD9335_SLIM_PGD_PORT_INT_CLR_RX_1 WCD9335_REG(0, 0x39)
+#define WCD9335_SLIM_PGD_PORT_INT_CLR_TX_0 WCD9335_REG(0, 0x3A)
+#define WCD9335_SLIM_PGD_PORT_INT_CLR_TX_1 WCD9335_REG(0, 0x3B)
+#define WCD9335_SLIM_PGD_PORT_INT_RX_SOURCE0 WCD9335_REG(0, 0x60)
+#define WCD9335_SLIM_PGD_PORT_INT_TX_SOURCE0 WCD9335_REG(0, 0x70)
+#define WCD9335_SLIM_PGD_RX_PORT_CFG(p) WCD9335_REG(0, (0x30 + p))
+#define WCD9335_SLIM_PGD_PORT_CFG(p) WCD9335_REG(0, (0x40 + p))
+#define WCD9335_SLIM_PGD_TX_PORT_CFG(p) WCD9335_REG(0, (0x50 + p))
+#define WCD9335_SLIM_PGD_PORT_INT_SRC(p) WCD9335_REG(0, (0x60 + p))
+#define WCD9335_SLIM_PGD_PORT_INT_STATUS(p) WCD9335_REG(0, (0x80 + p))
+#define WCD9335_SLIM_PGD_TX_PORT_MULTI_CHNL_0(p) WCD9335_REG(0, (0x100 + 4 * p))
+/* ports range from 10-16 */
+#define WCD9335_SLIM_PGD_TX_PORT_MULTI_CHNL_1(p) WCD9335_REG(0, (0x101 + 4 * p))
+#define WCD9335_SLIM_PGD_RX_PORT_MULTI_CHNL_0(p) WCD9335_REG(0, (0x140 + 4 * p))
+
+#endif
diff --git a/include/linux/mfd/wcd9335/wcd9335.h b/include/linux/mfd/wcd9335/wcd9335.h
new file mode 100644
index 000000000000..6b7fa6a66d8f
--- /dev/null
+++ b/include/linux/mfd/wcd9335/wcd9335.h
@@ -0,0 +1,40 @@
+#ifndef __WCD9335_H__
+#define __WCD9335_H__
+
+#include <linux/slimbus.h>
+#include <linux/regulator/consumer.h>
+
+#define WCD9335_VERSION_1_0 0
+#define WCD9335_VERSION_1_1 1
+#define WCD9335_VERSION_2_0 2
+#define WCD9335_IS_1_0(ver) \
+ ((ver == WCD9335_VERSION_1_0) ? 1 : 0)
+#define WCD9335_IS_1_1(ver) \
+ ((ver == WCD9335_VERSION_1_1) ? 1 : 0)
+#define WCD9335_IS_2_0(ver) \
+ ((ver == WCD9335_VERSION_2_0) ? 1 : 0)
+
+enum wcd_interface_type {
+ WCD9335_INTERFACE_TYPE_SLIMBUS = 1,
+ WCD9335_INTERFACE_TYPE_I2C,
+};
+
+#define WCD9335_MAX_SUPPLY 5
+
+struct wcd9335 {
+ int version;
+ int intr1;
+ int reset_gpio;
+ enum wcd_interface_type intf_type;
+ struct device *dev;
+ struct clk *mclk;
+ struct clk *native_clk;
+ struct slim_device *slim;
+ struct slim_device *slim_ifd;
+ struct regmap *regmap;
+ struct regmap *ifd_regmap;
+ struct regmap_irq_chip_data *irq_data;
+ struct regulator_bulk_data supplies[WCD9335_MAX_SUPPLY];
+};
+
+#endif /* __WCD9335_H__ */
--
2.16.2
^ permalink raw reply related
* [PATCH 04/12] ASoC: dt-bindings: add dt bindings for wcd9335 audio codec
From: Srinivas Kandagatla @ 2018-07-23 15:54 UTC (permalink / raw)
To: lee.jones, robh+dt, broonie
Cc: mark.rutland, lgirdwood, tiwai, bgoswami, devicetree,
linux-kernel, vkoul, alsa-devel, Srinivas Kandagatla
In-Reply-To: <20180723155410.9494-1-srinivas.kandagatla@linaro.org>
This patch adds bindings for wcd9335 audio codec which can support both SLIMbus
and I2S/I2C interface.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../devicetree/bindings/sound/qcom,wcd9335.txt | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,wcd9335.txt
diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt b/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt
new file mode 100644
index 000000000000..55fcf7504fe1
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt
@@ -0,0 +1,21 @@
+QCOM WCD9335 Audio Codec
+
+Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC,
+It supports both I2S/I2C and SLIMbus audio interfaces.
+
+- compatible:
+ Usage: required
+ Value type: <stringlist>
+ Definition: "qcom,wcd9335-codec"
+
+- #sound-dai-cells
+ Usage: required
+ Value type: <u32>
+ Definition: Must be 1
+
+= EXAMPLE
+
+codec {
+ compatible = "qcom,wcd9335-codec";
+ #sound-dai-cells = <1>;
+};
--
2.16.2
^ permalink raw reply related
* Re: [PATCH 4.9 00/28] 4.9.115-stable review
From: Greg Kroah-Hartman @ 2018-07-23 15:58 UTC (permalink / raw)
To: Nathan Chancellor
Cc: linux-kernel, torvalds, akpm, linux, shuah, patches,
ben.hutchings, lkft-triage, stable
In-Reply-To: <20180723151209.GB31725@flashbox>
On Mon, Jul 23, 2018 at 08:12:09AM -0700, Nathan Chancellor wrote:
> On Mon, Jul 23, 2018 at 02:25:00PM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.9.115 release.
> > There are 28 patches in this series, all will be posted as a response
> > to this one. If anyone has any issues with these being applied, please
> > let me know.
> >
> > Responses should be made by Wed Jul 25 12:24:13 UTC 2018.
> > Anything received after that time might be too late.
> >
> > The whole patch series can be found in one patch at:
> > https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.9.115-rc1.gz
> > or in the git tree and branch at:
> > git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-4.9.y
> > and the diffstat can be found below.
> >
> > thanks,
> >
> > greg k-h
> >
>
> Merged, compiled with -Werror, and installed onto my OnePlus 6.
>
> No initial issues noticed in dmesg or general usage.
Thanks for testing 2 of these and letting me know.
greg k-h
^ permalink raw reply
* [PATCH 04/12] ASoC: dt-bindings: add dt bindings for wcd9335 audio codec
From: Srinivas Kandagatla @ 2018-07-23 15:54 UTC (permalink / raw)
To: lee.jones, robh+dt, broonie
Cc: mark.rutland, devicetree, alsa-devel, bgoswami, tiwai, lgirdwood,
linux-kernel, vkoul, Srinivas Kandagatla
In-Reply-To: <20180723155410.9494-1-srinivas.kandagatla@linaro.org>
This patch adds bindings for wcd9335 audio codec which can support both SLIMbus
and I2S/I2C interface.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../devicetree/bindings/sound/qcom,wcd9335.txt | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,wcd9335.txt
diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt b/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt
new file mode 100644
index 000000000000..55fcf7504fe1
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt
@@ -0,0 +1,21 @@
+QCOM WCD9335 Audio Codec
+
+Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC,
+It supports both I2S/I2C and SLIMbus audio interfaces.
+
+- compatible:
+ Usage: required
+ Value type: <stringlist>
+ Definition: "qcom,wcd9335-codec"
+
+- #sound-dai-cells
+ Usage: required
+ Value type: <u32>
+ Definition: Must be 1
+
+= EXAMPLE
+
+codec {
+ compatible = "qcom,wcd9335-codec";
+ #sound-dai-cells = <1>;
+};
--
2.16.2
^ permalink raw reply related
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