* Re: Linux 4.18-rc6
From: Martin Schwidefsky @ 2018-07-24 6:18 UTC (permalink / raw)
To: Linus Torvalds; +Cc: Guenter Roeck, David Miller, Linux Kernel Mailing List
In-Reply-To: <CA+55aFw3tRe70mUgV70oi6xBwSLx0h_supRGoNUHgrcSGxUgeg@mail.gmail.com>
On Mon, 23 Jul 2018 16:17:22 -0700
Linus Torvalds <torvalds@linux-foundation.org> wrote:
> On Mon, Jul 23, 2018 at 2:23 PM Guenter Roeck <linux@roeck-us.net> wrote:
> >
> > >
> > > Martin - can we just remove the
> > >
> > > select HAVE_GCC_PLUGINS
> > >
> > > from the s390 Kconfig file (or perhaps add "if BROKEN" or something to
> > > disable it).
> > >
> > > Because if it's not getting fixed, it shouldn't be exposed.
> > >
> > The problem only affects 4.18 - the code has been rearranged in -next.
> > Only, in my builders, I can't disable a flag for individual releases,
> > so I just disabled it completely for s390.
>
> Well, I'm not going to release a 4.18 with a known problem, so in 4.18
> this *will* be disabled if it's not fixed.
>
> The fact that it might be fixed in linux-next is entirely immaterial
> to the release of 4.18.
Ok, if gcc with the plugins and an allmodconfig is considered to be
important enough to warrant a fix, it can be pulled from here:
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux.git for-linus
Martin Schwidefsky (1):
s390: disable gcc plugins
Once that is in I will create another patch to undo this one and place
it after the early boot rework.
--
blue skies,
Martin.
"Reality continues to ruin my life." - Calvin.
^ permalink raw reply
* RE: [PATCH net-next] tls: Fix improper revert in zerocopy_from_iter
From: Vakul Garg @ 2018-07-24 5:13 UTC (permalink / raw)
To: Doron Roberts-Kedes, David S . Miller
Cc: Dave Watson, Matt Mullins, netdev@vger.kernel.org
In-Reply-To: <20180723222000.3397712-1-doronrk@fb.com>
> -----Original Message-----
> From: Doron Roberts-Kedes [mailto:doronrk@fb.com]
> Sent: Tuesday, July 24, 2018 3:50 AM
> To: David S . Miller <davem@davemloft.net>
> Cc: Dave Watson <davejwatson@fb.com>; Vakul Garg
> <vakul.garg@nxp.com>; Matt Mullins <mmullins@fb.com>;
> netdev@vger.kernel.org; Doron Roberts-Kedes <doronrk@fb.com>
> Subject: [PATCH net-next] tls: Fix improper revert in zerocopy_from_iter
>
> The current code is problematic because the iov_iter is reverted and never
> advanced in the non-error case. This patch skips the revert in the non-error
> case. This patch also fixes the amount by which the iov_iter is reverted.
> Currently, iov_iter is reverted by size, which can be greater than the amount
> by which the iter was actually advanced.
> Instead, mimic the tx path which reverts by the difference before and after
> zerocopy_from_iter.
>
> Fixes: 4718799817c5 ("tls: Fix zerocopy_from_iter iov handling")
> Signed-off-by: Doron Roberts-Kedes <doronrk@fb.com>
> ---
> net/tls/tls_sw.c | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/net/tls/tls_sw.c b/net/tls/tls_sw.c index
> 490f2bcc6313..2ea000baebf8 100644
> --- a/net/tls/tls_sw.c
> +++ b/net/tls/tls_sw.c
> @@ -276,7 +276,7 @@ static int zerocopy_from_iter(struct sock *sk, struct
> iov_iter *from,
> int length, int *pages_used,
> unsigned int *size_used,
> struct scatterlist *to, int to_max_pages,
> - bool charge, bool revert)
> + bool charge)
> {
> struct page *pages[MAX_SKB_FRAGS];
>
> @@ -327,8 +327,6 @@ static int zerocopy_from_iter(struct sock *sk, struct
> iov_iter *from,
> out:
> *size_used = size;
> *pages_used = num_elem;
> - if (revert)
> - iov_iter_revert(from, size);
>
> return rc;
> }
> @@ -431,7 +429,7 @@ int tls_sw_sendmsg(struct sock *sk, struct msghdr
> *msg, size_t size)
> &ctx->sg_plaintext_size,
> ctx->sg_plaintext_data,
> ARRAY_SIZE(ctx->sg_plaintext_data),
> - true, false);
> + true);
> if (ret)
> goto fallback_to_reg_send;
>
> @@ -811,6 +809,7 @@ int tls_sw_recvmsg(struct sock *sk,
> likely(!(flags & MSG_PEEK))) {
> struct scatterlist sgin[MAX_SKB_FRAGS + 1];
> int pages = 0;
> + int orig_chunk = chunk;
>
> zc = true;
> sg_init_table(sgin, MAX_SKB_FRAGS + 1);
> @@ -820,9 +819,11 @@ int tls_sw_recvmsg(struct sock *sk,
> err = zerocopy_from_iter(sk, &msg-
> >msg_iter,
> to_copy, &pages,
> &chunk, &sgin[1],
> - MAX_SKB_FRAGS,
> false, true);
> - if (err < 0)
> + MAX_SKB_FRAGS,
> false);
> + if (err < 0) {
> + iov_iter_revert(&msg->msg_iter,
> chunk - orig_chunk);
> goto fallback_to_reg_recv;
> + }
This assumes that msg_iter gets advanced even if zerocopy_from_iter() fails.
It is easier from code readability perspective if functions upon failure do not leave any side effects for the caller to clean-up.
I suggest that iov_iter_revert() should be called from zerocopy_from_iter() itself if it is going to fail.
>
> err = decrypt_skb(sk, skb, sgin);
> for (; pages > 0; pages--)
> --
> 2.17.1
^ permalink raw reply
* [PATCH] i2c: davinci: Avoid zero value of CLKH
From: Sekhar Nori @ 2018-07-24 6:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180723180722.7b46aw56oqxrwxwj@ninjato>
On Monday 23 July 2018 11:37 PM, Wolfram Sang wrote:
> On Fri, Jul 13, 2018 at 05:20:17PM +0200, Alexander Sverdlin wrote:
>> If CLKH is set to 0 I2C clock is not generated at all, so avoid this value
>> and stretch the clock in this case.
>>
>> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
>
> Applied to for-current, thanks!
>
> I did not add stable because Alexander told me this is very likely not
> to be observed on HW out there. But TI people are investigating more.
> I suggest they resend this patch to stable if they see fit. D'accord
> everyone?
Sounds good to me.
Thanks,
Sekhar
^ permalink raw reply
* Re: [PATCH] i2c: davinci: Avoid zero value of CLKH
From: Sekhar Nori @ 2018-07-24 6:17 UTC (permalink / raw)
To: Wolfram Sang, Alexander Sverdlin
Cc: linux-i2c, linux-arm-kernel, Kevin Hilman
In-Reply-To: <20180723180722.7b46aw56oqxrwxwj@ninjato>
On Monday 23 July 2018 11:37 PM, Wolfram Sang wrote:
> On Fri, Jul 13, 2018 at 05:20:17PM +0200, Alexander Sverdlin wrote:
>> If CLKH is set to 0 I2C clock is not generated at all, so avoid this value
>> and stretch the clock in this case.
>>
>> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
>
> Applied to for-current, thanks!
>
> I did not add stable because Alexander told me this is very likely not
> to be observed on HW out there. But TI people are investigating more.
> I suggest they resend this patch to stable if they see fit. D'accord
> everyone?
Sounds good to me.
Thanks,
Sekhar
^ permalink raw reply
* [U-Boot] ext4: massive corruption with ext4write
From: Aaron Williams @ 2018-07-24 6:15 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1567127.EpJHi1tnkl@awilliams-suse>
Hi all,
It looks like after a certain amount of data has been written that all hell
breaks loose with the ext4 filesystem.
In my case, I have the following files on a 64G USB thumb drive with two
partitions, a small FAT partition with the rest of the space dedicated to ext4
created using mkfs.ext4 /dev/sdg2
total 477632
-rwxr-xr-x 1 root root 152777216 Jul 23 18:11 Image
drwx------ 2 root root 16384 Jul 23 18:10 lost+found
-rwxr-xr-x 1 root root 90706976 Dec 31 1969 test.64
-rwxr-xr-x 1 root root 152777216 Dec 31 1969 test.img
-rwxr-xr-x 1 root root 50 Dec 31 1969 test.txt
-rwxr-xr-x 1 root root 1841408 Jul 23 18:12 u-boot-octeon_ebb7304.bin
-rwxr-xr-x 1 root root 90706976 Jul 23 18:11 vmlinux.64
Everything is fine until I wrote the file test.64, which is basically a copy
of vmlinux.64.
The first few files were written using my host Linux system, namely Image, u-
boot-octeon_ebb7304.bin and vmlinux.64.
From within U-Boot I performed the following commands:
# ext4load usb 0:2 $loadaddr Image
# ext4write usb 0:2 $fileaddr /test.img $filesize
# tftpboot $loadaddr test.txt
# ext4write usb 0:2 $fileaddr /test.txt $filesize
# ext4load usb 0:2 $loadaddr vmlinux.64
# ext4write usb 0:2 $fileaddr /test.64 $filesize
Everything is fine on the drive until I write test.64. At this point, I get a
huge list of errors:
# fsck.ext4 -v -n /dev/sdg2
e2fsck 1.42.11 (09-Jul-2014)
Group descriptor 0 has invalid unused inodes count 57374. Fix? no
/dev/sdg2 contains a file system with errors, check forced.
Pass 1: Checking inodes, blocks, and sizes
Deleted inode 130913 has zero dtime. Fix? no
Inode 130915 is in use, but has dtime set. Fix? no
Inode 130915 has imagic flag set. Clear? no
Inode 130915 has a extra size (8223) which is invalid
Fix? no
Inode 130916 is in use, but has dtime set. Fix? no
Inode 130916 has imagic flag set. Clear? no
Inode 130916 has a extra size (8223) which is invalid
Fix? no
...
Illegal block #11 (2435760161) in inode 131070. IGNORED.
Illegal indirect block (4026556192) in inode 131070. IGNORED.
Illegal double indirect block (2433138721) in inode 131070. IGNORED.
Illegal triple indirect block (2434195456) in inode 131070. IGNORED.
Error while iterating over blocks in inode 131070: Illegal triply indirect
block found
and many many more errors.
Note that I am using the very latest ext4 code from the master branch. This
is not a USB problem because I can reproduce this problem with an SD card.
This problem also occurs on two different platforms, one being aarch64 little
endian and the other being MIPS64 big endian. The filesystem code is
identical since the latest code has been backported to our older MIPS
bootloader.
My guess is that all hell is breaking loose when a file spans multiple block
groups.
-Aaron Williams
On Thursday, July 19, 2018 7:35:46 PM PDT Aaron Williams wrote:
>
> Hi all,
>
> I am sometimes seeing issues when using ext4write where fsck later
> complains
that the group descriptor has an invalid number of unused
> inodes. Is this a known problem?
>
> Also, I think the assert(offset == sizeof(*desc)); in
> ext4fs_checksum_update()
is invalid since with ext4 the descriptor is
> larger than the offset. When debugging was enabled I'd always hit this
> assert.
>
> Also, in ext4fs_write, the debug statement should say blocks and not bytes.
>
> -Aaron
>
> --
> Aaron Williams
> Senior Software Engineer
> Cavium, Inc.
> (408) 943-7198 (510) 789-8988 (cell)
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
--
Aaron Williams
Senior Software Engineer
Cavium, Inc.
(408) 943-7198 (510) 789-8988 (cell)
^ permalink raw reply
* Re: [PATCH v4 1/4] x86/boot: Add acpitb.h to help parse acpi tables
From: Chao Fan @ 2018-07-24 6:13 UTC (permalink / raw)
To: Baoquan He
Cc: linux-kernel, x86, hpa, tglx, mingo, keescook, yasu.isimatu,
indou.takao, caoj.fnst, douly.fnst
In-Reply-To: <20180724060257.GE6480@MiWiFi-R3L-srv>
On Tue, Jul 24, 2018 at 02:02:57PM +0800, Baoquan He wrote:
>Hi chao,
>
>On 07/23/18 at 05:29pm, Chao Fan wrote:
>> In order to parse ACPI tables, reuse the head file linux/acpi.h,
>> so that the files in 'compressed' directory can read ACPI table
>> by including this head file.
>>
>> Signed-off-by: Chao Fan <fanc.fnst@cn.fujitsu.com>
>> ---
>> arch/x86/boot/compressed/acpitb.h | 7 +++++++
>> 1 file changed, 7 insertions(+)
>> create mode 100644 arch/x86/boot/compressed/acpitb.h
>>
>> diff --git a/arch/x86/boot/compressed/acpitb.h b/arch/x86/boot/compressed/acpitb.h
>> new file mode 100644
>> index 000000000000..f8ab6e5b3e06
>> --- /dev/null
>> +++ b/arch/x86/boot/compressed/acpitb.h
>> @@ -0,0 +1,7 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +#include <linux/acpi.h>
>> +
>> +#define ACPI_MAX_TABLES 128
>> +
>> +/* Function to get ACPI SRAT table pointer. */
>> +struct acpi_table_header *get_acpi_srat_table(void);
>
>Since acpitb.h includes so few lines of code, not sure if we can move
>them into .c files directly.
Both acpitb.c and kaslr.c in my PATCH will use this head file.
And also eboot.h is also simple, so I put this code alone.
>
>By the way, you might need to rebase this patchset on top of
>tip/x86/boot.
OK, now it is based on master of tip.
Will do it in next version.
Thanks,
Chao Fan
>
>Thanks
>Baoquan
>
>
^ permalink raw reply
* Re: Bypass support in the i40e PMD driver
From: Xing, Beilei @ 2018-07-24 6:14 UTC (permalink / raw)
To: Yigit, Ferruh, EJ Raymond, dev@dpdk.org; +Cc: Zhang, Qi Z, Zhang, Helin
In-Reply-To: <1f580105-4110-703c-07aa-9548b8cc543a@intel.com>
> -----Original Message-----
> From: Yigit, Ferruh
> Sent: Tuesday, July 24, 2018 4:42 AM
> To: EJ Raymond <eraymond00@gmail.com>; dev@dpdk.org
> Cc: Xing, Beilei <beilei.xing@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>;
> Zhang, Helin <helin.zhang@intel.com>
> Subject: Re: [dpdk-dev] Bypass support in the i40e PMD driver
>
> On 7/20/2018 7:39 PM, EJ Raymond wrote:
> > Hi,
> >
> > I'm currently working with the PE310G4BPI71 Bypass card from Silicom,
> > Inc., This board is based on the i40E chip (Intel X710 - Fortville).
> > In DPDK, this card makes use of the i40e PMD driver, and I've noticed
> > that bypass configuration is only supported in the IXGBE PMD driver
> > today. Can anyone say if there'll be support for configuring the
> > various bypass modes and watchdog timer in the librte_pmd_i40e driver in
> the future?
>
> cc'ed i40e maintainers.
>
Sorry I didn't hear anything about i40e bypass related currently.
> >
> > Thanks,
> > EJ
> >
^ permalink raw reply
* [Buildroot] [Bug 11091] BR2_PRIMARY_SITE doesn't work (wget is selected every time as backend)
From: bugzilla at busybox.net @ 2018-07-24 6:15 UTC (permalink / raw)
To: buildroot
In-Reply-To: <bug-11091-163@https.bugs.busybox.net/>
https://bugs.busybox.net/show_bug.cgi?id=11091
t.prueckl at hainzl.at changed:
What |Removed |Added
----------------------------------------------------------------------------
Assignee|unassigned at buildroot.uclibc |yann.morin.1998 at free.fr
|.org |
--
You are receiving this mail because:
You are on the CC list for the bug.
^ permalink raw reply
* [PATCH v4 1/2] powerpc: Detect the presence of big-cores via "ibm,thread-groups"
From: Gautham R. Shenoy @ 2018-07-24 6:14 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Michael Neuling,
Vaidyanathan Srinivasan, Akshay Adiga, Shilpasri G Bhat,
Oliver O'Halloran, Nicholas Piggin, Murilo Opsfelder Araujo
Cc: linuxppc-dev, linux-kernel, Gautham R. Shenoy
In-Reply-To: <1532412848-9826-1-git-send-email-ego@linux.vnet.ibm.com>
From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
On IBM POWER9, the device tree exposes a property array identifed by
"ibm,thread-groups" which will indicate which groups of threads share a
particular set of resources.
As of today we only have one form of grouping identifying the group of
threads in the core that share the L1 cache, translation cache and
instruction data flow.
This patch defines the helper function to parse the contents of
"ibm,thread-groups" and a new structure to contain the parsed output.
The patch also creates the sysfs file named "small_core_siblings" that
returns the physical ids of the threads in the core that share the L1
cache, translation cache and instruction data flow.
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
---
Documentation/ABI/testing/sysfs-devices-system-cpu | 8 ++
arch/powerpc/include/asm/cputhreads.h | 22 +++
arch/powerpc/kernel/setup-common.c | 154 +++++++++++++++++++++
arch/powerpc/kernel/sysfs.c | 35 +++++
4 files changed, 219 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
index 9c5e7732..41adf1d 100644
--- a/Documentation/ABI/testing/sysfs-devices-system-cpu
+++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
@@ -487,3 +487,11 @@ Description: Information about CPU vulnerabilities
"Not affected" CPU is not affected by the vulnerability
"Vulnerable" CPU is affected and no mitigation in effect
"Mitigation: $M" CPU is affected and mitigation $M is in effect
+
+What: /sys/devices/system/cpu/cpu[0-9]+/small_core_siblings
+Date: 24-Jul-2018
+KernelVersion: v4.18.0
+Contact: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
+Description: List of Physical ids of CPUs which share the L1 cache,
+ translation cache and instruction data-flow with this CPU.
+Values: Comma separated list of decimal integers.
diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h
index d71a909..33226d7 100644
--- a/arch/powerpc/include/asm/cputhreads.h
+++ b/arch/powerpc/include/asm/cputhreads.h
@@ -23,11 +23,13 @@
extern int threads_per_core;
extern int threads_per_subcore;
extern int threads_shift;
+extern bool has_big_cores;
extern cpumask_t threads_core_mask;
#else
#define threads_per_core 1
#define threads_per_subcore 1
#define threads_shift 0
+#define has_big_cores 0
#define threads_core_mask (*get_cpu_mask(0))
#endif
@@ -69,12 +71,32 @@ static inline cpumask_t cpu_online_cores_map(void)
return cpu_thread_mask_to_cores(cpu_online_mask);
}
+#define MAX_THREAD_LIST_SIZE 8
+struct thread_groups {
+ unsigned int property;
+ unsigned int nr_groups;
+ unsigned int threads_per_group;
+ unsigned int thread_list[MAX_THREAD_LIST_SIZE];
+};
+
#ifdef CONFIG_SMP
int cpu_core_index_of_thread(int cpu);
int cpu_first_thread_of_core(int core);
+int parse_thread_groups(struct device_node *dn, struct thread_groups *tg);
+int get_cpu_thread_group_start(int cpu, struct thread_groups *tg);
#else
static inline int cpu_core_index_of_thread(int cpu) { return cpu; }
static inline int cpu_first_thread_of_core(int core) { return core; }
+static inline int parse_thread_groups(struct device_node *dn,
+ struct thread_groups *tg)
+{
+ return -ENODATA;
+}
+
+static inline int get_cpu_thread_group_start(int cpu, struct thread_groups *tg)
+{
+ return -1;
+}
#endif
static inline int cpu_thread_in_core(int cpu)
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 40b44bb..989edc1 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -402,10 +402,12 @@ void __init check_for_initrd(void)
#ifdef CONFIG_SMP
int threads_per_core, threads_per_subcore, threads_shift;
+bool has_big_cores;
cpumask_t threads_core_mask;
EXPORT_SYMBOL_GPL(threads_per_core);
EXPORT_SYMBOL_GPL(threads_per_subcore);
EXPORT_SYMBOL_GPL(threads_shift);
+EXPORT_SYMBOL_GPL(has_big_cores);
EXPORT_SYMBOL_GPL(threads_core_mask);
static void __init cpu_init_thread_core_maps(int tpc)
@@ -433,6 +435,152 @@ static void __init cpu_init_thread_core_maps(int tpc)
u32 *cpu_to_phys_id = NULL;
+/*
+ * parse_thread_groups: Parses the "ibm,thread-groups" device tree
+ * property for the CPU device node @dn and stores
+ * the parsed output in the thread_groups
+ * structure @tg.
+ *
+ * @dn: The device node of the CPU device.
+ * @tg: Pointer to a thread group structure into which the parsed
+ * output of "ibm,thread-groups" is stored.
+ *
+ * ibm,thread-groups[0..N-1] array defines which group of threads in
+ * the CPU-device node can be grouped together based on the property.
+ *
+ * ibm,thread-groups[0] tells us the property based on which the
+ * threads are being grouped together. If this value is 1, it implies
+ * that the threads in the same group share L1, translation cache.
+ *
+ * ibm,thread-groups[1] tells us how many such thread groups exist.
+ *
+ * ibm,thread-groups[2] tells us the number of threads in each such
+ * group.
+ *
+ * ibm,thread-groups[3..N-1] is the list of threads identified by
+ * "ibm,ppc-interrupt-server#s" arranged as per their membership in
+ * the grouping.
+ *
+ * Example: If ibm,thread-groups = [1,2,4,5,6,7,8,9,10,11,12] it
+ * implies that there are 2 groups of 4 threads each, where each group
+ * of threads share L1, translation cache.
+ *
+ * The "ibm,ppc-interrupt-server#s" of the first group is {5,6,7,8}
+ * and the "ibm,ppc-interrupt-server#s" of the second group is {9, 10,
+ * 11, 12} structure
+ *
+ * Returns 0 on success, -EINVAL if the property does not exist,
+ * -ENODATA if property does not have a value, and -EOVERFLOW if the
+ * property data isn't large enough.
+ */
+int parse_thread_groups(struct device_node *dn,
+ struct thread_groups *tg)
+{
+ unsigned int nr_groups, threads_per_group, property;
+ int i;
+ u32 thread_group_array[3 + MAX_THREAD_LIST_SIZE];
+ u32 *thread_list;
+ size_t total_threads;
+ int ret;
+
+ ret = of_property_read_u32_array(dn, "ibm,thread-groups",
+ thread_group_array, 3);
+
+ if (ret)
+ goto out_err;
+
+ property = thread_group_array[0];
+ nr_groups = thread_group_array[1];
+ threads_per_group = thread_group_array[2];
+ total_threads = nr_groups * threads_per_group;
+
+ ret = of_property_read_u32_array(dn, "ibm,thread-groups",
+ thread_group_array,
+ 3 + total_threads);
+ if (ret)
+ goto out_err;
+
+ thread_list = &thread_group_array[3];
+
+ for (i = 0 ; i < total_threads; i++)
+ tg->thread_list[i] = thread_list[i];
+
+ tg->property = property;
+ tg->nr_groups = nr_groups;
+ tg->threads_per_group = threads_per_group;
+
+ return 0;
+out_err:
+ tg->property = 0;
+ tg->nr_groups = 0;
+ tg->threads_per_group = 0;
+ return ret;
+}
+
+/*
+ * dt_has_big_core : Parses the device tree property
+ * "ibm,thread-groups" for device node pointed by @dn
+ * and stores the parsed output in the structure
+ * pointed to by @tg. Then checks if the output in
+ * @tg corresponds to a big-core.
+ *
+ * @dn: Device node pointer of the CPU node being checked for a
+ * big-core.
+ * @tg: Pointer to thread_groups struct in which parsed output of
+ * "ibm,thread-groups" is recorded.
+ *
+ * Returns true if the @dn points to a big-core.
+ * Returns false if there is an error in parsing "ibm,thread-groups"
+ * or the parsed output doesn't correspond to a big-core.
+ */
+static inline bool dt_has_big_core(struct device_node *dn,
+ struct thread_groups *tg)
+{
+ if (parse_thread_groups(dn, tg))
+ return false;
+
+ if (tg->property != 1)
+ return false;
+
+ if (tg->nr_groups < 1)
+ return false;
+
+ return true;
+}
+
+/*
+ * get_cpu_thread_group_start : Searches the thread group in tg->thread_list
+ * that @cpu belongs to.
+ *
+ * @cpu : The logical CPU whose thread group is being searched.
+ * @tg : The thread-group structure of the CPU node which @cpu belongs
+ * to.
+ *
+ * Returns the index to tg->thread_list that points to the the start
+ * of the thread_group that @cpu belongs to.
+ *
+ * Returns -1 if cpu doesn't belong to any of the groups pointed to by
+ * tg->thread_list.
+ */
+int get_cpu_thread_group_start(int cpu, struct thread_groups *tg)
+{
+ int hw_cpu_id = get_hard_smp_processor_id(cpu);
+ int i, j;
+
+ for (i = 0; i < tg->nr_groups; i++) {
+ int group_start = i * tg->threads_per_group;
+
+ for (j = 0; j < tg->threads_per_group; j++) {
+ int idx = group_start + j;
+
+ if (tg->thread_list[idx] == hw_cpu_id)
+ return group_start;
+ }
+ }
+
+ return -1;
+}
+
/**
* setup_cpu_maps - initialize the following cpu maps:
* cpu_possible_mask
@@ -457,6 +605,7 @@ void __init smp_setup_cpu_maps(void)
int cpu = 0;
int nthreads = 1;
+ has_big_cores = true;
DBG("smp_setup_cpu_maps()\n");
cpu_to_phys_id = __va(memblock_alloc(nr_cpu_ids * sizeof(u32),
@@ -467,6 +616,7 @@ void __init smp_setup_cpu_maps(void)
const __be32 *intserv;
__be32 cpu_be;
int j, len;
+ struct thread_groups tg;
DBG(" * %pOF...\n", dn);
@@ -505,6 +655,10 @@ void __init smp_setup_cpu_maps(void)
cpu++;
}
+ if (has_big_cores && !dt_has_big_core(dn, &tg)) {
+ has_big_cores = false;
+ }
+
if (cpu >= nr_cpu_ids) {
of_node_put(dn);
break;
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 755dc98..f5717de 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -18,6 +18,7 @@
#include <asm/smp.h>
#include <asm/pmc.h>
#include <asm/firmware.h>
+#include <asm/cputhreads.h>
#include "cacheinfo.h"
#include "setup.h"
@@ -1025,6 +1026,33 @@ static ssize_t show_physical_id(struct device *dev,
}
static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
+static ssize_t show_small_core_siblings(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct cpu *cpu = container_of(dev, struct cpu, dev);
+ struct device_node *dn = of_get_cpu_node(cpu->dev.id, NULL);
+ struct thread_groups tg;
+ int i, j;
+ ssize_t ret = 0;
+
+ if (parse_thread_groups(dn, &tg))
+ return -ENODATA;
+
+ i = get_cpu_thread_group_start(cpu->dev.id, &tg);
+
+ if (i == -1)
+ return -ENODATA;
+
+ for (j = 0; j < tg.threads_per_group - 1; j++)
+ ret += sprintf(buf + ret, "%d,", tg.thread_list[i + j]);
+
+ ret += sprintf(buf + ret, "%d\n", tg.thread_list[i + j]);
+
+ return ret;
+}
+static DEVICE_ATTR(small_core_siblings, 0444, show_small_core_siblings, NULL);
+
static int __init topology_init(void)
{
int cpu, r;
@@ -1048,6 +1076,13 @@ static int __init topology_init(void)
register_cpu(c, cpu);
device_create_file(&c->dev, &dev_attr_physical_id);
+
+ if (has_big_cores) {
+ const struct device_attribute *attr =
+ &dev_attr_small_core_siblings;
+
+ device_create_file(&c->dev, attr);
+ }
}
}
r = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powerpc/topology:online",
--
1.9.4
^ permalink raw reply related
* [PATCH v4 1/2] powerpc: Detect the presence of big-cores via "ibm, thread-groups"
From: Gautham R. Shenoy @ 2018-07-24 6:14 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Michael Neuling,
Vaidyanathan Srinivasan, Akshay Adiga, Shilpasri G Bhat,
Oliver O'Halloran, Nicholas Piggin, Murilo Opsfelder Araujo
Cc: linuxppc-dev, linux-kernel, Gautham R. Shenoy
In-Reply-To: <1532412848-9826-1-git-send-email-ego@linux.vnet.ibm.com>
From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
On IBM POWER9, the device tree exposes a property array identifed by
"ibm,thread-groups" which will indicate which groups of threads share a
particular set of resources.
As of today we only have one form of grouping identifying the group of
threads in the core that share the L1 cache, translation cache and
instruction data flow.
This patch defines the helper function to parse the contents of
"ibm,thread-groups" and a new structure to contain the parsed output.
The patch also creates the sysfs file named "small_core_siblings" that
returns the physical ids of the threads in the core that share the L1
cache, translation cache and instruction data flow.
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
---
Documentation/ABI/testing/sysfs-devices-system-cpu | 8 ++
arch/powerpc/include/asm/cputhreads.h | 22 +++
arch/powerpc/kernel/setup-common.c | 154 +++++++++++++++++++++
arch/powerpc/kernel/sysfs.c | 35 +++++
4 files changed, 219 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
index 9c5e7732..41adf1d 100644
--- a/Documentation/ABI/testing/sysfs-devices-system-cpu
+++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
@@ -487,3 +487,11 @@ Description: Information about CPU vulnerabilities
"Not affected" CPU is not affected by the vulnerability
"Vulnerable" CPU is affected and no mitigation in effect
"Mitigation: $M" CPU is affected and mitigation $M is in effect
+
+What: /sys/devices/system/cpu/cpu[0-9]+/small_core_siblings
+Date: 24-Jul-2018
+KernelVersion: v4.18.0
+Contact: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
+Description: List of Physical ids of CPUs which share the L1 cache,
+ translation cache and instruction data-flow with this CPU.
+Values: Comma separated list of decimal integers.
diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h
index d71a909..33226d7 100644
--- a/arch/powerpc/include/asm/cputhreads.h
+++ b/arch/powerpc/include/asm/cputhreads.h
@@ -23,11 +23,13 @@
extern int threads_per_core;
extern int threads_per_subcore;
extern int threads_shift;
+extern bool has_big_cores;
extern cpumask_t threads_core_mask;
#else
#define threads_per_core 1
#define threads_per_subcore 1
#define threads_shift 0
+#define has_big_cores 0
#define threads_core_mask (*get_cpu_mask(0))
#endif
@@ -69,12 +71,32 @@ static inline cpumask_t cpu_online_cores_map(void)
return cpu_thread_mask_to_cores(cpu_online_mask);
}
+#define MAX_THREAD_LIST_SIZE 8
+struct thread_groups {
+ unsigned int property;
+ unsigned int nr_groups;
+ unsigned int threads_per_group;
+ unsigned int thread_list[MAX_THREAD_LIST_SIZE];
+};
+
#ifdef CONFIG_SMP
int cpu_core_index_of_thread(int cpu);
int cpu_first_thread_of_core(int core);
+int parse_thread_groups(struct device_node *dn, struct thread_groups *tg);
+int get_cpu_thread_group_start(int cpu, struct thread_groups *tg);
#else
static inline int cpu_core_index_of_thread(int cpu) { return cpu; }
static inline int cpu_first_thread_of_core(int core) { return core; }
+static inline int parse_thread_groups(struct device_node *dn,
+ struct thread_groups *tg)
+{
+ return -ENODATA;
+}
+
+static inline int get_cpu_thread_group_start(int cpu, struct thread_groups *tg)
+{
+ return -1;
+}
#endif
static inline int cpu_thread_in_core(int cpu)
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 40b44bb..989edc1 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -402,10 +402,12 @@ void __init check_for_initrd(void)
#ifdef CONFIG_SMP
int threads_per_core, threads_per_subcore, threads_shift;
+bool has_big_cores;
cpumask_t threads_core_mask;
EXPORT_SYMBOL_GPL(threads_per_core);
EXPORT_SYMBOL_GPL(threads_per_subcore);
EXPORT_SYMBOL_GPL(threads_shift);
+EXPORT_SYMBOL_GPL(has_big_cores);
EXPORT_SYMBOL_GPL(threads_core_mask);
static void __init cpu_init_thread_core_maps(int tpc)
@@ -433,6 +435,152 @@ static void __init cpu_init_thread_core_maps(int tpc)
u32 *cpu_to_phys_id = NULL;
+/*
+ * parse_thread_groups: Parses the "ibm,thread-groups" device tree
+ * property for the CPU device node @dn and stores
+ * the parsed output in the thread_groups
+ * structure @tg.
+ *
+ * @dn: The device node of the CPU device.
+ * @tg: Pointer to a thread group structure into which the parsed
+ * output of "ibm,thread-groups" is stored.
+ *
+ * ibm,thread-groups[0..N-1] array defines which group of threads in
+ * the CPU-device node can be grouped together based on the property.
+ *
+ * ibm,thread-groups[0] tells us the property based on which the
+ * threads are being grouped together. If this value is 1, it implies
+ * that the threads in the same group share L1, translation cache.
+ *
+ * ibm,thread-groups[1] tells us how many such thread groups exist.
+ *
+ * ibm,thread-groups[2] tells us the number of threads in each such
+ * group.
+ *
+ * ibm,thread-groups[3..N-1] is the list of threads identified by
+ * "ibm,ppc-interrupt-server#s" arranged as per their membership in
+ * the grouping.
+ *
+ * Example: If ibm,thread-groups = [1,2,4,5,6,7,8,9,10,11,12] it
+ * implies that there are 2 groups of 4 threads each, where each group
+ * of threads share L1, translation cache.
+ *
+ * The "ibm,ppc-interrupt-server#s" of the first group is {5,6,7,8}
+ * and the "ibm,ppc-interrupt-server#s" of the second group is {9, 10,
+ * 11, 12} structure
+ *
+ * Returns 0 on success, -EINVAL if the property does not exist,
+ * -ENODATA if property does not have a value, and -EOVERFLOW if the
+ * property data isn't large enough.
+ */
+int parse_thread_groups(struct device_node *dn,
+ struct thread_groups *tg)
+{
+ unsigned int nr_groups, threads_per_group, property;
+ int i;
+ u32 thread_group_array[3 + MAX_THREAD_LIST_SIZE];
+ u32 *thread_list;
+ size_t total_threads;
+ int ret;
+
+ ret = of_property_read_u32_array(dn, "ibm,thread-groups",
+ thread_group_array, 3);
+
+ if (ret)
+ goto out_err;
+
+ property = thread_group_array[0];
+ nr_groups = thread_group_array[1];
+ threads_per_group = thread_group_array[2];
+ total_threads = nr_groups * threads_per_group;
+
+ ret = of_property_read_u32_array(dn, "ibm,thread-groups",
+ thread_group_array,
+ 3 + total_threads);
+ if (ret)
+ goto out_err;
+
+ thread_list = &thread_group_array[3];
+
+ for (i = 0 ; i < total_threads; i++)
+ tg->thread_list[i] = thread_list[i];
+
+ tg->property = property;
+ tg->nr_groups = nr_groups;
+ tg->threads_per_group = threads_per_group;
+
+ return 0;
+out_err:
+ tg->property = 0;
+ tg->nr_groups = 0;
+ tg->threads_per_group = 0;
+ return ret;
+}
+
+/*
+ * dt_has_big_core : Parses the device tree property
+ * "ibm,thread-groups" for device node pointed by @dn
+ * and stores the parsed output in the structure
+ * pointed to by @tg. Then checks if the output in
+ * @tg corresponds to a big-core.
+ *
+ * @dn: Device node pointer of the CPU node being checked for a
+ * big-core.
+ * @tg: Pointer to thread_groups struct in which parsed output of
+ * "ibm,thread-groups" is recorded.
+ *
+ * Returns true if the @dn points to a big-core.
+ * Returns false if there is an error in parsing "ibm,thread-groups"
+ * or the parsed output doesn't correspond to a big-core.
+ */
+static inline bool dt_has_big_core(struct device_node *dn,
+ struct thread_groups *tg)
+{
+ if (parse_thread_groups(dn, tg))
+ return false;
+
+ if (tg->property != 1)
+ return false;
+
+ if (tg->nr_groups < 1)
+ return false;
+
+ return true;
+}
+
+/*
+ * get_cpu_thread_group_start : Searches the thread group in tg->thread_list
+ * that @cpu belongs to.
+ *
+ * @cpu : The logical CPU whose thread group is being searched.
+ * @tg : The thread-group structure of the CPU node which @cpu belongs
+ * to.
+ *
+ * Returns the index to tg->thread_list that points to the the start
+ * of the thread_group that @cpu belongs to.
+ *
+ * Returns -1 if cpu doesn't belong to any of the groups pointed to by
+ * tg->thread_list.
+ */
+int get_cpu_thread_group_start(int cpu, struct thread_groups *tg)
+{
+ int hw_cpu_id = get_hard_smp_processor_id(cpu);
+ int i, j;
+
+ for (i = 0; i < tg->nr_groups; i++) {
+ int group_start = i * tg->threads_per_group;
+
+ for (j = 0; j < tg->threads_per_group; j++) {
+ int idx = group_start + j;
+
+ if (tg->thread_list[idx] == hw_cpu_id)
+ return group_start;
+ }
+ }
+
+ return -1;
+}
+
/**
* setup_cpu_maps - initialize the following cpu maps:
* cpu_possible_mask
@@ -457,6 +605,7 @@ void __init smp_setup_cpu_maps(void)
int cpu = 0;
int nthreads = 1;
+ has_big_cores = true;
DBG("smp_setup_cpu_maps()\n");
cpu_to_phys_id = __va(memblock_alloc(nr_cpu_ids * sizeof(u32),
@@ -467,6 +616,7 @@ void __init smp_setup_cpu_maps(void)
const __be32 *intserv;
__be32 cpu_be;
int j, len;
+ struct thread_groups tg;
DBG(" * %pOF...\n", dn);
@@ -505,6 +655,10 @@ void __init smp_setup_cpu_maps(void)
cpu++;
}
+ if (has_big_cores && !dt_has_big_core(dn, &tg)) {
+ has_big_cores = false;
+ }
+
if (cpu >= nr_cpu_ids) {
of_node_put(dn);
break;
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 755dc98..f5717de 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -18,6 +18,7 @@
#include <asm/smp.h>
#include <asm/pmc.h>
#include <asm/firmware.h>
+#include <asm/cputhreads.h>
#include "cacheinfo.h"
#include "setup.h"
@@ -1025,6 +1026,33 @@ static ssize_t show_physical_id(struct device *dev,
}
static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
+static ssize_t show_small_core_siblings(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct cpu *cpu = container_of(dev, struct cpu, dev);
+ struct device_node *dn = of_get_cpu_node(cpu->dev.id, NULL);
+ struct thread_groups tg;
+ int i, j;
+ ssize_t ret = 0;
+
+ if (parse_thread_groups(dn, &tg))
+ return -ENODATA;
+
+ i = get_cpu_thread_group_start(cpu->dev.id, &tg);
+
+ if (i == -1)
+ return -ENODATA;
+
+ for (j = 0; j < tg.threads_per_group - 1; j++)
+ ret += sprintf(buf + ret, "%d,", tg.thread_list[i + j]);
+
+ ret += sprintf(buf + ret, "%d\n", tg.thread_list[i + j]);
+
+ return ret;
+}
+static DEVICE_ATTR(small_core_siblings, 0444, show_small_core_siblings, NULL);
+
static int __init topology_init(void)
{
int cpu, r;
@@ -1048,6 +1076,13 @@ static int __init topology_init(void)
register_cpu(c, cpu);
device_create_file(&c->dev, &dev_attr_physical_id);
+
+ if (has_big_cores) {
+ const struct device_attribute *attr =
+ &dev_attr_small_core_siblings;
+
+ device_create_file(&c->dev, attr);
+ }
}
}
r = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powerpc/topology:online",
--
1.9.4
^ permalink raw reply related
* [PATCH v4 0/2] powerpc: Detection and scheduler optimization for POWER9 bigcore
From: Gautham R. Shenoy @ 2018-07-24 6:14 UTC (permalink / raw)
To: Michael Ellerman, Benjamin Herrenschmidt, Michael Neuling,
Vaidyanathan Srinivasan, Akshay Adiga, Shilpasri G Bhat,
Oliver O'Halloran, Nicholas Piggin, Murilo Opsfelder Araujo
Cc: linuxppc-dev, linux-kernel, Gautham R. Shenoy
From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
Hi,
This is the fourth iteration of the patchset to add support for
big-core on POWER9.
The previous versions can be found here:
v3: https://lkml.org/lkml/2018/7/6/255
v2: https://lkml.org/lkml/2018/7/3/401
v1: https://lkml.org/lkml/2018/5/11/245
Changes :
v3 --> v4:
- Build fix for powerpc-g5 : Enable CPU_FTR_ASYM_SMT only on
CONFIG_PPC_POWERNV and CONFIG_PPC_PSERIES.
- Fixed a minor error in the ABI description.
v2 --> v3
- Set sane values in the tg->property, tg->nr_groups inside
parse_thread_groups before returning due to an error.
- Define a helper function to determine whether a CPU device node
is a big-core or not.
- Updated the comments around the functions to describe the
arguments passed to them.
v1 --> v2
- Added comments explaining the "ibm,thread-groups" device tree property.
- Uses cleaner device-tree parsing functions to parse the u32 arrays.
- Adds a sysfs file listing the small-core siblings for every CPU.
- Enables the scheduler optimization by setting the CPU_FTR_ASYM_SMT bit
in the cur_cpu_spec->cpu_features on detecting the presence
of interleaved big-core.
- Handles the corner case where there is only a single thread-group
or when there is a single thread in a thread-group.
Description:
~~~~~~~~~~~~~~~~~~~~
A pair of IBM POWER9 SMT4 cores can be fused together to form a
big-core with 8 SMT threads. This can be discovered via the
"ibm,thread-groups" CPU property in the device tree which will
indicate which group of threads that share the L1 cache, translation
cache and instruction data flow. If there are multiple such group of
threads, then the core is a big-core. Furthermore, the thread-ids of
such a big-core is obtained by interleaving the thread-ids of the
component SMT4 cores.
Eg: Threads in the pair of component SMT4 cores of an interleaved
big-core are numbered {0,2,4,6} and {1,3,5,7} respectively.
On such a big-core, when multiple tasks are scheduled to run on the
big-core, we get the best performance when the tasks are spread across
the pair of SMT4 cores.
The Linux scheduler supports a flag called "SD_ASYM_PACKING" which
when set in the SMT sched-domain, biases the load-balancing of the
tasks on the smaller numbered threads in the core. On an big-core
whose threads are interleavings of the threads of the small cores,
enabling SD_ASYM_PACKING in the SMT sched-domain automatically results
in spreading the tasks uniformly across the associated pair of SMT4
cores, thereby yielding better performance.
This patchset contains two patches which on detecting the presence of
interleaved big-cores will enable the the CPU_FTR_ASYM_SMT bit in the
cur_cpu_spec->cpu_feature.
Patch 1: adds support to detect the presence of
big-cores and reports the small-core siblings of each CPU X
via the sysfs file "/sys/devices/system/cpu/cpuX/big_core_siblings".
Patch 2: checks if the thread-ids of the component small-cores are
interleaved, in which case we enable the the CPU_FTR_ASYM_SMT bit in
the cur_cpu_spec->cpu_features which results in the SD_ASYM_PACKING
flag being set at the SMT level sched-domain.
Results:
~~~~~~~~~~~~~~~~~
Experimental results for ebizzy with 2 threads, bound to a single big-core
show a marked improvement with this patchset over the 4.18-rc5 vanilla
kernel.
The result of 100 such runs for 4.18-rc5 kernel and the 4.18-rc5 +
big-core-patches are as follows
4.18-rc5 vanilla:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
records/s : # samples : Histogram
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[0 - 1000000] : 0 : #
[1000000 - 2000000] : 7 : ##
[2000000 - 3000000] : 17 : ####
[3000000 - 4000000] : 18 : ####
[4000000 - 5000000] : 3 : #
[5000000 - 6000000] : 55 : ############
4.8-rc5 + big-core-patches
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
records/s : # samples : Histogram
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[0 - 1000000] : 0 : #
[1000000 - 2000000] : 0 : #
[2000000 - 3000000] : 8 : ##
[3000000 - 4000000] : 0 : #
[4000000 - 5000000] : 0 : #
[5000000 - 6000000] : 92 : ###################
Gautham R. Shenoy (2):
powerpc: Detect the presence of big-cores via "ibm,thread-groups"
powerpc: Enable CPU_FTR_ASYM_SMT for interleaved big-cores
Documentation/ABI/testing/sysfs-devices-system-cpu | 8 +
arch/powerpc/include/asm/cputhreads.h | 22 ++
arch/powerpc/kernel/setup-common.c | 229 ++++++++++++++++++++-
arch/powerpc/kernel/sysfs.c | 35 ++++
4 files changed, 293 insertions(+), 1 deletion(-)
--
1.9.4
^ permalink raw reply
* Re: bisected: 4.18-rc* regression: x86-32 troubles (with timers?)
From: Meelis Roos @ 2018-07-24 6:11 UTC (permalink / raw)
To: Daniel Borkmann; +Cc: Arnd Bergmann, Linux Kernel list, Networking
In-Reply-To: <4a48811d-4094-ee4c-33ca-2cf0446a6313@iogearbox.net>
> >> I would be curious as well about that whether revert would make it
> >> work. What's the value of sysctl net.core.bpf_jit_enable ? Does it
> >> change anything if you set it to 0 (only interpreter) or 1 (JIT
> >> enabled). Seems a bit strange to me that bisect ended at this commit
> >> given the issue you have. The JIT itself was also new in this window
> >> fwiw. In any case some more debug info would be great to have.
> >
> > net.core.bpf_jit_enable is 1.
> >
> > Since it breaks bootup, I can not easily change the value at runtime (it
> > would be postfactum). Do you mean changing the
> > CONFIG_BPF_JIT_ALWAYS_ON=y option?
>
> Yeah if you chance it to N, and don't have any fixed /etc/sysctl.conf
> setting, then you'll boot up with interpreter first (net.core.bpf_jit_enable
> as 0). Curious whether that works just fine for you.
Disabled CONFIG_BPF_JIT_ALWAYS_ON on v4.18-rc5 and it works, tested on 2
bootups.
--
Meelis Roos (mroos@linux.ee)
^ permalink raw reply
* [U-Boot] [PATCH v2] arm: zynq: add support for the zybo z7 board
From: Luis Araneda @ 2018-07-24 6:10 UTC (permalink / raw)
To: u-boot
The board is manufactured by Digilent
Main features:
- Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
- RAM: 1 GB DDR3L
- FLASH: 16 MB QSPI
- 1 Gbps Ethernet
- USB 2.0
- microSD slot
- Pcam camera connector
- HDMI Tx and Rx
- Audio codec: stereo out, stereo in, mic
- 5 (Z7-10) or 6 (Z7-20) Pmod ports
- 6 push-buttons, 4 switches, 5 LEDs
- 1 (Z7-10) or 2 (Z7-20) RGB LEDs
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
---
This patch adds support for the Digilent Zybo Z7 board
The only thing that I tested and is not working yet, is reading the
MAC address from the OTP region of the SPI flash memory, but I'm trying
to find a solution
Changes from v1:
- Rebased on u-boot/master
- Removed comments and indented ps7_init_gpl.c
- Removed CONFIG_DISPLAY from defconfig
- Replaced the cadence I2C driver by zynq_i2c
- Squashed the patches as they are less than 100kB now
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/zynq-zybo-z7.dts | 81 ++
board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c | 809 ++++++++++++++++++
configs/zynq_zybo_z7_defconfig | 68 ++
4 files changed, 960 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/zynq-zybo-z7.dts
create mode 100644 board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
create mode 100644 configs/zynq_zybo_z7_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 09adf5eab1..07d8729104 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -149,7 +149,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zc770-xm013.dtb \
zynq-zed.dtb \
zynq-zturn.dtb \
- zynq-zybo.dtb
+ zynq-zybo.dtb \
+ zynq-zybo-z7.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc0.dtb \
zynqmp-mini-emmc1.dtb \
diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts
new file mode 100644
index 0000000000..3f8a3bfa0f
--- /dev/null
+++ b/arch/arm/dts/zynq-zybo-z7.dts
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2011 - 2015 Xilinx
+ * Copyright (C) 2012 National Instruments Corp.
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Digilent Zybo Z7 board";
+ compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
+
+ aliases {
+ ethernet0 = &gem0;
+ serial0 = &uart1;
+ spi0 = &qspi;
+ mmc0 = &sdhci0;
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x0 0x40000000>;
+ };
+
+ chosen {
+ bootargs = "";
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ ld4 {
+ label = "zynq-zybo-z7:green:ld4";
+ gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ usb_phy0: phy0 {
+ #phy-cells = <0>;
+ compatible = "usb-nop-xceiv";
+ reset-gpios = <&gpio0 46 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&clkc {
+ ps-clk-frequency = <33333333>;
+};
+
+&gem0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ phy-handle = <ðernet_phy>;
+
+ ethernet_phy: ethernet-phy at 0 {
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+};
+
+&qspi {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&sdhci0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&uart1 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+ usb-phy = <&usb_phy0>;
+};
diff --git a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
new file mode 100644
index 0000000000..5da4941338
--- /dev/null
+++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
@@ -0,0 +1,809 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
+ *
+ * Procedure to generate this file (using Vivado Webpack 2018.2):
+ * + Install board files from digilent/vivado-boards repository
+ * (commit 6a45981 from 2018-06-05)
+ * + Start Vivado and create a new RTL project with the Zybo-z7-20 board
+ * + Create a block design
+ * - Add "ZYNQ7 Processing System" IP
+ * - Run "Block Automation" (Check "Apply Board Preset")
+ * - Connect ports FCLK_CLK0 and M_AXI_GP0_ACLK
+ * - Save diagram changes
+ * - Go to sources view, select the block diagram,
+ * and select "Generate Output Products"
+ * + Copy the generated "ps7_init_gpl.c" file
+ * + Perform manual editions based on existing Zynq boards
+ * and the checkpatch.pl script
+ *
+ */
+
+#include <asm/arch/ps7_init_gpl.h>
+
+static unsigned long ps7_pll_init_data_3_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U),
+ EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U),
+ EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U),
+ EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U),
+ EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000002U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U),
+ EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U),
+ EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U),
+ EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000004U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_clock_init_data_3_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U),
+ EMIT_MASKWRITE(0xF8000138, 0x00000011U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000140, 0x03F03F71U, 0x00100801U),
+ EMIT_MASKWRITE(0xF800014C, 0x00003F31U, 0x00000501U),
+ EMIT_MASKWRITE(0xF8000150, 0x00003F33U, 0x00001401U),
+ EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00000A02U),
+ EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U),
+ EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U),
+ EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x01EC044DU),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_ddr_init_data_3_0[] = {
+ EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U),
+ EMIT_MASKWRITE(0xF8006004, 0x0007FFFFU, 0x00001081U),
+ EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU),
+ EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U),
+ EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U),
+ EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004281AU),
+ EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E458D2U),
+ EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U),
+ EMIT_MASKWRITE(0xF8006020, 0x7FDFFFFCU, 0x270872D0U),
+ EMIT_MASKWRITE(0xF8006024, 0x0FFFFFC3U, 0x00000000U),
+ EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U),
+ EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U),
+ EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U),
+ EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U),
+ EMIT_MASKWRITE(0xF8006038, 0x00000003U, 0x00000000U),
+ EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U),
+ EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U),
+ EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U),
+ EMIT_MASKWRITE(0xF8006048, 0x0003F03FU, 0x0003C008U),
+ EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U),
+ EMIT_MASKWRITE(0xF8006058, 0x00010000U, 0x00000000U),
+ EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U),
+ EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU),
+ EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U),
+ EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U),
+ EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U),
+ EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U),
+ EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U),
+ EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U),
+ EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U),
+ EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU),
+ EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU),
+ EMIT_MASKWRITE(0xF80060B4, 0x00000200U, 0x00000200U),
+ EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U),
+ EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U),
+ EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF8006118, 0x7FFFFFCFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF800611C, 0x7FFFFFCFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF8006120, 0x7FFFFFCFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF8006124, 0x7FFFFFCFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x00027000U),
+ EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00027000U),
+ EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x00026C00U),
+ EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00028800U),
+ EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x0000007AU),
+ EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x0000007AU),
+ EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000007CU),
+ EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x00000073U),
+ EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x000000F1U),
+ EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x000000F1U),
+ EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x000000F0U),
+ EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x000000F7U),
+ EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000BAU),
+ EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000BAU),
+ EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000BCU),
+ EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000B3U),
+ EMIT_MASKWRITE(0xF8006190, 0x6FFFFEFEU, 0x00040080U),
+ EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U),
+ EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF8006208, 0x000703FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF800620C, 0x000703FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006210, 0x000703FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006214, 0x000703FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF80062A8, 0x00000FF5U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U),
+ EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U),
+ EMIT_MASKPOLL(0xF8000B74, 0x00002000U),
+ EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U),
+ EMIT_MASKPOLL(0xF8006054, 0x00000007U),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_mio_init_data_3_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U),
+ EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U),
+ EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U),
+ EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U),
+ EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C068U),
+ EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U),
+ EMIT_MASKWRITE(0xF8000B70, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U),
+ EMIT_MASKWRITE(0xF8000B70, 0x07FEFFFFU, 0x00000823U),
+ EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000704, 0x00003FFFU, 0x00001602U),
+ EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF800073C, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000788, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800078C, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000790, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000794, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000798, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800079C, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U),
+ EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U),
+ EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U),
+ EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_peripherals_init_data_3_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U),
+ EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000007CU),
+ EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U),
+ EMIT_MASKWRITE(0xE0001004, 0x000003FFU, 0x00000020U),
+ EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U),
+ EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U),
+ EMIT_MASKWRITE(0xE000A244, 0x003FFFFFU, 0x00004000U),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U),
+ EMIT_MASKWRITE(0xE000A248, 0x003FFFFFU, 0x00004000U),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF0000U),
+ EMIT_MASKDELAY(0xF8F00200, 1),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_post_config_3_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU),
+ EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_pll_init_data_2_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U),
+ EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U),
+ EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U),
+ EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U),
+ EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000002U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U),
+ EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U),
+ EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U),
+ EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000004U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_clock_init_data_2_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U),
+ EMIT_MASKWRITE(0xF8000138, 0x00000011U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000140, 0x03F03F71U, 0x00100801U),
+ EMIT_MASKWRITE(0xF800014C, 0x00003F31U, 0x00000501U),
+ EMIT_MASKWRITE(0xF8000150, 0x00003F33U, 0x00001401U),
+ EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00000A02U),
+ EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U),
+ EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U),
+ EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x01EC044DU),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_ddr_init_data_2_0[] = {
+ EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U),
+ EMIT_MASKWRITE(0xF8006004, 0x1FFFFFFFU, 0x00081081U),
+ EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU),
+ EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U),
+ EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U),
+ EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004281AU),
+ EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E458D2U),
+ EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U),
+ EMIT_MASKWRITE(0xF8006020, 0xFFFFFFFCU, 0x272872D0U),
+ EMIT_MASKWRITE(0xF8006024, 0x0FFFFFFFU, 0x0000003CU),
+ EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U),
+ EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U),
+ EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U),
+ EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U),
+ EMIT_MASKWRITE(0xF8006038, 0x00001FC3U, 0x00000000U),
+ EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U),
+ EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U),
+ EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U),
+ EMIT_MASKWRITE(0xF8006048, 0x3FFFFFFFU, 0x0003C248U),
+ EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U),
+ EMIT_MASKWRITE(0xF8006058, 0x0001FFFFU, 0x00000101U),
+ EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U),
+ EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU),
+ EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U),
+ EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U),
+ EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U),
+ EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U),
+ EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U),
+ EMIT_MASKWRITE(0xF80060A0, 0x00FFFFFFU, 0x00008000U),
+ EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U),
+ EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U),
+ EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU),
+ EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU),
+ EMIT_MASKWRITE(0xF80060B4, 0x000007FFU, 0x00000200U),
+ EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U),
+ EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U),
+ EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF8006118, 0x7FFFFFFFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF800611C, 0x7FFFFFFFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF8006120, 0x7FFFFFFFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF8006124, 0x7FFFFFFFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x00027000U),
+ EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00027000U),
+ EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x00026C00U),
+ EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00028800U),
+ EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x0000007AU),
+ EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x0000007AU),
+ EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000007CU),
+ EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x00000073U),
+ EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x000000F1U),
+ EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x000000F1U),
+ EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x000000F0U),
+ EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x000000F7U),
+ EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000BAU),
+ EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000BAU),
+ EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000BCU),
+ EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000B3U),
+ EMIT_MASKWRITE(0xF8006190, 0xFFFFFFFFU, 0x10040080U),
+ EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U),
+ EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF8006208, 0x000F03FFU, 0x000803FFU),
+ EMIT_MASKWRITE(0xF800620C, 0x000F03FFU, 0x000803FFU),
+ EMIT_MASKWRITE(0xF8006210, 0x000F03FFU, 0x000803FFU),
+ EMIT_MASKWRITE(0xF8006214, 0x000F03FFU, 0x000803FFU),
+ EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF80062A8, 0x00000FF7U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U),
+ EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U),
+ EMIT_MASKPOLL(0xF8000B74, 0x00002000U),
+ EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U),
+ EMIT_MASKPOLL(0xF8006054, 0x00000007U),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_mio_init_data_2_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U),
+ EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U),
+ EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U),
+ EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U),
+ EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C068U),
+ EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U),
+ EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000021U),
+ EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U),
+ EMIT_MASKWRITE(0xF8000B70, 0x07FFFFFFU, 0x00000823U),
+ EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000704, 0x00003FFFU, 0x00001602U),
+ EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF800073C, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000788, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800078C, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000790, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000794, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000798, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800079C, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U),
+ EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U),
+ EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U),
+ EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_peripherals_init_data_2_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U),
+ EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000007CU),
+ EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U),
+ EMIT_MASKWRITE(0xE0001004, 0x00000FFFU, 0x00000020U),
+ EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U),
+ EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U),
+ EMIT_MASKWRITE(0xE000A244, 0x003FFFFFU, 0x00004000U),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U),
+ EMIT_MASKWRITE(0xE000A248, 0x003FFFFFU, 0x00004000U),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF0000U),
+ EMIT_MASKDELAY(0xF8F00200, 1),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_post_config_2_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU),
+ EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_pll_init_data_1_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U),
+ EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U),
+ EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U),
+ EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U),
+ EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000002U),
+ EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U),
+ EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U),
+ EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U),
+ EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U),
+ EMIT_MASKPOLL(0xF800010C, 0x00000004U),
+ EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_clock_init_data_1_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U),
+ EMIT_MASKWRITE(0xF8000138, 0x00000011U, 0x00000001U),
+ EMIT_MASKWRITE(0xF8000140, 0x03F03F71U, 0x00100801U),
+ EMIT_MASKWRITE(0xF800014C, 0x00003F31U, 0x00000501U),
+ EMIT_MASKWRITE(0xF8000150, 0x00003F33U, 0x00001401U),
+ EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00000A02U),
+ EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U),
+ EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U),
+ EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U),
+ EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x01EC044DU),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_ddr_init_data_1_0[] = {
+ EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U),
+ EMIT_MASKWRITE(0xF8006004, 0x1FFFFFFFU, 0x00081081U),
+ EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU),
+ EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U),
+ EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U),
+ EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004281AU),
+ EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E458D2U),
+ EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U),
+ EMIT_MASKWRITE(0xF8006020, 0xFFFFFFFCU, 0x272872D0U),
+ EMIT_MASKWRITE(0xF8006024, 0x0FFFFFFFU, 0x0000003CU),
+ EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U),
+ EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U),
+ EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U),
+ EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U),
+ EMIT_MASKWRITE(0xF8006038, 0x00001FC3U, 0x00000000U),
+ EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U),
+ EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U),
+ EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U),
+ EMIT_MASKWRITE(0xF8006048, 0x3FFFFFFFU, 0x0003C248U),
+ EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U),
+ EMIT_MASKWRITE(0xF8006058, 0x0001FFFFU, 0x00000101U),
+ EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U),
+ EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU),
+ EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U),
+ EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U),
+ EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U),
+ EMIT_MASKWRITE(0xF80060A0, 0x00FFFFFFU, 0x00008000U),
+ EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U),
+ EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U),
+ EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU),
+ EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU),
+ EMIT_MASKWRITE(0xF80060B4, 0x000007FFU, 0x00000200U),
+ EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U),
+ EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U),
+ EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF8006118, 0x7FFFFFFFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF800611C, 0x7FFFFFFFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF8006120, 0x7FFFFFFFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF8006124, 0x7FFFFFFFU, 0x40000001U),
+ EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x00027000U),
+ EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00027000U),
+ EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x00026C00U),
+ EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00028800U),
+ EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U),
+ EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x0000007AU),
+ EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x0000007AU),
+ EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000007CU),
+ EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x00000073U),
+ EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x000000F1U),
+ EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x000000F1U),
+ EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x000000F0U),
+ EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x000000F7U),
+ EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000BAU),
+ EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000BAU),
+ EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000BCU),
+ EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000B3U),
+ EMIT_MASKWRITE(0xF8006190, 0xFFFFFFFFU, 0x10040080U),
+ EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U),
+ EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF8006208, 0x000F03FFU, 0x000803FFU),
+ EMIT_MASKWRITE(0xF800620C, 0x000F03FFU, 0x000803FFU),
+ EMIT_MASKWRITE(0xF8006210, 0x000F03FFU, 0x000803FFU),
+ EMIT_MASKWRITE(0xF8006214, 0x000F03FFU, 0x000803FFU),
+ EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU),
+ EMIT_MASKWRITE(0xF80062A8, 0x00000FF7U, 0x00000000U),
+ EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U),
+ EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U),
+ EMIT_MASKPOLL(0xF8000B74, 0x00002000U),
+ EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U),
+ EMIT_MASKPOLL(0xF8006054, 0x00000007U),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_mio_init_data_1_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U),
+ EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U),
+ EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U),
+ EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U),
+ EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C068U),
+ EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F98068U),
+ EMIT_MASKWRITE(0xF8000B6C, 0x000073FFU, 0x00000260U),
+ EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000021U),
+ EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U),
+ EMIT_MASKWRITE(0xF8000B70, 0x07FFFFFFU, 0x00000823U),
+ EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000704, 0x00003FFFU, 0x00001602U),
+ EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000600U),
+ EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000602U),
+ EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF800073C, 0x00003FFFU, 0x00001600U),
+ EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001302U),
+ EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001303U),
+ EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000788, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800078C, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000790, 0x00003FFFU, 0x00001305U),
+ EMIT_MASKWRITE(0xF8000794, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF8000798, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF800079C, 0x00003FFFU, 0x00001304U),
+ EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U),
+ EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U),
+ EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U),
+ EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U),
+ EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U),
+ EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_peripherals_init_data_1_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U),
+ EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U),
+ EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000007CU),
+ EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U),
+ EMIT_MASKWRITE(0xE0001004, 0x00000FFFU, 0x00000020U),
+ EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U),
+ EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U),
+ EMIT_MASKWRITE(0xE000A244, 0x003FFFFFU, 0x00004000U),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U),
+ EMIT_MASKWRITE(0xE000A248, 0x003FFFFFU, 0x00004000U),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF0000U),
+ EMIT_MASKDELAY(0xF8F00200, 1),
+ EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U),
+ EMIT_EXIT(),
+};
+
+static unsigned long ps7_post_config_1_0[] = {
+ EMIT_WRITE(0xF8000008, 0x0000DF0DU),
+ EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU),
+ EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U),
+ EMIT_WRITE(0xF8000004, 0x0000767BU),
+ EMIT_EXIT(),
+};
+
+int ps7_post_config(void)
+{
+ unsigned long si_ver = ps7GetSiliconVersion();
+ int ret = -1;
+
+ if (si_ver == PCW_SILICON_VERSION_1) {
+ ret = ps7_config(ps7_post_config_1_0);
+ if (ret != PS7_INIT_SUCCESS)
+ return ret;
+ } else if (si_ver == PCW_SILICON_VERSION_2) {
+ ret = ps7_config(ps7_post_config_2_0);
+ if (ret != PS7_INIT_SUCCESS)
+ return ret;
+ } else {
+ ret = ps7_config(ps7_post_config_3_0);
+ if (ret != PS7_INIT_SUCCESS)
+ return ret;
+ }
+ return PS7_INIT_SUCCESS;
+}
+
+int ps7_init(void)
+{
+ unsigned long si_ver = ps7GetSiliconVersion();
+ unsigned long *ps7_mio_init_data;
+ unsigned long *ps7_pll_init_data;
+ unsigned long *ps7_clock_init_data;
+ unsigned long *ps7_ddr_init_data;
+ unsigned long *ps7_peripherals_init_data;
+ int ret;
+
+ if (si_ver == PCW_SILICON_VERSION_1) {
+ ps7_mio_init_data = ps7_mio_init_data_1_0;
+ ps7_pll_init_data = ps7_pll_init_data_1_0;
+ ps7_clock_init_data = ps7_clock_init_data_1_0;
+ ps7_ddr_init_data = ps7_ddr_init_data_1_0;
+ ps7_peripherals_init_data = ps7_peripherals_init_data_1_0;
+
+ } else if (si_ver == PCW_SILICON_VERSION_2) {
+ ps7_mio_init_data = ps7_mio_init_data_2_0;
+ ps7_pll_init_data = ps7_pll_init_data_2_0;
+ ps7_clock_init_data = ps7_clock_init_data_2_0;
+ ps7_ddr_init_data = ps7_ddr_init_data_2_0;
+ ps7_peripherals_init_data = ps7_peripherals_init_data_2_0;
+
+ } else {
+ ps7_mio_init_data = ps7_mio_init_data_3_0;
+ ps7_pll_init_data = ps7_pll_init_data_3_0;
+ ps7_clock_init_data = ps7_clock_init_data_3_0;
+ ps7_ddr_init_data = ps7_ddr_init_data_3_0;
+ ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;
+ }
+
+ ret = ps7_config(ps7_mio_init_data);
+ if (ret != PS7_INIT_SUCCESS)
+ return ret;
+
+ ret = ps7_config(ps7_pll_init_data);
+ if (ret != PS7_INIT_SUCCESS)
+ return ret;
+
+ ret = ps7_config(ps7_clock_init_data);
+ if (ret != PS7_INIT_SUCCESS)
+ return ret;
+
+ ret = ps7_config(ps7_ddr_init_data);
+ if (ret != PS7_INIT_SUCCESS)
+ return ret;
+
+ ret = ps7_config(ps7_peripherals_init_data);
+ if (ret != PS7_INIT_SUCCESS)
+ return ret;
+
+ return PS7_INIT_SUCCESS;
+}
diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig
new file mode 100644
index 0000000000..ad44e772aa
--- /dev/null
+++ b/configs/zynq_zybo_z7_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xe0001000
+CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
+CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo-z7"
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_PROMPT="Zynq> "
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADFS=y
+CONFIG_CMD_FPGA_LOADMK=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
+CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_REALTEK=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_ZYNQ_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_THOR=y
--
2.18.0
^ permalink raw reply related
* Re: [PATCH v2] Makefile: add a DEVOPTS flag to get pedantic compilation
From: Beat Bolli @ 2018-07-24 6:04 UTC (permalink / raw)
To: Junio C Hamano; +Cc: git, Ævar Arnfjörð Bjarmason
In-Reply-To: <xmqqva956ax8.fsf@gitster-ct.c.googlers.com>
On 23.07.18 20:53, Junio C Hamano wrote:
> Beat Bolli <dev+git@drbeat.li> writes:
>
>> In the interest of code hygiene, make it easier to compile Git with the
>> flag -pedantic.
>>
>> Pure pedantic compilation with GCC 7.3 results in one warning per use of
>> the translation macro `N_`:
>>
>> warning: array initialized from parenthesized string constant [-Wpedantic]
>>
>> Therefore also disable the parenthesising of i18n strings with
>> -DUSE_PARENS_AROUND_GETTEXT_N=no.
>>
>> Signed-off-by: Beat Bolli <dev+git@drbeat.li>
>> ---
>>
>> This is the convenience knob for all developers that led to the series
>> bb/pedantic[1]. It does not depend on this series, though.
>
> Yup, but "make DEVELOPER=Yes" build won't pass unless this patch is
> queued after those clean-up ;-)
Then there's a bug in this patch. It should only have an effect if we
"make DEVELOPER=Yes DEVOPTS=pedantic". Did you try this?
> Remind me if I forget to tweak =no back to =0 before pushing the
> result out.
No problem, I can send a v3 with this change reverted.
Beat
>
> Thanks.
>
>> [1] https://public-inbox.org/git/20180708144342.11922-1-dev+git@drbeat.li/T/#u
>>
>> Makefile | 6 ++++++
>> config.mak.dev | 5 +++++
>> 2 files changed, 11 insertions(+)
>>
>> diff --git a/Makefile b/Makefile
>> index 0cb6590f24..2bfc051652 100644
>> --- a/Makefile
>> +++ b/Makefile
>> @@ -484,6 +484,12 @@ all::
>> # The DEVELOPER mode enables -Wextra with a few exceptions. By
>> # setting this flag the exceptions are removed, and all of
>> # -Wextra is used.
>> +#
>> +# pedantic:
>> +#
>> +# Enable -pedantic compilation. This also disables
>> +# USE_PARENS_AROUND_GETTEXT_N to produce only relevant warnings.
>>
>> GIT-VERSION-FILE: FORCE
>> @$(SHELL_PATH) ./GIT-VERSION-GEN
>> diff --git a/config.mak.dev b/config.mak.dev
>> index 2d244ca470..e11dd94741 100644
>> --- a/config.mak.dev
>> +++ b/config.mak.dev
>> @@ -1,6 +1,11 @@
>> ifeq ($(filter no-error,$(DEVOPTS)),)
>> CFLAGS += -Werror
>> endif
>> +ifneq ($(filter pedantic,$(DEVOPTS)),)
>> +CFLAGS += -pedantic
>> +# don't warn for each N_ use
>> +CFLAGS += -DUSE_PARENS_AROUND_GETTEXT_N=no
>> +endif
>> CFLAGS += -Wdeclaration-after-statement
>> CFLAGS += -Wno-format-zero-length
>> CFLAGS += -Wold-style-definition
^ permalink raw reply
* [PATCH] powerpc/e200: Skip tlb1 entries used for kernel mapping
From: Bharat Bhushan @ 2018-07-24 5:59 UTC (permalink / raw)
To: benh, paulus, mpe, linuxppc-dev, linux-kernel; +Cc: Bharat Bhushan
E200 have TLB1 only and it does not have TLB0.
So TLB1 are used for mapping kernel and user-space both.
TLB miss handler for E200 does not consider skipping TLBs
used for kernel mapping. This patch ensures that we skip
tlb1 entries used for kernel mapping (tlbcam_index).
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
---
arch/powerpc/kernel/head_fsl_booke.S | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index bf4c602..951fb96 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -801,12 +801,28 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
/* Round robin TLB1 entries assignment */
mfspr r12, SPRN_MAS0
+ /* Get first free tlbcam entry */
+ lis r11, tlbcam_index@ha
+ lwz r11, tlbcam_index@l(r11)
+
+ /* Extract MAS0(NV) */
+ andi. r13, r12, 0xfff
+ cmpw 0, r13, r11
+ blt 0, 5f
+ b 6f
+5:
+ /* When NV is less than first free tlbcam entry, use first free
+ * tlbcam entry for ESEL and set NV */
+ rlwimi r12, r11, 16, 4, 15
+ addi r11, r11, 1
+ rlwimi r12, r11, 0, 20, 31
+ b 7f
+6:
/* Extract TLB1CFG(NENTRY) */
mfspr r11, SPRN_TLB1CFG
andi. r11, r11, 0xfff
- /* Extract MAS0(NV) */
- andi. r13, r12, 0xfff
+ /* Set MAS0(NV) for next TLB miss exception */
addi r13, r13, 1
cmpw 0, r13, r11
addi r12, r12, 1
--
1.9.3
^ permalink raw reply related
* linux-next: build warning after merge of the fsi tree
From: Stephen Rothwell @ 2018-07-24 6:03 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Linux-Next Mailing List, Linux Kernel Mailing List
[-- Attachment #1: Type: text/plain, Size: 2142 bytes --]
Hi Benjamin,
After merging the fsi tree, today's linux-next build (x86_64 allmodconfig)
produced this warning:
In file included from include/linux/printk.h:336:0,
from include/linux/kernel.h:14,
from include/linux/delay.h:22,
from drivers/fsi/fsi-master-ast-cf.c:8:
drivers/fsi/fsi-master-ast-cf.c: In function 'fsi_master_acf_read':
drivers/fsi/fsi-master-ast-cf.c:609:23: warning: format '%u' expects argument of type 'unsigned int', but argument 6 has type 'size_t {aka long unsigned int}' [-Wformat=]
dev_dbg(master->dev, "read id %d addr %x size %ud\n", id, addr, size);
^
include/linux/dynamic_debug.h:135:39: note: in definition of macro 'dynamic_dev_dbg'
__dynamic_dev_dbg(&descriptor, dev, fmt, \
^~~
include/linux/device.h:1428:23: note: in expansion of macro 'dev_fmt'
dynamic_dev_dbg(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~~~~~
drivers/fsi/fsi-master-ast-cf.c:609:2: note: in expansion of macro 'dev_dbg'
dev_dbg(master->dev, "read id %d addr %x size %ud\n", id, addr, size);
^~~~~~~
drivers/fsi/fsi-master-ast-cf.c: In function 'fsi_master_acf_write':
drivers/fsi/fsi-master-ast-cf.c:634:23: warning: format '%u' expects argument of type 'unsigned int', but argument 6 has type 'size_t {aka long unsigned int}' [-Wformat=]
dev_dbg(master->dev, "write id %d addr %x size %ud raw_data: %08x\n",
^
include/linux/dynamic_debug.h:135:39: note: in definition of macro 'dynamic_dev_dbg'
__dynamic_dev_dbg(&descriptor, dev, fmt, \
^~~
include/linux/device.h:1428:23: note: in expansion of macro 'dev_fmt'
dynamic_dev_dbg(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~~~~~
drivers/fsi/fsi-master-ast-cf.c:634:2: note: in expansion of macro 'dev_dbg'
dev_dbg(master->dev, "write id %d addr %x size %ud raw_data: %08x\n",
^~~~~~~
Introduced by commit
6a794a27daca ("fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire")
--
Cheers,
Stephen Rothwell
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH v2] gpu: drm: virtio: code cleanup
From: Souptick Joarder @ 2018-07-24 6:03 UTC (permalink / raw)
To: airlied, Gerd Hoffmann
Cc: dri-devel, virtualization, linux-kernel, SUMAN TRIPATHI,
Ajit Linux, Brajeswar Ghosh, Sabyasachi Gupta, Matthew Wilcox
In-Reply-To: <CAFqt6zaqh+Jv6vmn2iOZL9jVtX7Qwf9b_QFPSfwg2+EcBRo5vA@mail.gmail.com>
On Tue, Jul 17, 2018 at 5:04 PM, Souptick Joarder <jrdr.linux@gmail.com> wrote:
> On Tue, Jul 3, 2018 at 9:03 PM, Souptick Joarder <jrdr.linux@gmail.com> wrote:
>> The fault handler code is commented since v4.2.
>> If there is no plan to enable the fault handler
>> code in future, we can remove this dead code.
>>
>> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com>
>> ---
>> v2: corrected subject line
>>
>
> Any further comment on this patch ?
If no further comment, can we get this patch in queue for 4.19 ?
>
>> drivers/gpu/drm/virtio/virtgpu_ttm.c | 36 +-----------------------------------
>> 1 file changed, 1 insertion(+), 35 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/virtio/virtgpu_ttm.c b/drivers/gpu/drm/virtio/virtgpu_ttm.c
>> index 11f8ae5..b6f021c 100644
>> --- a/drivers/gpu/drm/virtio/virtgpu_ttm.c
>> +++ b/drivers/gpu/drm/virtio/virtgpu_ttm.c
>> @@ -106,29 +106,6 @@ static void virtio_gpu_ttm_global_fini(struct virtio_gpu_device *vgdev)
>> }
>> }
>>
>> -#if 0
>> -/*
>> - * Hmm, seems to not do anything useful. Leftover debug hack?
>> - * Something like printing pagefaults to kernel log?
>> - */
>> -static struct vm_operations_struct virtio_gpu_ttm_vm_ops;
>> -static const struct vm_operations_struct *ttm_vm_ops;
>> -
>> -static int virtio_gpu_ttm_fault(struct vm_fault *vmf)
>> -{
>> - struct ttm_buffer_object *bo;
>> - struct virtio_gpu_device *vgdev;
>> - int r;
>> -
>> - bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data;
>> - if (bo == NULL)
>> - return VM_FAULT_NOPAGE;
>> - vgdev = virtio_gpu_get_vgdev(bo->bdev);
>> - r = ttm_vm_ops->fault(vmf);
>> - return r;
>> -}
>> -#endif
>> -
>> int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma)
>> {
>> struct drm_file *file_priv;
>> @@ -143,19 +120,8 @@ int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma)
>> return -EINVAL;
>> }
>> r = ttm_bo_mmap(filp, vma, &vgdev->mman.bdev);
>> -#if 0
>> - if (unlikely(r != 0))
>> - return r;
>> - if (unlikely(ttm_vm_ops == NULL)) {
>> - ttm_vm_ops = vma->vm_ops;
>> - virtio_gpu_ttm_vm_ops = *ttm_vm_ops;
>> - virtio_gpu_ttm_vm_ops.fault = &virtio_gpu_ttm_fault;
>> - }
>> - vma->vm_ops = &virtio_gpu_ttm_vm_ops;
>> - return 0;
>> -#else
>> +
>> return r;
>> -#endif
>> }
>>
>> static int virtio_gpu_invalidate_caches(struct ttm_bo_device *bdev,
>> --
>> 1.9.1
>>
^ permalink raw reply
* Re: [PATCH v4 1/4] x86/boot: Add acpitb.h to help parse acpi tables
From: Baoquan He @ 2018-07-24 6:02 UTC (permalink / raw)
To: Chao Fan
Cc: linux-kernel, x86, hpa, tglx, mingo, keescook, yasu.isimatu,
indou.takao, caoj.fnst, douly.fnst
In-Reply-To: <20180723092908.32656-2-fanc.fnst@cn.fujitsu.com>
Hi chao,
On 07/23/18 at 05:29pm, Chao Fan wrote:
> In order to parse ACPI tables, reuse the head file linux/acpi.h,
> so that the files in 'compressed' directory can read ACPI table
> by including this head file.
>
> Signed-off-by: Chao Fan <fanc.fnst@cn.fujitsu.com>
> ---
> arch/x86/boot/compressed/acpitb.h | 7 +++++++
> 1 file changed, 7 insertions(+)
> create mode 100644 arch/x86/boot/compressed/acpitb.h
>
> diff --git a/arch/x86/boot/compressed/acpitb.h b/arch/x86/boot/compressed/acpitb.h
> new file mode 100644
> index 000000000000..f8ab6e5b3e06
> --- /dev/null
> +++ b/arch/x86/boot/compressed/acpitb.h
> @@ -0,0 +1,7 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#include <linux/acpi.h>
> +
> +#define ACPI_MAX_TABLES 128
> +
> +/* Function to get ACPI SRAT table pointer. */
> +struct acpi_table_header *get_acpi_srat_table(void);
Since acpitb.h includes so few lines of code, not sure if we can move
them into .c files directly.
By the way, you might need to rebase this patchset on top of
tip/x86/boot.
Thanks
Baoquan
^ permalink raw reply
* Re: [PATCH 3/3] arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC
From: Jisheng Zhang @ 2018-07-24 5:58 UTC (permalink / raw)
To: Rob Herring
Cc: Mark Rutland, devicetree, linux-kernel, linux-arm-kernel,
Sebastian Hesselbarth
In-Reply-To: <20180720152117.GB26487@rob-hp-laptop>
Hi Rob,
On Fri, 20 Jul 2018 09:21:17 -0600 Rob Herring wrote:
> On Fri, Jul 13, 2018 at 05:26:26PM +0800, Jisheng Zhang wrote:
> > Add initial dtsi file to support Synaptics AS370 SoC with quad
> > Cortex-A53 CPUs.
> >
> > Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
> > ---
> > arch/arm64/boot/dts/synaptics/as370.dtsi | 177 +++++++++++++++++++++++
> > 1 file changed, 177 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/synaptics/as370.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/synaptics/as370.dtsi b/arch/arm64/boot/dts/synaptics/as370.dtsi
> > new file mode 100644
> > index 000000000000..20f3d658c566
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/synaptics/as370.dtsi
> > @@ -0,0 +1,177 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (C) 2018 Synaptics Incorporated
> > + *
> > + * Author: Jisheng Zhang <jszhang@kernel.org>
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > + compatible = "syna,as370";
> > + interrupt-parent = <&gic>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + aliases {
> > + serial0 = &uart0;
>
> This normally goes in the board file. All boards will use this?
Yes. AFAIK, all boards will use uart0 as the serial console. But I could
move it to the board file.
>
> > + };
> > +
> > + psci {
> > + compatible = "arm,psci-1.0";
> > + method = "smc";
> > + };
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
> > + compatible = "arm,cortex-a53", "arm,armv8";
> > + device_type = "cpu";
> > + reg = <0x0>;
> > + enable-method = "psci";
> > + next-level-cache = <&l2>;
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + };
> > +
> > + cpu1: cpu@1 {
> > + compatible = "arm,cortex-a53", "arm,armv8";
> > + device_type = "cpu";
> > + reg = <0x1>;
> > + enable-method = "psci";
> > + next-level-cache = <&l2>;
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + };
> > +
> > + cpu2: cpu@2 {
> > + compatible = "arm,cortex-a53", "arm,armv8";
> > + device_type = "cpu";
> > + reg = <0x2>;
> > + enable-method = "psci";
> > + next-level-cache = <&l2>;
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + };
> > +
> > + cpu3: cpu@3 {
> > + compatible = "arm,cortex-a53", "arm,armv8";
> > + device_type = "cpu";
> > + reg = <0x3>;
> > + enable-method = "psci";
> > + next-level-cache = <&l2>;
> > + cpu-idle-states = <&CPU_SLEEP_0>;
> > + };
> > +
> > + l2: cache {
> > + compatible = "cache";
>
> Why do you need this node? Doesn't define
If the l2 node is missing, I will get below warning:
[ 1.364795] Unable to detect cache hierarchy for CPU 0
reported by drivers/base/cacheinfo.c
>
> > + };
> > +
> > + idle-states {
> > + entry-method = "psci";
> > + CPU_SLEEP_0: cpu-sleep-0 {
> > + compatible = "arm,idle-state";
> > + local-timer-stop;
> > + arm,psci-suspend-param = <0x0010000>;
> > + entry-latency-us = <75>;
> > + exit-latency-us = <155>;
> > + min-residency-us = <1000>;
> > + };
> > + };
> > + };
> > +
> > + osc: osc {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <25000000>;
> > + };
> > +
> > + pmu {
> > + compatible = "arm,cortex-a53-pmu";
> > + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-affinity = <&cpu0>,
> > + <&cpu1>,
> > + <&cpu2>,
> > + <&cpu3>;
> > + };
> > +
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> > + };
> > +
> > + soc@f7000000 {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0 0xf7000000 0x1000000>;
> > +
> > + gic: interrupt-controller@901000 {
> > + compatible = "arm,gic-400";
> > + #interrupt-cells = <3>;
> > + interrupt-controller;
> > + reg = <0x901000 0x1000>,
> > + <0x902000 0x2000>,
> > + <0x904000 0x2000>,
> > + <0x906000 0x2000>;
> > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> > + };
> > +
> > + apb@e80000 {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 0xe80000 0x10000>;
> > +
> > + uart0: uart@0c00 {
>
> serial@c00
will do in v2
Thanks a lot
^ permalink raw reply
* [net-next v6 0/2] Minor code cleanup patches
From: Vakul Garg @ 2018-07-24 10:14 UTC (permalink / raw)
To: netdev; +Cc: borisp, aviadye, davejwatson, davem, Vakul Garg
This patch series improves tls_sw.c code by:
1) Using correct socket callback for flagging data availability.
2) Removing redundant variable assignments and wakeup callbacks.
Vakul Garg (2):
net/tls: Use socket data_ready callback on record availability
net/tls: Remove redundant variable assignments and wakeup
net/tls/tls_sw.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
--
2.13.6
^ permalink raw reply
* data corruption with 'splt' workload to XFS on DM cache with its 3 underlying devices being on same NVMe device
From: Hannes Reinecke @ 2018-07-24 6:00 UTC (permalink / raw)
In-Reply-To: <20180723163357.GA29658@redhat.com>
On 07/23/2018 06:33 PM, Mike Snitzer wrote:
> Hi,
>
> I've opened the following public BZ:
> https://bugzilla.redhat.com/show_bug.cgi?id=1607527
>
> Feel free to add comments to that BZ if you have a redhat bugzilla
> account.
>
> But otherwise, happy to get as much feedback and discussion going purely
> on the relevant lists. I've taken ~1.5 weeks to categorize and isolate
> this issue. But I've reached a point where I'm getting diminishing
> returns and could _really_ use the collective eyeballs and expertise of
> the community. This is by far one of the most nasty cases of corruption
> I've seen in a while. Not sure where the ultimate cause of corruption
> lies (that the money question) but it _feels_ rooted in NVMe and is
> unique to this particular workload I've stumbled onto via customer
> escalation and then trying to replicate an rbd device using a more
> approachable one (request-based DM multipath in this case).
>
I might be stating the obvious, but so far we only have considered
request-based multipath as being active for the _entire_ device.
To my knowledge we've never tested that when running on a partition.
So, have you tested that request-based multipathing works on a partition
_at all_? I'm not sure if partition mapping is done correctly here; we
never remap the start of the request (nor bio, come to speak of it), so
it looks as if we would be doing the wrong things here.
Have you checked that partition remapping is done correctly?
Cheers,
Hannes
^ permalink raw reply
* Re: data corruption with 'splt' workload to XFS on DM cache with its 3 underlying devices being on same NVMe device
From: Hannes Reinecke @ 2018-07-24 6:00 UTC (permalink / raw)
To: Mike Snitzer, linux-nvme, linux-block, dm-devel
In-Reply-To: <20180723163357.GA29658@redhat.com>
On 07/23/2018 06:33 PM, Mike Snitzer wrote:
> Hi,
>
> I've opened the following public BZ:
> https://bugzilla.redhat.com/show_bug.cgi?id=1607527
>
> Feel free to add comments to that BZ if you have a redhat bugzilla
> account.
>
> But otherwise, happy to get as much feedback and discussion going purely
> on the relevant lists. I've taken ~1.5 weeks to categorize and isolate
> this issue. But I've reached a point where I'm getting diminishing
> returns and could _really_ use the collective eyeballs and expertise of
> the community. This is by far one of the most nasty cases of corruption
> I've seen in a while. Not sure where the ultimate cause of corruption
> lies (that the money question) but it _feels_ rooted in NVMe and is
> unique to this particular workload I've stumbled onto via customer
> escalation and then trying to replicate an rbd device using a more
> approachable one (request-based DM multipath in this case).
>
I might be stating the obvious, but so far we only have considered
request-based multipath as being active for the _entire_ device.
To my knowledge we've never tested that when running on a partition.
So, have you tested that request-based multipathing works on a partition
_at all_? I'm not sure if partition mapping is done correctly here; we
never remap the start of the request (nor bio, come to speak of it), so
it looks as if we would be doing the wrong things here.
Have you checked that partition remapping is done correctly?
Cheers,
Hannes
^ permalink raw reply
* [Buildroot] [autobuild.buildroot.net] Build results for 2018-07-23
From: Thomas Petazzoni @ 2018-07-24 6:00 UTC (permalink / raw)
To: buildroot
Hello,
Build statistics for 2018-07-23
===============================
branch | OK | NOK | TIM | TOT |
2018.02.x | 13 | 0 | 0 | 13 |
2018.05.x | 14 | 2 | 0 | 16 |
master | 123 | 37 | 0 | 160 |
Results for branch '2018.05.x'
==============================
Classification of failures by reason
------------------------------------
qt-4.8.7 | 1
quagga-1.1.1 | 1
Detail of failures
------------------
powerpc | qt-4.8.7 | NOK | http://autobuild.buildroot.net/results/7c704d22ce6e72f91833975915983d234b09f664 | ORPH
arm | quagga-1.1.1 | NOK | http://autobuild.buildroot.net/results/350e135f179a198cfecfca1be14345c6e94af1c9 | ORPH
Results for branch 'master'
===========================
Classification of failures by reason
------------------------------------
gnuradio-3.7.13.3 | 8
boost-1.67.0 | 7
libostree-2018.7 | 5
libmpeg2-0.5.1 | 3
samba4-4.8.3 | 3
linuxptp-303b08cbf55096aba5... | 2
perl-net-ssh2-0.69 | 2
busybox-1.29.1 | 1
cutelyst-2.5.1 | 1
host-m4-1.4.18 | 1
host-waylandpp-0.2.3 | 1
libnss-3.38 | 1
mono-5.12.0.226 | 1
wiringpi-2.46 | 1
Detail of failures
------------------
sparc | boost-1.67.0 | NOK | http://autobuild.buildroot.net/results/20b54d0d84b98af3fb64f3452be47005f441fe42 |
sparc | boost-1.67.0 | NOK | http://autobuild.buildroot.net/results/c49c36abbacda358f21f6565d1b5851137417469 |
i686 | boost-1.67.0 | NOK | http://autobuild.buildroot.net/results/57c9d63c8e95cecc464b18d5f076329e4ab6ac12 |
arc | boost-1.67.0 | NOK | http://autobuild.buildroot.net/results/07a75279cf75ed42233edaaffca709902ccda58b |
powerpc | boost-1.67.0 | NOK | http://autobuild.buildroot.net/results/462a886dec36071d1ebe21a486d9c8b55b7b28e2 |
arm | boost-1.67.0 | NOK | http://autobuild.buildroot.net/results/dde4c5e91302cb6bbc09be7816ea79683fd9d960 |
x86_64 | boost-1.67.0 | NOK | http://autobuild.buildroot.net/results/4456efcfa802c3cdfee15414af80acec15e7e7d7 |
mips64el | busybox-1.29.1 | NOK | http://autobuild.buildroot.net/results/b2676ba950f27db1a6599d20becc1e6f8be58f70 |
i686 | cutelyst-2.5.1 | NOK | http://autobuild.buildroot.net/results/7716878c3a26b93417188ad7eac91ace172815bb |
arc | gnuradio-3.7.13.3 | NOK | http://autobuild.buildroot.net/results/e30c14a885477467c7c08cdeaee752c4a440c40c |
sparc | gnuradio-3.7.13.3 | NOK | http://autobuild.buildroot.net/results/cde570ebd60409f4f1567c85934b7cbf2710b83c |
arm | gnuradio-3.7.13.3 | NOK | http://autobuild.buildroot.net/results/83151324e1442b39c8246428e3f2dad49b52b3b6 |
arm | gnuradio-3.7.13.3 | NOK | http://autobuild.buildroot.net/results/1df5b4c48ef59baa4db1a2a0816a9bc8353a4f18 |
mips64el | gnuradio-3.7.13.3 | NOK | http://autobuild.buildroot.net/results/98181b08896568b4ce81107d4589ac0838ecd45c |
aarch64_be | gnuradio-3.7.13.3 | NOK | http://autobuild.buildroot.net/results/fe3ba888d01a242a294bbb8bdb4acbf5e7a4140d |
arm | gnuradio-3.7.13.3 | NOK | http://autobuild.buildroot.net/results/d5839cdcc4fde49bec9decaa0cdeb1e7271b35c4 |
mips64el | gnuradio-3.7.13.3 | NOK | http://autobuild.buildroot.net/results/b476e026d65b1e059a0e5175d873d7f4f0525c3c |
arm | host-m4-1.4.18 | NOK | http://autobuild.buildroot.net/results/f55cb75792a7abb80cfcd363a0a4192f17dd902b | ORPH
mips64el | host-waylandpp-0.2.3 | NOK | http://autobuild.buildroot.net/results/8c62bc30a5078e709625509dbbdcc49489a438e7 |
powerpc | libmpeg2-0.5.1 | NOK | http://autobuild.buildroot.net/results/03960c0f132b4652e4b80a1e4eac41d2952f2249 | ORPH
powerpc | libmpeg2-0.5.1 | NOK | http://autobuild.buildroot.net/results/d4135ac514305debc1a4db8e23b75506ff713ab1 | ORPH
powerpc | libmpeg2-0.5.1 | NOK | http://autobuild.buildroot.net/results/2cb164f3a611ef843fef0a4c864d8d79883da9f6 | ORPH
aarch64_be | libnss-3.38 | NOK | http://autobuild.buildroot.net/results/0e2833be3c0a835ad606f772d1490c2102b4a332 |
nios2 | libostree-2018.7 | NOK | http://autobuild.buildroot.net/results/5d03d4807f334f5bc0ea487d274b3be6dd8efe78 |
i686 | libostree-2018.7 | NOK | http://autobuild.buildroot.net/results/eaf57980cee5d718fdbed91736db446bb08755c1 |
sparc | libostree-2018.7 | NOK | http://autobuild.buildroot.net/results/d6d302c0c107340a3af972442c4b68f0e23b8bbb |
m68k | libostree-2018.7 | NOK | http://autobuild.buildroot.net/results/e4b1a820a9fa0fb0741bfd26e9c4826858021a4f |
mips64el | libostree-2018.7 | NOK | http://autobuild.buildroot.net/results/00a9ba2f3ba353595fae357e2ca618391b79823a |
arm | linuxptp-303b08cbf55096aba5... | NOK | http://autobuild.buildroot.net/results/cf54d51e8df04e6f463d82cbaa076866724c3a38 |
m68k | linuxptp-303b08cbf55096aba5... | NOK | http://autobuild.buildroot.net/results/89f73abcb2077d8ea127aa0fa957a2e8e0465daf |
mipsel | mono-5.12.0.226 | NOK | http://autobuild.buildroot.net/results/f3fd8d2ec027adfaf36d7b446a52133ec8ebac9f |
microblazeel | perl-net-ssh2-0.69 | NOK | http://autobuild.buildroot.net/results/86ee10831afcee3dddbc1de35fc4fa76a5fff9f6 |
arc | perl-net-ssh2-0.69 | NOK | http://autobuild.buildroot.net/results/29c2e52c054e403e361678e7be9255e16686fdf0 |
arc | samba4-4.8.3 | NOK | http://autobuild.buildroot.net/results/37af0dee9f10a1fe990840a83b94b765ac9c5cbe |
mips64el | samba4-4.8.3 | NOK | http://autobuild.buildroot.net/results/7d643e1c28ff8816c24aacb4c287cacaff0a3fa6 |
xtensa | samba4-4.8.3 | NOK | http://autobuild.buildroot.net/results/9e4ccdeaa7e1805737a5b86210307b3829313fc3 |
xtensa | wiringpi-2.46 | NOK | http://autobuild.buildroot.net/results/1d0b4aaa85e671e01ed4bf68f785f3659d163017 |
--
http://autobuild.buildroot.net
^ permalink raw reply
* [net-next v6 2/2] net/tls: Remove redundant variable assignments and wakeup
From: Vakul Garg @ 2018-07-24 10:14 UTC (permalink / raw)
To: netdev; +Cc: borisp, aviadye, davejwatson, davem, Vakul Garg
In-Reply-To: <20180724101403.27040-1-vakul.garg@nxp.com>
In function decrypt_skb_update(), the assignment to tls receive context
variable 'decrypted' is redundant as the same is being done in function
tls_sw_recvmsg() after calling decrypt_skb_update(). Also calling callback
function to wakeup processes sleeping on socket data availability is
useless as decrypt_skb_update() is invoked from user processes only. This
patch cleans these up.
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
---
net/tls/tls_sw.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/net/tls/tls_sw.c b/net/tls/tls_sw.c
index fee1240eff92..6c71da7b147f 100644
--- a/net/tls/tls_sw.c
+++ b/net/tls/tls_sw.c
@@ -679,8 +679,6 @@ static int decrypt_skb_update(struct sock *sk, struct sk_buff *skb,
rxm->offset += tls_ctx->rx.prepend_size;
rxm->full_len -= tls_ctx->rx.overhead_size;
tls_advance_record_sn(sk, &tls_ctx->rx);
- ctx->decrypted = true;
- ctx->saved_data_ready(sk);
return err;
}
--
2.13.6
^ permalink raw reply related
* [net-next v6 1/2] net/tls: Use socket data_ready callback on record availability
From: Vakul Garg @ 2018-07-24 10:14 UTC (permalink / raw)
To: netdev; +Cc: borisp, aviadye, davejwatson, davem, Vakul Garg
In-Reply-To: <20180724101403.27040-1-vakul.garg@nxp.com>
On receipt of a complete tls record, use socket's saved data_ready
callback instead of state_change callback.
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
---
net/tls/tls_sw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/tls/tls_sw.c b/net/tls/tls_sw.c
index 0c2d029c9d4c..fee1240eff92 100644
--- a/net/tls/tls_sw.c
+++ b/net/tls/tls_sw.c
@@ -1028,7 +1028,7 @@ static void tls_queue(struct strparser *strp, struct sk_buff *skb)
ctx->recv_pkt = skb;
strp_pause(strp);
- strp->sk->sk_state_change(strp->sk);
+ ctx->saved_data_ready(strp->sk);
}
static void tls_data_ready(struct sock *sk)
--
2.13.6
^ permalink raw reply related
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