* [net-next 05/15] net/mlx5: E-switch, Reduce dependency on num_vfs during mode set
From: Saeed Mahameed @ 2020-07-16 21:33 UTC (permalink / raw)
To: David S. Miller, Jakub Kicinski
Cc: netdev, Parav Pandit, Roi Dayan, Saeed Mahameed
In-Reply-To: <20200716213321.29468-1-saeedm@mellanox.com>
From: Parav Pandit <parav@mellanox.com>
Currently only ECPF allows enabling eswitch when SR-IOV is disabled.
Enable PF also to enable eswitch when SR-IOV is disabled.
Load VF vports when eswitch is already enabled.
Signed-off-by: Parav Pandit <parav@mellanox.com>
Reviewed-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c | 13 ++++++++++++-
.../ethernet/mellanox/mlx5/core/eswitch_offloads.c | 14 +-------------
2 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
index c181f6b63f597..e8f900e9577e9 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
@@ -1652,7 +1652,17 @@ int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs)
return 0;
mutex_lock(&esw->mode_lock);
- ret = mlx5_eswitch_enable_locked(esw, MLX5_ESWITCH_LEGACY, num_vfs);
+ if (esw->mode == MLX5_ESWITCH_NONE) {
+ ret = mlx5_eswitch_enable_locked(esw, MLX5_ESWITCH_LEGACY, num_vfs);
+ } else {
+ enum mlx5_eswitch_vport_event vport_events;
+
+ vport_events = (esw->mode == MLX5_ESWITCH_LEGACY) ?
+ MLX5_LEGACY_SRIOV_VPORT_EVENTS : MLX5_VPORT_UC_ADDR_CHANGE;
+ ret = mlx5_eswitch_load_vf_vports(esw, num_vfs, vport_events);
+ if (!ret)
+ esw->esw_funcs.num_vfs = num_vfs;
+ }
mutex_unlock(&esw->mode_lock);
return ret;
}
@@ -1699,6 +1709,7 @@ void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf)
mutex_lock(&esw->mode_lock);
mlx5_eswitch_disable_locked(esw, clear_vf);
+ esw->esw_funcs.num_vfs = 0;
mutex_unlock(&esw->mode_lock);
}
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
index 74a2b76c7c078..db856d70c4f8f 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
@@ -1578,13 +1578,6 @@ static int esw_offloads_start(struct mlx5_eswitch *esw,
{
int err, err1;
- if (esw->mode != MLX5_ESWITCH_LEGACY &&
- !mlx5_core_is_ecpf_esw_manager(esw->dev)) {
- NL_SET_ERR_MSG_MOD(extack,
- "Can't set offloads mode, SRIOV legacy not enabled");
- return -EINVAL;
- }
-
mlx5_eswitch_disable_locked(esw, false);
err = mlx5_eswitch_enable_locked(esw, MLX5_ESWITCH_OFFLOADS,
esw->dev->priv.sriov.num_vfs);
@@ -2293,7 +2286,7 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
{
u16 cur_mlx5_mode, mlx5_mode = 0;
struct mlx5_eswitch *esw;
- int err;
+ int err = 0;
esw = mlx5_devlink_eswitch_get(devlink);
if (IS_ERR(esw))
@@ -2303,12 +2296,7 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
return -EINVAL;
mutex_lock(&esw->mode_lock);
- err = eswitch_devlink_esw_mode_check(esw);
- if (err)
- goto unlock;
-
cur_mlx5_mode = esw->mode;
-
if (cur_mlx5_mode == mlx5_mode)
goto unlock;
--
2.26.2
^ permalink raw reply related
* [net-next 04/15] net/mlx5: E-switch, Avoid function change handler for non ECPF
From: Saeed Mahameed @ 2020-07-16 21:33 UTC (permalink / raw)
To: David S. Miller, Jakub Kicinski
Cc: netdev, Parav Pandit, Roi Dayan, Saeed Mahameed
In-Reply-To: <20200716213321.29468-1-saeedm@mellanox.com>
From: Parav Pandit <parav@mellanox.com>
for non ECPF eswitch manager function, vports are already
enabled/disabled when eswitch is enabled/disabled respectively.
Simplify function change handler for such eswitch manager function.
Therefore, ECPF is the only one which remains PF/VF function change
handler.
Signed-off-by: Parav Pandit <parav@mellanox.com>
Reviewed-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h | 11 ++---------
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
index 522cadc09149a..b68e02ad65e26 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
@@ -513,16 +513,9 @@ static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev)
MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF;
}
-static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev)
+static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev)
{
- /* Ideally device should have the functions changed supported
- * capability regardless of it being ECPF or PF wherever such
- * event should be processed such as on eswitch manager device.
- * However, some ECPF based device might not have this capability
- * set. Hence OR for ECPF check to cover such device.
- */
- return MLX5_CAP_ESW(dev, esw_functions_changed) ||
- mlx5_core_is_ecpf_esw_manager(dev);
+ return mlx5_core_is_ecpf_esw_manager(dev);
}
static inline int mlx5_eswitch_uplink_idx(struct mlx5_eswitch *esw)
--
2.26.2
^ permalink raw reply related
* [net-next 03/15] net/mlx5: Make MLX5_EN_TLS non-prompt
From: Saeed Mahameed @ 2020-07-16 21:33 UTC (permalink / raw)
To: David S. Miller, Jakub Kicinski
Cc: netdev, Tariq Toukan, Raed Salem, Boris Pismenny, Saeed Mahameed
In-Reply-To: <20200716213321.29468-1-saeedm@mellanox.com>
From: Tariq Toukan <tariqt@mellanox.com>
TLS runs only over Eth, and the Eth driver is the only user of
the core TLS functionality.
There is no meaning of having the core functionality without the usage
in Eth driver.
Hence, let both TLS core implementations depend on MLX5_CORE_EN,
and select MLX5_EN_TLS.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Reviewed-by: Raed Salem <raeds@mellanox.com>
Reviewed-by: Boris Pismenny <borisp@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
drivers/net/ethernet/mellanox/mlx5/core/Kconfig | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig
index 76b39659c39b2..7d7148c9b7440 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig
+++ b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig
@@ -150,7 +150,10 @@ config MLX5_FPGA_TLS
bool "Mellanox Technologies TLS Innova support"
depends on TLS_DEVICE
depends on TLS=y || MLX5_CORE=m
+ depends on MLX5_CORE_EN
depends on MLX5_FPGA
+ depends on XPS
+ select MLX5_EN_TLS
default n
help
Build TLS support for the Innova family of network cards by Mellanox
@@ -161,21 +164,19 @@ config MLX5_FPGA_TLS
config MLX5_TLS
bool "Mellanox Technologies TLS Connect-X support"
- depends on MLX5_CORE_EN
depends on TLS_DEVICE
depends on TLS=y || MLX5_CORE=m
+ depends on MLX5_CORE_EN
+ depends on XPS
select MLX5_ACCEL
+ select MLX5_EN_TLS
default n
help
Build TLS support for the Connect-X family of network cards by Mellanox
Technologies.
config MLX5_EN_TLS
- bool "TLS cryptography-offload accelaration"
- depends on MLX5_CORE_EN
- depends on XPS
- depends on MLX5_FPGA_TLS || MLX5_TLS
- default y
+ bool
help
Build support for TLS cryptography-offload accelaration in the NIC.
Note: Support for hardware with this capability needs to be selected
--
2.26.2
^ permalink raw reply related
* [net-next 02/15] net/mlx5e: Fix build break when CONFIG_XPS is not set
From: Saeed Mahameed @ 2020-07-16 21:33 UTC (permalink / raw)
To: David S. Miller, Jakub Kicinski; +Cc: netdev, Saeed Mahameed, Randy Dunlap
In-Reply-To: <20200716213321.29468-1-saeedm@mellanox.com>
mlx5e_accel_sk_get_rxq is only used in ktls_rx.c file which already
depends on XPS to be compiled, move it from the generic en_accel.h
header to be local in ktls_rx.c, to fix the below build break
In file included from
../drivers/net/ethernet/mellanox/mlx5/core/en_main.c:49:0:
../drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h:
In function ‘mlx5e_accel_sk_get_rxq’:
../drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h:153:12:
error: implicit declaration of function ‘sk_rx_queue_get’ ...
int rxq = sk_rx_queue_get(sk);
^~~~~~~~~~~~~~~
Fixes: 1182f3659357 ("net/mlx5e: kTLS, Add kTLS RX HW offload support")
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
---
.../ethernet/mellanox/mlx5/core/en_accel/en_accel.h | 10 ----------
.../ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c | 12 +++++++++++-
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h
index 7b6abea850d44..110476bdeffbc 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h
@@ -148,16 +148,6 @@ static inline bool mlx5e_accel_tx_finish(struct mlx5e_priv *priv,
return true;
}
-static inline int mlx5e_accel_sk_get_rxq(struct sock *sk)
-{
- int rxq = sk_rx_queue_get(sk);
-
- if (unlikely(rxq == -1))
- rxq = 0;
-
- return rxq;
-}
-
static inline int mlx5e_accel_init_rx(struct mlx5e_priv *priv)
{
return mlx5e_ktls_init_rx(priv);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
index d7215defd4036..acf6d80a6bb7b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
@@ -547,6 +547,16 @@ void mlx5e_ktls_handle_ctx_completion(struct mlx5e_icosq_wqe_info *wi)
queue_work(rule->priv->tls->rx_wq, &rule->work);
}
+static int mlx5e_ktls_sk_get_rxq(struct sock *sk)
+{
+ int rxq = sk_rx_queue_get(sk);
+
+ if (unlikely(rxq == -1))
+ rxq = 0;
+
+ return rxq;
+}
+
int mlx5e_ktls_add_rx(struct net_device *netdev, struct sock *sk,
struct tls_crypto_info *crypto_info,
u32 start_offload_tcp_sn)
@@ -573,7 +583,7 @@ int mlx5e_ktls_add_rx(struct net_device *netdev, struct sock *sk,
priv_rx->crypto_info =
*(struct tls12_crypto_info_aes_gcm_128 *)crypto_info;
- rxq = mlx5e_accel_sk_get_rxq(sk);
+ rxq = mlx5e_ktls_sk_get_rxq(sk);
priv_rx->rxq = rxq;
priv_rx->sk = sk;
--
2.26.2
^ permalink raw reply related
* [net-next 01/15] net/mlx5e: Fix missing switch_id for representors
From: Saeed Mahameed @ 2020-07-16 21:33 UTC (permalink / raw)
To: David S. Miller, Jakub Kicinski
Cc: netdev, Parav Pandit, Roi Dayan, Saeed Mahameed
In-Reply-To: <20200716213321.29468-1-saeedm@mellanox.com>
From: Parav Pandit <parav@mellanox.com>
Cited commit in fixes tag missed to set the switch id of the PF and VF
ports. Due to this flow cannot be offloaded, a simple command like below
fails to offload with below error.
tc filter add dev ens2f0np0 parent ffff: prio 1 flower \
dst_mac 00:00:00:00:00:00/00:00:00:00:00:00 skip_sw \
action mirred egress redirect dev ens2f0np0pf0vf0
Error: mlx5_core: devices are not on same switch HW, can't offload forwarding.
Hence, fix it by setting switch id for each PF and VF representors port
as before the cited commit.
Fixes: 71ad8d55f8e5 ("devlink: Replace devlink_port_attrs_set parameters with a struct")
Signed-off-by: Parav Pandit <parav@mellanox.com>
Reviewed-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
.../net/ethernet/mellanox/mlx5/core/en_rep.c | 20 +++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
index 0a69f10ac30c9..c300729fb498e 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
@@ -1196,18 +1196,22 @@ static int register_devlink_port(struct mlx5_core_dev *dev,
mlx5e_rep_get_port_parent_id(rpriv->netdev, &ppid);
dl_port_index = mlx5_esw_vport_to_devlink_port_index(dev, rep->vport);
pfnum = PCI_FUNC(dev->pdev->devfn);
- attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
- attrs.phys.port_number = pfnum;
- memcpy(attrs.switch_id.id, &ppid.id[0], ppid.id_len);
- attrs.switch_id.id_len = ppid.id_len;
- if (rep->vport == MLX5_VPORT_UPLINK)
+ if (rep->vport == MLX5_VPORT_UPLINK) {
+ attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
+ attrs.phys.port_number = pfnum;
+ memcpy(attrs.switch_id.id, &ppid.id[0], ppid.id_len);
+ attrs.switch_id.id_len = ppid.id_len;
devlink_port_attrs_set(&rpriv->dl_port, &attrs);
- else if (rep->vport == MLX5_VPORT_PF)
+ } else if (rep->vport == MLX5_VPORT_PF) {
+ memcpy(rpriv->dl_port.attrs.switch_id.id, &ppid.id[0], ppid.id_len);
+ rpriv->dl_port.attrs.switch_id.id_len = ppid.id_len;
devlink_port_attrs_pci_pf_set(&rpriv->dl_port, pfnum);
- else if (mlx5_eswitch_is_vf_vport(dev->priv.eswitch, rpriv->rep->vport))
+ } else if (mlx5_eswitch_is_vf_vport(dev->priv.eswitch, rpriv->rep->vport)) {
+ memcpy(rpriv->dl_port.attrs.switch_id.id, &ppid.id[0], ppid.id_len);
+ rpriv->dl_port.attrs.switch_id.id_len = ppid.id_len;
devlink_port_attrs_pci_vf_set(&rpriv->dl_port,
pfnum, rep->vport - 1);
-
+ }
return devlink_port_register(devlink, &rpriv->dl_port, dl_port_index);
}
--
2.26.2
^ permalink raw reply related
* [pull request][net-next 00/15] mlx5 updates 2020-07-16
From: Saeed Mahameed @ 2020-07-16 21:33 UTC (permalink / raw)
To: David S. Miller, Jakub Kicinski; +Cc: netdev, Saeed Mahameed
Hi Dave, Jakub,
This patchset includes mlx5 RX XFRM ipsec offloads for ConnectX devices
and some other misc updates and fixes to net-next.
For more information please see tag log below.
Please pull and let me know if there is any problem.
Thanks,
Saeed.
---
The following changes since commit 89e35f66d552c98c1cfee4a058de158d7f21796a:
net: mscc: ocelot: rethink Kconfig dependencies again (2020-07-16 12:46:00 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux.git tags/mlx5-updates-2020-07-16
for you to fetch changes up to 3e6ae272202e418f8184caa71b3fc37b62fb921e:
net/mlx5e: CT: Map 128 bits labels to 32 bit map ID (2020-07-16 14:28:20 -0700)
----------------------------------------------------------------
mlx5-updates-2020-07-16
Fixes:
1) Fix build break when CONFIG_XPS is not set
2) Fix missing switch_id for representors
Updates:
1) IPsec XFRM RX offloads from Raed and Huy.
- Added IPSec RX steering flow tables to NIC RX
- Refactoring of the existing FPGA IPSec, to add support
for ConnectX IPsec.
- RX data path handling for IPSec traffic
- Synchronize offloading device ESN with xfrm received SN
2) Parav allows E-Switch to siwtch to switchdev mode directly without
the need to go through legacy mode first.
3) From Tariq, Misc updates including:
3.1) indirect calls for RX and XDP handlers
3.2) Make MLX5_EN_TLS non-prompt as it should always be enabled when
TLS and MLX5_EN are selected.
----------------------------------------------------------------
Eli Britstein (1):
net/mlx5e: CT: Map 128 bits labels to 32 bit map ID
Huy Nguyen (2):
net/mlx5: Add IPsec related Flow steering entry's fields
net/mlx5e: IPsec: Add IPsec steering in local NIC RX
Parav Pandit (3):
net/mlx5e: Fix missing switch_id for representors
net/mlx5: E-switch, Avoid function change handler for non ECPF
net/mlx5: E-switch, Reduce dependency on num_vfs during mode set
Raed Salem (4):
net/mlx5: Accel, Add core IPsec support for the Connect-X family
net/mlx5: IPsec: Add HW crypto offload support
net/mlx5e: IPsec: Add Connect-X IPsec Rx data path offload
net/mlx5e: IPsec: Add Connect-X IPsec ESN update offload support
Saeed Mahameed (1):
net/mlx5e: Fix build break when CONFIG_XPS is not set
Tariq Toukan (4):
net/mlx5: Make MLX5_EN_TLS non-prompt
net/mlx5e: XDP, Avoid indirect call in TX flow
net/mlx5e: RX, Avoid indirect call in representor CQE handling
net/mlx5e: Do not request completion on every single UMR WQE
drivers/net/ethernet/mellanox/mlx5/core/Kconfig | 28 +-
drivers/net/ethernet/mellanox/mlx5/core/Makefile | 3 +-
.../net/ethernet/mellanox/mlx5/core/accel/ipsec.c | 108 ++--
.../net/ethernet/mellanox/mlx5/core/accel/ipsec.h | 45 +-
.../mellanox/mlx5/core/accel/ipsec_offload.c | 385 +++++++++++++++
.../mellanox/mlx5/core/accel/ipsec_offload.h | 38 ++
.../net/ethernet/mellanox/mlx5/core/accel/tls.c | 4 +-
drivers/net/ethernet/mellanox/mlx5/core/en/fs.h | 6 +-
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c | 59 ++-
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h | 3 +
drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c | 36 +-
.../net/ethernet/mellanox/mlx5/core/en/xsk/tx.c | 22 +-
.../mellanox/mlx5/core/en_accel/en_accel.h | 10 -
.../ethernet/mellanox/mlx5/core/en_accel/ipsec.c | 47 +-
.../ethernet/mellanox/mlx5/core/en_accel/ipsec.h | 10 +
.../mellanox/mlx5/core/en_accel/ipsec_fs.c | 544 +++++++++++++++++++++
.../mellanox/mlx5/core/en_accel/ipsec_fs.h | 26 +
.../mellanox/mlx5/core/en_accel/ipsec_rxtx.c | 56 +++
.../mellanox/mlx5/core/en_accel/ipsec_rxtx.h | 22 +-
.../ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c | 12 +-
drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 5 +-
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 20 +-
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 15 +-
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 3 +-
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c | 13 +-
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h | 11 +-
.../ethernet/mellanox/mlx5/core/eswitch_offloads.c | 14 +-
.../net/ethernet/mellanox/mlx5/core/fpga/ipsec.c | 51 +-
.../net/ethernet/mellanox/mlx5/core/fpga/ipsec.h | 37 +-
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c | 2 +
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c | 2 +-
drivers/net/ethernet/mellanox/mlx5/core/fw.c | 6 +
.../net/ethernet/mellanox/mlx5/core/lib/crypto.c | 5 +-
drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h | 8 +-
drivers/net/ethernet/mellanox/mlx5/core/main.c | 9 +-
include/linux/mlx5/accel.h | 6 +-
include/linux/mlx5/driver.h | 3 +
include/linux/mlx5/fs.h | 5 +-
include/linux/mlx5/mlx5_ifc.h | 12 +-
39 files changed, 1480 insertions(+), 211 deletions(-)
create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec_offload.c
create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec_offload.h
create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c
create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.h
^ permalink raw reply
* [Buildroot] [PATCH 1/1] package/libnftnl: bump to version 1.1.7
From: Fabrice Fontaine @ 2020-07-16 21:33 UTC (permalink / raw)
To: buildroot
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
---
package/libnftnl/libnftnl.hash | 2 +-
package/libnftnl/libnftnl.mk | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/package/libnftnl/libnftnl.hash b/package/libnftnl/libnftnl.hash
index 0114619089..f22b02af09 100644
--- a/package/libnftnl/libnftnl.hash
+++ b/package/libnftnl/libnftnl.hash
@@ -1,3 +1,3 @@
# From http://www.netfilter.org/projects/libnftnl/downloads.html
-sha256 c1eb5a696fc1d4b3b412770586017bc01af93da3ddd25233d34a62979dee1eca libnftnl-1.1.6.tar.bz2
+sha256 20dbc13f11004aea2c9e479cfb90359cb11fe3446c3140811c18e4ec1648ed8f libnftnl-1.1.7.tar.bz2
sha256 98193898c663001eff2fdcfb676e210c13042bc1a05e8d570c363efa396f8e24 COPYING
diff --git a/package/libnftnl/libnftnl.mk b/package/libnftnl/libnftnl.mk
index f624474196..f4487bdebe 100644
--- a/package/libnftnl/libnftnl.mk
+++ b/package/libnftnl/libnftnl.mk
@@ -4,7 +4,7 @@
#
################################################################################
-LIBNFTNL_VERSION = 1.1.6
+LIBNFTNL_VERSION = 1.1.7
LIBNFTNL_SITE = https://netfilter.org/projects/libnftnl/files
LIBNFTNL_SOURCE = libnftnl-$(LIBNFTNL_VERSION).tar.bz2
LIBNFTNL_LICENSE = GPL-2.0+
--
2.27.0
^ permalink raw reply related
* Re: [patch V3 08/13] x86/entry: Use generic syscall entry function
From: Thomas Gleixner @ 2020-07-16 21:33 UTC (permalink / raw)
To: Kees Cook
Cc: LKML, x86, linux-arch, Will Deacon, Arnd Bergmann, Mark Rutland,
Keno Fischer, Paolo Bonzini, kvm
In-Reply-To: <202007161359.AB211685@keescook>
Kees Cook <keescook@chromium.org> writes:
> On Thu, Jul 16, 2020 at 08:22:16PM +0200, Thomas Gleixner wrote:
>> +}
>> +#define arch_check_user_regs arch_check_user_regs
>
> Will architectures implement subsets of these functions? (i.e. instead
> of each of the defines, is CONFIG_ENTRY_GENERIC sufficient for the
> no-op inlines?)
Yes, some of these are optional as far as my analysis of the
architecture code went.
>> +}
>> +#define arch_syscall_enter_seccomp arch_syscall_enter_seccomp
>
> Actually, I've been meaning to clean this up. It's not needed at all.
> This was left over from the seccomp fast-path code that got ripped out a
> while ago. seccomp already has everything it needs to do this work, so
> just:
>
> __secure_computing(NULL);
>
> is sufficient for every architecture that supports seccomp. (See kernel/seccomp.c
> populate_seccomp_data().)
Nice. Was not aware of these details. Trivial enough to fix :)
> And if you want more generalization work, note that the secure_computing()
> macro performs a TIF test before calling __secure_computing(NULL). But
> my point is, I think arch_syscall_enter_seccomp() is not needed.
Cute. One horror gone.
>> +static inline void arch_syscall_enter_audit(struct pt_regs *regs)
>> +{
>> +#ifdef CONFIG_X86_64
>> + if (in_ia32_syscall()) {
>> + audit_syscall_entry(regs->orig_ax, regs->di,
>> + regs->si, regs->dx, regs->r10);
>> + } else
>> +#endif
>> + {
>> + audit_syscall_entry(regs->orig_ax, regs->bx,
>> + regs->cx, regs->dx, regs->si);
>> + }
>> +}
>> +#define arch_syscall_enter_audit arch_syscall_enter_audit
>
> Similarly, I think these can be redefined in the generic case
> using the existing accessors for syscall arguments, etc. e.g.
> arch_syscall_enter_audit() is not needed for any architecture, and the
> generic is:
>
> unsigned long args[6];
>
> syscall_get_arguments(task, regs, args);
> audit_syscall_entry(syscall_get_nr(current, regs),
> args[0], args[1], args[2], args[3]);
Nice. Another arch specific mess gone.
Thanks,
tglx
^ permalink raw reply
* [PATCH] media: dvb_usb_pctv452e: use ISL6423 voltage regulator per default
From: Alex Bee @ 2020-07-16 21:33 UTC (permalink / raw)
To: linux-media
Cc: Alex Bee, linux-kernel, Arnd Bergmann, Sean Young,
Mauro Carvalho Chehab
Both TT-connect S2-3600 and Pinnacle PCTV Sat HDTV are using
Intersil ISL6423 as LNB voltage regulator. This makes
TT-connect S2-3650 CI the only device which uses STM LNBP22 regulator
which is currently used for all devices driven by pctv452e driver.
This patch fixes this by creating an exception for TT-connect S2-3650 CI
to continue to use STM LNBP22 while all others now using correct ISL6423
driver which makes DiSEqC/EN50494 comands which involve voltage changes
now working on the other devices (which didn't work before).
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/media/usb/dvb-usb/Kconfig | 1 +
drivers/media/usb/dvb-usb/pctv452e.c | 24 ++++++++++++++++++++----
2 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/media/usb/dvb-usb/Kconfig b/drivers/media/usb/dvb-usb/Kconfig
index 25ba03edcb5c..7498110142e4 100644
--- a/drivers/media/usb/dvb-usb/Kconfig
+++ b/drivers/media/usb/dvb-usb/Kconfig
@@ -279,6 +279,7 @@ config DVB_USB_PCTV452E
tristate "Pinnacle PCTV HDTV Pro USB device/TT Connect S2-3600"
depends on DVB_USB
select TTPCI_EEPROM
+ select DVB_ISL6423 if MEDIA_SUBDRV_AUTOSELECT
select DVB_LNBP22 if MEDIA_SUBDRV_AUTOSELECT
select DVB_STB0899 if MEDIA_SUBDRV_AUTOSELECT
select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT
diff --git a/drivers/media/usb/dvb-usb/pctv452e.c b/drivers/media/usb/dvb-usb/pctv452e.c
index 441d878fc22c..4b13c1f35b28 100644
--- a/drivers/media/usb/dvb-usb/pctv452e.c
+++ b/drivers/media/usb/dvb-usb/pctv452e.c
@@ -20,6 +20,7 @@
#include "stb6100.h"
#include "stb6100_cfg.h"
/* FE Power */
+#include "isl6423.h"
#include "lnbp22.h"
#include <media/dvb_ca_en50221.h>
@@ -83,6 +84,13 @@ static struct stb0899_postproc pctv45e_postproc[] = {
{ 0, 0 }
};
+static struct isl6423_config pctv452e_isl6423_config = {
+ .current_max = SEC_CURRENT_515m,
+ .curlim = SEC_CURRENT_LIM_ON,
+ .mod_extern = 1,
+ .addr = 0x08,
+};
+
/*
* stores all private variables for communication with the PCTV452e DVB-S2
*/
@@ -909,15 +917,23 @@ static int pctv452e_frontend_attach(struct dvb_usb_adapter *a)
&a->dev->i2c_adap);
if (!a->fe_adap[0].fe)
return -ENODEV;
- if ((dvb_attach(lnbp22_attach, a->fe_adap[0].fe,
- &a->dev->i2c_adap)) == NULL)
- err("Cannot attach lnbp22\n");
id = a->dev->desc->warm_ids[0];
if (USB_VID_TECHNOTREND == id->idVendor
- && USB_PID_TECHNOTREND_CONNECT_S2_3650_CI == id->idProduct)
+ && USB_PID_TECHNOTREND_CONNECT_S2_3650_CI == id->idProduct) {
+ if (dvb_attach(lnbp22_attach,
+ a->fe_adap[0].fe,
+ &a->dev->i2c_adap) == NULL) {
+ err("Cannot attach lnbp22\n");
+ }
/* Error ignored. */
tt3650_ci_init(a);
+ } else if (dvb_attach(isl6423_attach,
+ a->fe_adap[0].fe,
+ &a->dev->i2c_adap,
+ &pctv452e_isl6423_config) == NULL) {
+ err("Cannot attach isl6423\n");
+ }
return 0;
}
--
2.17.1
^ permalink raw reply related
* Re: [PATCH v16 15/22] mm/compaction: do page isolation first in compaction
From: Alexander Duyck @ 2020-07-16 21:32 UTC (permalink / raw)
To: Alex Shi
Cc: Andrew Morton, Mel Gorman, Tejun Heo, Hugh Dickins,
Konstantin Khlebnikov, Daniel Jordan, Yang Shi, Matthew Wilcox,
Johannes Weiner, kbuild test robot, linux-mm, LKML, cgroups,
Shakeel Butt, Joonsoo Kim, Wei Yang, Kirill A. Shutemov
In-Reply-To: <1594429136-20002-16-git-send-email-alex.shi@linux.alibaba.com>
On Fri, Jul 10, 2020 at 5:59 PM Alex Shi <alex.shi@linux.alibaba.com> wrote:
>
> Johannes Weiner has suggested:
> "So here is a crazy idea that may be worth exploring:
>
> Right now, pgdat->lru_lock protects both PageLRU *and* the lruvec's
> linked list.
>
> Can we make PageLRU atomic and use it to stabilize the lru_lock
> instead, and then use the lru_lock only serialize list operations?
> ..."
>
> Yes, this patch is doing so on __isolate_lru_page which is the core
> page isolation func in compaction and shrinking path.
> With this patch, the compaction will only deal the PageLRU set and now
> isolated pages to skip the just alloced page which no LRU bit. And the
> isolation could exclusive the other isolations in memcg move_account,
> page migrations and thp split_huge_page.
>
> As a side effect, PageLRU may be cleared during shrink_inactive_list
> path for isolation reason. If so, we can skip that page.
>
> Hugh Dickins <hughd@google.com> fixed following bugs in this patch's
> early version:
>
> Fix lots of crashes under compaction load: isolate_migratepages_block()
> must clean up appropriately when rejecting a page, setting PageLRU again
> if it had been cleared; and a put_page() after get_page_unless_zero()
> cannot safely be done while holding locked_lruvec - it may turn out to
> be the final put_page(), which will take an lruvec lock when PageLRU.
> And move __isolate_lru_page_prepare back after get_page_unless_zero to
> make trylock_page() safe:
> trylock_page() is not safe to use at this time: its setting PG_locked
> can race with the page being freed or allocated ("Bad page"), and can
> also erase flags being set by one of those "sole owners" of a freshly
> allocated page who use non-atomic __SetPageFlag().
>
> Suggested-by: Johannes Weiner <hannes@cmpxchg.org>
> Signed-off-by: Alex Shi <alex.shi@linux.alibaba.com>
> Cc: Hugh Dickins <hughd@google.com>
> Cc: Andrew Morton <akpm@linux-foundation.org>
> Cc: Matthew Wilcox <willy@infradead.org>
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-mm@kvack.org
> ---
> include/linux/swap.h | 2 +-
> mm/compaction.c | 42 +++++++++++++++++++++++++++++++++---------
> mm/vmscan.c | 38 ++++++++++++++++++++++----------------
> 3 files changed, 56 insertions(+), 26 deletions(-)
>
> diff --git a/include/linux/swap.h b/include/linux/swap.h
> index 2c29399b29a0..6d23d3beeff7 100644
> --- a/include/linux/swap.h
> +++ b/include/linux/swap.h
> @@ -358,7 +358,7 @@ extern void lru_cache_add_active_or_unevictable(struct page *page,
> extern unsigned long zone_reclaimable_pages(struct zone *zone);
> extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
> gfp_t gfp_mask, nodemask_t *mask);
> -extern int __isolate_lru_page(struct page *page, isolate_mode_t mode);
> +extern int __isolate_lru_page_prepare(struct page *page, isolate_mode_t mode);
> extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *memcg,
> unsigned long nr_pages,
> gfp_t gfp_mask,
> diff --git a/mm/compaction.c b/mm/compaction.c
> index f14780fc296a..2da2933fe56b 100644
> --- a/mm/compaction.c
> +++ b/mm/compaction.c
> @@ -869,6 +869,7 @@ static bool too_many_isolated(pg_data_t *pgdat)
> if (!valid_page && IS_ALIGNED(low_pfn, pageblock_nr_pages)) {
> if (!cc->ignore_skip_hint && get_pageblock_skip(page)) {
> low_pfn = end_pfn;
> + page = NULL;
> goto isolate_abort;
> }
> valid_page = page;
> @@ -950,6 +951,21 @@ static bool too_many_isolated(pg_data_t *pgdat)
> if (!(cc->gfp_mask & __GFP_FS) && page_mapping(page))
> goto isolate_fail;
>
> + /*
> + * Be careful not to clear PageLRU until after we're
> + * sure the page is not being freed elsewhere -- the
> + * page release code relies on it.
> + */
> + if (unlikely(!get_page_unless_zero(page)))
> + goto isolate_fail;
> +
> + if (__isolate_lru_page_prepare(page, isolate_mode) != 0)
> + goto isolate_fail_put;
> +
> + /* Try isolate the page */
> + if (!TestClearPageLRU(page))
> + goto isolate_fail_put;
> +
> /* If we already hold the lock, we can skip some rechecking */
> if (!locked) {
> locked = compact_lock_irqsave(&pgdat->lru_lock,
Why not do the __isolate_lru_page_prepare before getting the page?
That way you can avoid performing an extra atomic operation on non-LRU
pages.
> @@ -962,10 +978,6 @@ static bool too_many_isolated(pg_data_t *pgdat)
> goto isolate_abort;
> }
>
> - /* Recheck PageLRU and PageCompound under lock */
> - if (!PageLRU(page))
> - goto isolate_fail;
> -
> /*
> * Page become compound since the non-locked check,
> * and it's on LRU. It can only be a THP so the order
> @@ -973,16 +985,13 @@ static bool too_many_isolated(pg_data_t *pgdat)
> */
> if (unlikely(PageCompound(page) && !cc->alloc_contig)) {
> low_pfn += compound_nr(page) - 1;
> - goto isolate_fail;
> + SetPageLRU(page);
> + goto isolate_fail_put;
> }
> }
>
> lruvec = mem_cgroup_page_lruvec(page, pgdat);
>
> - /* Try isolate the page */
> - if (__isolate_lru_page(page, isolate_mode) != 0)
> - goto isolate_fail;
> -
> /* The whole page is taken off the LRU; skip the tail pages. */
> if (PageCompound(page))
> low_pfn += compound_nr(page) - 1;
> @@ -1011,6 +1020,15 @@ static bool too_many_isolated(pg_data_t *pgdat)
> }
>
> continue;
> +
> +isolate_fail_put:
> + /* Avoid potential deadlock in freeing page under lru_lock */
> + if (locked) {
> + spin_unlock_irqrestore(&pgdat->lru_lock, flags);
> + locked = false;
> + }
> + put_page(page);
> +
> isolate_fail:
> if (!skip_on_failure)
> continue;
> @@ -1047,9 +1065,15 @@ static bool too_many_isolated(pg_data_t *pgdat)
> if (unlikely(low_pfn > end_pfn))
> low_pfn = end_pfn;
>
> + page = NULL;
> +
> isolate_abort:
> if (locked)
> spin_unlock_irqrestore(&pgdat->lru_lock, flags);
> + if (page) {
> + SetPageLRU(page);
> + put_page(page);
> + }
>
> /*
> * Updated the cached scanner pfn once the pageblock has been scanned
> diff --git a/mm/vmscan.c b/mm/vmscan.c
> index 18986fefd49b..f77748adc340 100644
> --- a/mm/vmscan.c
> +++ b/mm/vmscan.c
> @@ -1544,7 +1544,7 @@ unsigned int reclaim_clean_pages_from_list(struct zone *zone,
> *
> * returns 0 on success, -ve errno on failure.
> */
> -int __isolate_lru_page(struct page *page, isolate_mode_t mode)
> +int __isolate_lru_page_prepare(struct page *page, isolate_mode_t mode)
> {
> int ret = -EINVAL;
>
> @@ -1598,20 +1598,9 @@ int __isolate_lru_page(struct page *page, isolate_mode_t mode)
> if ((mode & ISOLATE_UNMAPPED) && page_mapped(page))
> return ret;
>
> - if (likely(get_page_unless_zero(page))) {
> - /*
> - * Be careful not to clear PageLRU until after we're
> - * sure the page is not being freed elsewhere -- the
> - * page release code relies on it.
> - */
> - ClearPageLRU(page);
> - ret = 0;
> - }
> -
> - return ret;
> + return 0;
> }
>
> -
> /*
> * Update LRU sizes after isolating pages. The LRU size updates must
> * be complete before mem_cgroup_update_lru_size due to a sanity check.
> @@ -1691,17 +1680,34 @@ static unsigned long isolate_lru_pages(unsigned long nr_to_scan,
> * only when the page is being freed somewhere else.
> */
> scan += nr_pages;
> - switch (__isolate_lru_page(page, mode)) {
> + switch (__isolate_lru_page_prepare(page, mode)) {
> case 0:
> + /*
> + * Be careful not to clear PageLRU until after we're
> + * sure the page is not being freed elsewhere -- the
> + * page release code relies on it.
> + */
> + if (unlikely(!get_page_unless_zero(page)))
> + goto busy;
> +
> + if (!TestClearPageLRU(page)) {
> + /*
> + * This page may in other isolation path,
> + * but we still hold lru_lock.
> + */
> + put_page(page);
> + goto busy;
> + }
> +
I wonder if it wouldn't make sense to combine these two atomic ops
with tests and the put_page into a single inline function? Then it
could be possible to just do one check and if succeeds you do the
block of code below, otherwise you just fall-through into the -EBUSY
case.
> nr_taken += nr_pages;
> nr_zone_taken[page_zonenum(page)] += nr_pages;
> list_move(&page->lru, dst);
> break;
> -
> +busy:
> case -EBUSY:
> /* else it is being freed elsewhere */
> list_move(&page->lru, src);
> - continue;
> + break;
>
> default:
> BUG();
> --
> 1.8.3.1
>
>
^ permalink raw reply
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Wait for aux invalidation on Tigerlake
From: Chris Wilson @ 2020-07-16 21:32 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <20200716203201.11977-2-chris@chris-wilson.co.uk>
Quoting Chris Wilson (2020-07-16 21:32:01)
> Add a SRM read back of the aux invalidation register after poking
> hsdes: 1809175790, as failing to do so leads to writes going astray.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2169
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 31 ++++++++++++++++++++++-------
> 1 file changed, 24 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index e0280a672f1d..c9e46792b976 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -4757,14 +4757,21 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode)
> intel_engine_mask_t aux_inv = 0;
> u32 cmd, *cs;
>
> + cmd = 4;
> + if (mode & EMIT_INVALIDATE)
> + cmd += 2;
> if (mode & EMIT_INVALIDATE)
> aux_inv = request->engine->mask & ~BIT(BCS0);
> + if (aux_inv)
> + cmd += 2 * hweight8(aux_inv) + 6;
>
> - cs = intel_ring_begin(request,
> - 4 + (aux_inv ? 2 * hweight8(aux_inv) + 2 : 0));
> + cs = intel_ring_begin(request, cmd);
> if (IS_ERR(cs))
> return PTR_ERR(cs);
>
> + if (mode & EMIT_INVALIDATE)
> + *cs++ = preparser_disable(true);
> +
> cmd = MI_FLUSH_DW + 1;
>
> /* We always require a command barrier so that subsequent
> @@ -4780,11 +4787,6 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode)
> cmd |= MI_INVALIDATE_BSD;
> }
>
> - *cs++ = cmd;
> - *cs++ = LRC_PPHWSP_SCRATCH_ADDR;
> - *cs++ = 0; /* upper addr */
> - *cs++ = 0; /* value */
> -
> if (aux_inv) { /* hsdes: 1809175790 */
> struct intel_engine_cs *engine;
> unsigned int tmp;
> @@ -4796,7 +4798,22 @@ static int gen12_emit_flush(struct i915_request *request, u32 mode)
> *cs++ = AUX_INV;
> }
> *cs++ = MI_NOOP;
> +
> + *cs++ = MI_STORE_REGISTER_MEM | MI_USE_GGTT;
Sigh. So I fixed this to MI_SRM_GEN8 and tgl failed the test again.
> + *cs++ = i915_mmio_reg_offset(aux_inv_reg(request->engine));
> + *cs++ = i915_ggtt_offset(engine->status_page.vma) +
> + I915_GEM_HWS_SCRATCH * sizeof(u32);
> + *cs++ = 0;
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply
* [dhowells-fs:keys-acl 4/5] security/integrity/digsig_asymmetric.c:35:10: error: too few arguments to function 'keyring_search'
From: kernel test robot @ 2020-07-16 21:32 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 6690 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git keys-acl
head: 2a3c3edfc979691a7dc4733da827f508da90995a
commit: d1aa67ba9c4d53ddb95f6b5ec73968287df65fb4 [4/5] keys: Split the search perms between KEY_NEED_USE and KEY_NEED_SEARCH
config: i386-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-14) 9.3.0
reproduce (this is a W=1 build):
git checkout d1aa67ba9c4d53ddb95f6b5ec73968287df65fb4
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
security/integrity/digsig_asymmetric.c: In function 'request_asymmetric_key':
>> security/integrity/digsig_asymmetric.c:35:10: error: too few arguments to function 'keyring_search'
35 | kref = keyring_search(make_key_ref(key, 1),
| ^~~~~~~~~~~~~~
In file included from include/linux/key-type.h:11,
from security/integrity/digsig_asymmetric.c:11:
include/linux/key.h:433:18: note: declared here
433 | extern key_ref_t keyring_search(key_ref_t keyring,
| ^~~~~~~~~~~~~~
security/integrity/digsig_asymmetric.c:47:10: error: too few arguments to function 'keyring_search'
47 | kref = keyring_search(make_key_ref(keyring, 1),
| ^~~~~~~~~~~~~~
In file included from include/linux/key-type.h:11,
from security/integrity/digsig_asymmetric.c:11:
include/linux/key.h:433:18: note: declared here
433 | extern key_ref_t keyring_search(key_ref_t keyring,
| ^~~~~~~~~~~~~~
--
fs/crypto/keyring.c: In function 'search_fscrypt_keyring':
>> fs/crypto/keyring.c:145:11: error: too few arguments to function 'keyring_search'
145 | keyref = keyring_search(keyref, type, description, false);
| ^~~~~~~~~~~~~~
In file included from include/linux/key-type.h:11,
from fs/crypto/keyring.c:22:
include/linux/key.h:433:18: note: declared here
433 | extern key_ref_t keyring_search(key_ref_t keyring,
| ^~~~~~~~~~~~~~
vim +/keyring_search +35 security/integrity/digsig_asymmetric.c
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 18
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 19 /*
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 20 * Request an asymmetric key.
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 21 */
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 22 static struct key *request_asymmetric_key(struct key *keyring, uint32_t keyid)
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 23 {
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 24 struct key *key;
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 25 char name[12];
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 26
594081ee7145cc Dmitry Kasatkin 2014-10-06 27 sprintf(name, "id:%08x", keyid);
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 28
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 29 pr_debug("key search: \"%s\"\n", name);
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 30
41c89b64d7184a Petko Manolov 2015-12-02 31 key = get_ima_blacklist_keyring();
41c89b64d7184a Petko Manolov 2015-12-02 32 if (key) {
41c89b64d7184a Petko Manolov 2015-12-02 33 key_ref_t kref;
41c89b64d7184a Petko Manolov 2015-12-02 34
41c89b64d7184a Petko Manolov 2015-12-02 @35 kref = keyring_search(make_key_ref(key, 1),
dcf49dbc8077e2 David Howells 2019-06-26 36 &key_type_asymmetric, name, true);
41c89b64d7184a Petko Manolov 2015-12-02 37 if (!IS_ERR(kref)) {
41c89b64d7184a Petko Manolov 2015-12-02 38 pr_err("Key '%s' is in ima_blacklist_keyring\n", name);
41c89b64d7184a Petko Manolov 2015-12-02 39 return ERR_PTR(-EKEYREJECTED);
41c89b64d7184a Petko Manolov 2015-12-02 40 }
41c89b64d7184a Petko Manolov 2015-12-02 41 }
41c89b64d7184a Petko Manolov 2015-12-02 42
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 43 if (keyring) {
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 44 /* search in specific keyring */
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 45 key_ref_t kref;
41c89b64d7184a Petko Manolov 2015-12-02 46
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 47 kref = keyring_search(make_key_ref(keyring, 1),
dcf49dbc8077e2 David Howells 2019-06-26 48 &key_type_asymmetric, name, true);
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 49 if (IS_ERR(kref))
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 50 key = ERR_CAST(kref);
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 51 else
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 52 key = key_ref_to_ptr(kref);
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 53 } else {
dac087514d86cf David Howells 2020-02-12 54 key = request_key(&key_type_asymmetric, name, NULL, NULL);
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 55 }
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 56
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 57 if (IS_ERR(key)) {
d9a2e5d788d39f Dmitry Kasatkin 2014-07-02 58 pr_err_ratelimited("Request for unknown key '%s' err %ld\n",
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 59 name, PTR_ERR(key));
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 60 switch (PTR_ERR(key)) {
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 61 /* Hide some search errors */
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 62 case -EACCES:
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 63 case -ENOTDIR:
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 64 case -EAGAIN:
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 65 return ERR_PTR(-ENOKEY);
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 66 default:
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 67 return key;
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 68 }
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 69 }
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 70
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 71 pr_debug("%s() = 0 [%x]\n", __func__, key_serial(key));
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 72
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 73 return key;
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 74 }
e0751257a64ea1 Dmitry Kasatkin 2013-02-07 75
:::::: The code at line 35 was first introduced by commit
:::::: 41c89b64d7184a780f12f2cccdabe65cb2408893 IMA: create machine owner and blacklist keyrings
:::::: TO: Petko Manolov <petkan@mip-labs.com>
:::::: CC: Mimi Zohar <zohar@linux.vnet.ibm.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 74068 bytes --]
^ permalink raw reply
* Re: [PATCH v16 15/22] mm/compaction: do page isolation first in compaction
From: Alexander Duyck @ 2020-07-16 21:32 UTC (permalink / raw)
To: Alex Shi
Cc: Andrew Morton, Mel Gorman, Tejun Heo, Hugh Dickins,
Konstantin Khlebnikov, Daniel Jordan, Yang Shi, Matthew Wilcox,
Johannes Weiner, kbuild test robot, linux-mm, LKML,
cgroups-u79uwXL29TY76Z2rM5mHXA, Shakeel Butt, Joonsoo Kim,
Wei Yang, Kirill A. Shutemov
In-Reply-To: <1594429136-20002-16-git-send-email-alex.shi-KPsoFbNs7GizrGE5bRqYAgC/G2K4zDHf@public.gmane.org>
On Fri, Jul 10, 2020 at 5:59 PM Alex Shi <alex.shi-KPsoFbNs7GizrGE5bRqYAgC/G2K4zDHf@public.gmane.org> wrote:
>
> Johannes Weiner has suggested:
> "So here is a crazy idea that may be worth exploring:
>
> Right now, pgdat->lru_lock protects both PageLRU *and* the lruvec's
> linked list.
>
> Can we make PageLRU atomic and use it to stabilize the lru_lock
> instead, and then use the lru_lock only serialize list operations?
> ..."
>
> Yes, this patch is doing so on __isolate_lru_page which is the core
> page isolation func in compaction and shrinking path.
> With this patch, the compaction will only deal the PageLRU set and now
> isolated pages to skip the just alloced page which no LRU bit. And the
> isolation could exclusive the other isolations in memcg move_account,
> page migrations and thp split_huge_page.
>
> As a side effect, PageLRU may be cleared during shrink_inactive_list
> path for isolation reason. If so, we can skip that page.
>
> Hugh Dickins <hughd-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> fixed following bugs in this patch's
> early version:
>
> Fix lots of crashes under compaction load: isolate_migratepages_block()
> must clean up appropriately when rejecting a page, setting PageLRU again
> if it had been cleared; and a put_page() after get_page_unless_zero()
> cannot safely be done while holding locked_lruvec - it may turn out to
> be the final put_page(), which will take an lruvec lock when PageLRU.
> And move __isolate_lru_page_prepare back after get_page_unless_zero to
> make trylock_page() safe:
> trylock_page() is not safe to use at this time: its setting PG_locked
> can race with the page being freed or allocated ("Bad page"), and can
> also erase flags being set by one of those "sole owners" of a freshly
> allocated page who use non-atomic __SetPageFlag().
>
> Suggested-by: Johannes Weiner <hannes-druUgvl0LCNAfugRpC6u6w@public.gmane.org>
> Signed-off-by: Alex Shi <alex.shi-KPsoFbNs7GizrGE5bRqYAgC/G2K4zDHf@public.gmane.org>
> Cc: Hugh Dickins <hughd-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
> Cc: Andrew Morton <akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org>
> Cc: Matthew Wilcox <willy-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
> Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: linux-mm-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org
> ---
> include/linux/swap.h | 2 +-
> mm/compaction.c | 42 +++++++++++++++++++++++++++++++++---------
> mm/vmscan.c | 38 ++++++++++++++++++++++----------------
> 3 files changed, 56 insertions(+), 26 deletions(-)
>
> diff --git a/include/linux/swap.h b/include/linux/swap.h
> index 2c29399b29a0..6d23d3beeff7 100644
> --- a/include/linux/swap.h
> +++ b/include/linux/swap.h
> @@ -358,7 +358,7 @@ extern void lru_cache_add_active_or_unevictable(struct page *page,
> extern unsigned long zone_reclaimable_pages(struct zone *zone);
> extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
> gfp_t gfp_mask, nodemask_t *mask);
> -extern int __isolate_lru_page(struct page *page, isolate_mode_t mode);
> +extern int __isolate_lru_page_prepare(struct page *page, isolate_mode_t mode);
> extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *memcg,
> unsigned long nr_pages,
> gfp_t gfp_mask,
> diff --git a/mm/compaction.c b/mm/compaction.c
> index f14780fc296a..2da2933fe56b 100644
> --- a/mm/compaction.c
> +++ b/mm/compaction.c
> @@ -869,6 +869,7 @@ static bool too_many_isolated(pg_data_t *pgdat)
> if (!valid_page && IS_ALIGNED(low_pfn, pageblock_nr_pages)) {
> if (!cc->ignore_skip_hint && get_pageblock_skip(page)) {
> low_pfn = end_pfn;
> + page = NULL;
> goto isolate_abort;
> }
> valid_page = page;
> @@ -950,6 +951,21 @@ static bool too_many_isolated(pg_data_t *pgdat)
> if (!(cc->gfp_mask & __GFP_FS) && page_mapping(page))
> goto isolate_fail;
>
> + /*
> + * Be careful not to clear PageLRU until after we're
> + * sure the page is not being freed elsewhere -- the
> + * page release code relies on it.
> + */
> + if (unlikely(!get_page_unless_zero(page)))
> + goto isolate_fail;
> +
> + if (__isolate_lru_page_prepare(page, isolate_mode) != 0)
> + goto isolate_fail_put;
> +
> + /* Try isolate the page */
> + if (!TestClearPageLRU(page))
> + goto isolate_fail_put;
> +
> /* If we already hold the lock, we can skip some rechecking */
> if (!locked) {
> locked = compact_lock_irqsave(&pgdat->lru_lock,
Why not do the __isolate_lru_page_prepare before getting the page?
That way you can avoid performing an extra atomic operation on non-LRU
pages.
> @@ -962,10 +978,6 @@ static bool too_many_isolated(pg_data_t *pgdat)
> goto isolate_abort;
> }
>
> - /* Recheck PageLRU and PageCompound under lock */
> - if (!PageLRU(page))
> - goto isolate_fail;
> -
> /*
> * Page become compound since the non-locked check,
> * and it's on LRU. It can only be a THP so the order
> @@ -973,16 +985,13 @@ static bool too_many_isolated(pg_data_t *pgdat)
> */
> if (unlikely(PageCompound(page) && !cc->alloc_contig)) {
> low_pfn += compound_nr(page) - 1;
> - goto isolate_fail;
> + SetPageLRU(page);
> + goto isolate_fail_put;
> }
> }
>
> lruvec = mem_cgroup_page_lruvec(page, pgdat);
>
> - /* Try isolate the page */
> - if (__isolate_lru_page(page, isolate_mode) != 0)
> - goto isolate_fail;
> -
> /* The whole page is taken off the LRU; skip the tail pages. */
> if (PageCompound(page))
> low_pfn += compound_nr(page) - 1;
> @@ -1011,6 +1020,15 @@ static bool too_many_isolated(pg_data_t *pgdat)
> }
>
> continue;
> +
> +isolate_fail_put:
> + /* Avoid potential deadlock in freeing page under lru_lock */
> + if (locked) {
> + spin_unlock_irqrestore(&pgdat->lru_lock, flags);
> + locked = false;
> + }
> + put_page(page);
> +
> isolate_fail:
> if (!skip_on_failure)
> continue;
> @@ -1047,9 +1065,15 @@ static bool too_many_isolated(pg_data_t *pgdat)
> if (unlikely(low_pfn > end_pfn))
> low_pfn = end_pfn;
>
> + page = NULL;
> +
> isolate_abort:
> if (locked)
> spin_unlock_irqrestore(&pgdat->lru_lock, flags);
> + if (page) {
> + SetPageLRU(page);
> + put_page(page);
> + }
>
> /*
> * Updated the cached scanner pfn once the pageblock has been scanned
> diff --git a/mm/vmscan.c b/mm/vmscan.c
> index 18986fefd49b..f77748adc340 100644
> --- a/mm/vmscan.c
> +++ b/mm/vmscan.c
> @@ -1544,7 +1544,7 @@ unsigned int reclaim_clean_pages_from_list(struct zone *zone,
> *
> * returns 0 on success, -ve errno on failure.
> */
> -int __isolate_lru_page(struct page *page, isolate_mode_t mode)
> +int __isolate_lru_page_prepare(struct page *page, isolate_mode_t mode)
> {
> int ret = -EINVAL;
>
> @@ -1598,20 +1598,9 @@ int __isolate_lru_page(struct page *page, isolate_mode_t mode)
> if ((mode & ISOLATE_UNMAPPED) && page_mapped(page))
> return ret;
>
> - if (likely(get_page_unless_zero(page))) {
> - /*
> - * Be careful not to clear PageLRU until after we're
> - * sure the page is not being freed elsewhere -- the
> - * page release code relies on it.
> - */
> - ClearPageLRU(page);
> - ret = 0;
> - }
> -
> - return ret;
> + return 0;
> }
>
> -
> /*
> * Update LRU sizes after isolating pages. The LRU size updates must
> * be complete before mem_cgroup_update_lru_size due to a sanity check.
> @@ -1691,17 +1680,34 @@ static unsigned long isolate_lru_pages(unsigned long nr_to_scan,
> * only when the page is being freed somewhere else.
> */
> scan += nr_pages;
> - switch (__isolate_lru_page(page, mode)) {
> + switch (__isolate_lru_page_prepare(page, mode)) {
> case 0:
> + /*
> + * Be careful not to clear PageLRU until after we're
> + * sure the page is not being freed elsewhere -- the
> + * page release code relies on it.
> + */
> + if (unlikely(!get_page_unless_zero(page)))
> + goto busy;
> +
> + if (!TestClearPageLRU(page)) {
> + /*
> + * This page may in other isolation path,
> + * but we still hold lru_lock.
> + */
> + put_page(page);
> + goto busy;
> + }
> +
I wonder if it wouldn't make sense to combine these two atomic ops
with tests and the put_page into a single inline function? Then it
could be possible to just do one check and if succeeds you do the
block of code below, otherwise you just fall-through into the -EBUSY
case.
> nr_taken += nr_pages;
> nr_zone_taken[page_zonenum(page)] += nr_pages;
> list_move(&page->lru, dst);
> break;
> -
> +busy:
> case -EBUSY:
> /* else it is being freed elsewhere */
> list_move(&page->lru, src);
> - continue;
> + break;
>
> default:
> BUG();
> --
> 1.8.3.1
>
>
^ permalink raw reply
* [Buildroot] [PATCH v2 1/1] package/meson: bump to version 0.55.0
From: James Hilliard @ 2020-07-16 21:31 UTC (permalink / raw)
To: buildroot
Drop g-ir-scanner/g-ir-compiler override patch which is now upstream.
Rebase remaining patches.
Meson now requires single quotes for cross-compilation.conf, replace
double quotes with single quotes.
Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
---
Changes v1 -> v2:
- cleanup make-sq-comma-list syntax
---
...-RPATH-if-install_rpath-is-not-empty.patch | 16 ++--
...tic-libs-when-default-library-static.patch | 8 +-
...-g-ir-scanner-and-g-ir-compiler-bina.patch | 74 -------------------
...encies-base.py-add-pkg_config_stati.patch} | 8 +-
package/meson/meson.hash | 4 +-
package/meson/meson.mk | 2 +-
package/pkg-meson.mk | 12 +--
support/misc/utils.mk | 4 +
8 files changed, 29 insertions(+), 99 deletions(-)
delete mode 100644 package/meson/0003-Allow-overriding-g-ir-scanner-and-g-ir-compiler-bina.patch
rename package/meson/{0004-mesonbuild-dependencies-base.py-add-pkg_config_stati.patch => 0003-mesonbuild-dependencies-base.py-add-pkg_config_stati.patch} (95%)
diff --git a/package/meson/0001-Only-fix-RPATH-if-install_rpath-is-not-empty.patch b/package/meson/0001-Only-fix-RPATH-if-install_rpath-is-not-empty.patch
index 79e99adf4a..e098c25bbe 100644
--- a/package/meson/0001-Only-fix-RPATH-if-install_rpath-is-not-empty.patch
+++ b/package/meson/0001-Only-fix-RPATH-if-install_rpath-is-not-empty.patch
@@ -1,4 +1,4 @@
-From 4db4fd79d9bb2b98cea1117f22b6c97942ab2ecd Mon Sep 17 00:00:00 2001
+From bb155880bd08d7c0c9ddf0264d73016a426d8579 Mon Sep 17 00:00:00 2001
From: Eric Le Bihan <eric.le.bihan.dev@free.fr>
Date: Sat, 14 Jul 2018 11:18:45 +0200
Subject: [PATCH] Only fix RPATH if install_rpath is not empty
@@ -11,20 +11,20 @@ Signed-off-by: Peter Seiderer <ps.report@gmx.net>
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/mesonbuild/minstall.py b/mesonbuild/minstall.py
-index 8ac6aab1..7ef04116 100644
+index 0be01fe75..d991cf4e7 100644
--- a/mesonbuild/minstall.py
+++ b/mesonbuild/minstall.py
-@@ -489,8 +489,14 @@ class Installer:
- printed_symlink_error = True
- if os.path.isfile(outname):
+@@ -512,8 +512,14 @@ class Installer:
+ if file_copied:
+ self.did_install_something = True
try:
-- depfixer.fix_rpath(outname, install_rpath, final_path,
+- depfixer.fix_rpath(outname, t.rpath_dirs_to_remove, install_rpath, final_path,
- install_name_mappings, verbose=False)
+ # Buildroot check-host-rpath script expects RPATH
+ # But if install_rpath is empty, it will stripped.
+ # So, preserve it in this case
+ if install_rpath:
-+ depfixer.fix_rpath(outname, install_rpath, final_path,
++ depfixer.fix_rpath(outname, t.rpath_dirs_to_remove, install_rpath, final_path,
+ install_name_mappings, verbose=False)
+ else:
+ print("Skipping RPATH fixing")
@@ -32,5 +32,5 @@ index 8ac6aab1..7ef04116 100644
if isinstance(e.code, int) and e.code == 0:
pass
--
-2.20.1
+2.25.1
diff --git a/package/meson/0002-Prefer-ext-static-libs-when-default-library-static.patch b/package/meson/0002-Prefer-ext-static-libs-when-default-library-static.patch
index b859d8372e..2639915891 100644
--- a/package/meson/0002-Prefer-ext-static-libs-when-default-library-static.patch
+++ b/package/meson/0002-Prefer-ext-static-libs-when-default-library-static.patch
@@ -1,4 +1,4 @@
-From b390f29b9e0170d5bf410f4bef5a697655857633 Mon Sep 17 00:00:00 2001
+From ea85465e608178080c3b4d51af9765a8c7c0dae3 Mon Sep 17 00:00:00 2001
From: Matt Weber <matthew.weber@rockwellcollins.com>
Date: Sat, 26 Oct 2019 09:17:29 -0500
Subject: [PATCH] Prefer ext static libs when --default-library=static
@@ -27,10 +27,10 @@ Signed-off-by: Matthew Weber <matthew.weber@rockwellcollins.com>
1 file changed, 3 insertions(+)
diff --git a/mesonbuild/compilers/mixins/clike.py b/mesonbuild/compilers/mixins/clike.py
-index 5d50b7d..8f5f1c6 100644
+index 47e97d261..729c98acc 100644
--- a/mesonbuild/compilers/mixins/clike.py
+++ b/mesonbuild/compilers/mixins/clike.py
-@@ -857,6 +857,9 @@ class CLikeCompiler:
+@@ -940,6 +940,9 @@ class CLikeCompiler:
elif env.machines[self.for_machine].is_cygwin():
shlibext = ['dll', 'dll.a']
prefixes = ['cyg'] + prefixes
@@ -41,5 +41,5 @@ index 5d50b7d..8f5f1c6 100644
# Linux/BSDs
shlibext = ['so']
--
-2.17.1
+2.25.1
diff --git a/package/meson/0003-Allow-overriding-g-ir-scanner-and-g-ir-compiler-bina.patch b/package/meson/0003-Allow-overriding-g-ir-scanner-and-g-ir-compiler-bina.patch
deleted file mode 100644
index c1db98f5a0..0000000000
--- a/package/meson/0003-Allow-overriding-g-ir-scanner-and-g-ir-compiler-bina.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 49b1c8df7e4ff3a441d831f926d87920952025bf Mon Sep 17 00:00:00 2001
-From: James Hilliard <james.hilliard1@gmail.com>
-Date: Sat, 2 May 2020 20:43:36 -0600
-Subject: [PATCH] Allow overriding g-ir-scanner and g-ir-compiler binaries.
-
-This is useful when one needs to force meson to use wrappers for cross
-compilation.
-
-Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
-[james.hilliard1 at gmail.com: backport and largely adapt upstream commit
-1e073c4c1bd7de06bc74d84e3807c9b210e57a22, as the version in master has
-undergone haevy refactorisation]
----
- mesonbuild/modules/gnome.py | 34 +++++++++++++++++++++-------------
- 1 file changed, 21 insertions(+), 13 deletions(-)
-
-diff --git a/mesonbuild/modules/gnome.py b/mesonbuild/modules/gnome.py
-index a00005588..b6d7cc141 100644
---- a/mesonbuild/modules/gnome.py
-+++ b/mesonbuild/modules/gnome.py
-@@ -32,7 +32,7 @@ from ..mesonlib import (
- MachineChoice, MesonException, OrderedSet, Popen_safe, extract_as_list,
- join_args, unholder,
- )
--from ..dependencies import Dependency, PkgConfigDependency, InternalDependency
-+from ..dependencies import Dependency, PkgConfigDependency, InternalDependency, ExternalProgram
- from ..interpreterbase import noKwargs, permittedKwargs, FeatureNew, FeatureNewKwargs
-
- # gresource compilation is broken due to the way
-@@ -735,21 +735,29 @@ class GnomeModule(ExtensionModule):
- # these utilities via pkg-config, so it would be best to use the
- # results from pkg-config when possible.
- gi_util_dirs_check = [state.environment.get_build_dir(), state.environment.get_source_dir()]
-- giscanner = self.interpreter.find_program_impl('g-ir-scanner')
-- if giscanner.found():
-- giscanner_path = giscanner.get_command()[0]
-- if not any(x in giscanner_path for x in gi_util_dirs_check):
-- giscanner = self.gir_dep.get_pkgconfig_variable('g_ir_scanner', {})
-+ giscanner_bin = state.environment.lookup_binary_entry(MachineChoice.HOST, 'g-ir-scanner')
-+ if giscanner_bin is not None:
-+ giscanner = ExternalProgram.from_entry('g-ir-scanner', giscanner_bin)
- else:
-- giscanner = self.gir_dep.get_pkgconfig_variable('g_ir_scanner', {})
-+ giscanner = self.interpreter.find_program_impl('g-ir-scanner')
-+ if giscanner.found():
-+ giscanner_path = giscanner.get_command()[0]
-+ if not any(x in giscanner_path for x in gi_util_dirs_check):
-+ giscanner = self.gir_dep.get_pkgconfig_variable('g_ir_scanner', {})
-+ else:
-+ giscanner = self.gir_dep.get_pkgconfig_variable('g_ir_scanner', {})
-
-- gicompiler = self.interpreter.find_program_impl('g-ir-compiler')
-- if gicompiler.found():
-- gicompiler_path = gicompiler.get_command()[0]
-- if not any(x in gicompiler_path for x in gi_util_dirs_check):
-- gicompiler = self.gir_dep.get_pkgconfig_variable('g_ir_compiler', {})
-+ gicompiler_bin = state.environment.lookup_binary_entry(MachineChoice.HOST, 'g-ir-compiler')
-+ if gicompiler_bin is not None:
-+ gicompiler = ExternalProgram.from_entry('g-ir-compiler', gicompiler_bin)
- else:
-- gicompiler = self.gir_dep.get_pkgconfig_variable('g_ir_compiler', {})
-+ gicompiler = self.interpreter.find_program_impl('g-ir-compiler')
-+ if gicompiler.found():
-+ gicompiler_path = gicompiler.get_command()[0]
-+ if not any(x in gicompiler_path for x in gi_util_dirs_check):
-+ gicompiler = self.gir_dep.get_pkgconfig_variable('g_ir_compiler', {})
-+ else:
-+ gicompiler = self.gir_dep.get_pkgconfig_variable('g_ir_compiler', {})
-
- ns = kwargs.pop('namespace')
- nsversion = kwargs.pop('nsversion')
---
-2.25.1
-
diff --git a/package/meson/0004-mesonbuild-dependencies-base.py-add-pkg_config_stati.patch b/package/meson/0003-mesonbuild-dependencies-base.py-add-pkg_config_stati.patch
similarity index 95%
rename from package/meson/0004-mesonbuild-dependencies-base.py-add-pkg_config_stati.patch
rename to package/meson/0003-mesonbuild-dependencies-base.py-add-pkg_config_stati.patch
index 4196545a96..eda17cadc5 100644
--- a/package/meson/0004-mesonbuild-dependencies-base.py-add-pkg_config_stati.patch
+++ b/package/meson/0003-mesonbuild-dependencies-base.py-add-pkg_config_stati.patch
@@ -1,4 +1,4 @@
-From 71295eec724f89ef5f5822c17cf44480335225cd Mon Sep 17 00:00:00 2001
+From 8622d37587169c1e4a4206a9462868ede057f0e8 Mon Sep 17 00:00:00 2001
From: Fabrice Fontaine <fontaine.fabrice@gmail.com>
Date: Sat, 15 Feb 2020 15:13:59 +0100
Subject: [PATCH] mesonbuild/dependencies/base.py: add pkg_config_static
@@ -23,10 +23,10 @@ Signed-off-by: Romain Naour <romain.naour@gmail.com>
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/mesonbuild/dependencies/base.py b/mesonbuild/dependencies/base.py
-index 5636602e..de4e87bc 100644
+index 23701da95..83e51626d 100644
--- a/mesonbuild/dependencies/base.py
+++ b/mesonbuild/dependencies/base.py
-@@ -858,7 +858,8 @@ class PkgConfigDependency(ExternalDependency):
+@@ -849,7 +849,8 @@ class PkgConfigDependency(ExternalDependency):
def _set_libs(self):
env = None
libcmd = [self.name, '--libs']
@@ -37,5 +37,5 @@ index 5636602e..de4e87bc 100644
# Force pkg-config to output -L fields even if they are system
# paths so we can do manual searching with cc.find_library() later.
--
-2.25.4
+2.25.1
diff --git a/package/meson/meson.hash b/package/meson/meson.hash
index b1d230938a..c88ea8e904 100644
--- a/package/meson/meson.hash
+++ b/package/meson/meson.hash
@@ -1,4 +1,4 @@
# Locally calculated after checking pgp signature
-# https://github.com/mesonbuild/meson/releases/download/0.54.2/meson-0.54.2.tar.gz.asc
-sha256 a7716eeae8f8dff002e4147642589ab6496ff839e4376a5aed761f83c1fa0455 meson-0.54.2.tar.gz
+# https://github.com/mesonbuild/meson/releases/download/0.55.0/meson-0.55.0.tar.gz.asc
+sha256 0a1ae2bfe2ae14ac47593537f93290fb79e9b775c55b4c53c282bc3ca3745b35 meson-0.55.0.tar.gz
sha256 cfc7749b96f63bd31c3c42b5c471bf756814053e847c10f3eb003417bc523d30 COPYING
diff --git a/package/meson/meson.mk b/package/meson/meson.mk
index d5b1e86811..f698226a45 100644
--- a/package/meson/meson.mk
+++ b/package/meson/meson.mk
@@ -4,7 +4,7 @@
#
################################################################################
-MESON_VERSION = 0.54.2
+MESON_VERSION = 0.55.0
MESON_SITE = https://github.com/mesonbuild/meson/releases/download/$(MESON_VERSION)
MESON_LICENSE = Apache-2.0
MESON_LICENSE_FILES = COPYING
diff --git a/package/pkg-meson.mk b/package/pkg-meson.mk
index 0a4ab2194c..e827bb5f3c 100644
--- a/package/pkg-meson.mk
+++ b/package/pkg-meson.mk
@@ -71,9 +71,9 @@ define $(2)_CONFIGURE_CMDS
-e 's%@TARGET_ARCH@%$$(HOST_MESON_TARGET_CPU_FAMILY)%g' \
-e 's%@TARGET_CPU@%$$(HOST_MESON_TARGET_CPU)%g' \
-e 's%@TARGET_ENDIAN@%$$(HOST_MESON_TARGET_ENDIAN)%g' \
- -e 's%@TARGET_CFLAGS@%$$(call make-comma-list,$$($(2)_CFLAGS))%g' \
- -e 's%@TARGET_LDFLAGS@%$$(call make-comma-list,$$($(2)_LDFLAGS))%g' \
- -e 's%@TARGET_CXXFLAGS@%$$(call make-comma-list,$$($(2)_CXXFLAGS))%g' \
+ -e "s%@TARGET_CFLAGS@%$$(call make-sq-comma-list,$$($(2)_CFLAGS))%g" \
+ -e "s%@TARGET_LDFLAGS@%$$(call make-sq-comma-list,$$($(2)_LDFLAGS))%g" \
+ -e "s%@TARGET_CXXFLAGS@%$$(call make-sq-comma-list,$$($(2)_CXXFLAGS))%g" \
-e 's%@HOST_DIR@%$$(HOST_DIR)%g' \
-e 's%@STAGING_DIR@%$$(STAGING_DIR)%g' \
-e 's%@STATIC@%$$(if $$(BR2_STATIC_LIBS),true,false)%g' \
@@ -190,9 +190,9 @@ define PKG_MESON_INSTALL_CROSS_CONF
-e 's%@TARGET_ARCH@%$(HOST_MESON_TARGET_CPU_FAMILY)%g' \
-e 's%@TARGET_CPU@%$(HOST_MESON_TARGET_CPU)%g' \
-e 's%@TARGET_ENDIAN@%$(HOST_MESON_TARGET_ENDIAN)%g' \
- -e 's%@TARGET_CFLAGS@%$(call make-comma-list,$(TARGET_CFLAGS))@PKG_TARGET_CFLAGS@%g' \
- -e 's%@TARGET_LDFLAGS@%$(call make-comma-list,$(TARGET_LDFLAGS))@PKG_TARGET_CFLAGS@%g' \
- -e 's%@TARGET_CXXFLAGS@%$(call make-comma-list,$(TARGET_CXXFLAGS))@PKG_TARGET_CFLAGS@%g' \
+ -e "s%@TARGET_CFLAGS@%$(call make-sq-comma-list,$(TARGET_CFLAGS))@PKG_TARGET_CFLAGS@%g" \
+ -e "s%@TARGET_LDFLAGS@%$(call make-sq-comma-list,$(TARGET_LDFLAGS))@PKG_TARGET_CFLAGS@%g" \
+ -e "s%@TARGET_CXXFLAGS@%$(call make-sq-comma-list,$(TARGET_CXXFLAGS))@PKG_TARGET_CFLAGS@%g" \
-e 's%@HOST_DIR@%$(HOST_DIR)%g' \
-e 's%@STAGING_DIR@%$(STAGING_DIR)%g' \
-e 's%@STATIC@%$$(if $$(BR2_STATIC_LIBS),true,false)%g' \
diff --git a/support/misc/utils.mk b/support/misc/utils.mk
index 2f00ccfdb7..dc60cad979 100644
--- a/support/misc/utils.mk
+++ b/support/misc/utils.mk
@@ -88,6 +88,10 @@ notfirstword = $(wordlist 2,$(words $(1)),$(1))
# list of unquoted items: a b c d --> "a", "b", "c", "d"
make-comma-list = $(subst $(space),$(comma)$(space),$(patsubst %,"%",$(strip $(1))))
+# build a comma-separated list of single quoted items, from a space-separated
+# list of unquoted items: a b c d --> 'a', 'b', 'c', 'd'
+make-sq-comma-list = $(subst $(space),$(comma)$(space),$(patsubst %,'%',$(strip $(1))))
+
# Needed for the foreach loops to loop over the list of hooks, so that
# each hook call is properly separated by a newline.
define sep
--
2.25.1
^ permalink raw reply related
* [Buildroot] [PATCH 1/1] package/nftables: bump to version 0.9.6
From: Fabrice Fontaine @ 2020-07-16 21:31 UTC (permalink / raw)
To: buildroot
- Drop patch (already in version)
- Drop host-bison and host-flex, not needed since version 0.9.5 and
https://git.netfilter.org/nftables/commit/?id=2885cf2e65042b3dbc44fc232fd35840df255935
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
---
...01-src-main.c-fix-build-with-gcc-4.8.patch | 46 -------------------
package/nftables/nftables.hash | 2 +-
package/nftables/nftables.mk | 5 +-
3 files changed, 3 insertions(+), 50 deletions(-)
delete mode 100644 package/nftables/0001-src-main.c-fix-build-with-gcc-4.8.patch
diff --git a/package/nftables/0001-src-main.c-fix-build-with-gcc-4.8.patch b/package/nftables/0001-src-main.c-fix-build-with-gcc-4.8.patch
deleted file mode 100644
index 11b63b452a..0000000000
--- a/package/nftables/0001-src-main.c-fix-build-with-gcc-4.8.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From e871a7ad19f6b38d9c0a1c6cf554692b5cdea9bc Mon Sep 17 00:00:00 2001
-From: Fabrice Fontaine <fontaine.fabrice@gmail.com>
-Date: Sun, 7 Jun 2020 23:25:55 +0200
-Subject: [PATCH] src/main.c: fix build with gcc <= 4.8
-
-Since commit 719e44277f8e89323a87219b4d4bc7abac05b051, build with
-gcc <= 4.8 fails on:
-
-main.c:186:2: error: 'for' loop initial declarations are only allowed in C99 mode
- for (size_t i = IDX_INTERACTIVE + 1; i < NR_NFT_OPTIONS; ++i)
- ^
-
-Fixes:
- - http://autobuild.buildroot.org/results/cf2359b8311fe91f9335c91f2bb4a730c9f4c9dc
-
-Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
-[Upstream status:
-https://marc.info/?l=netfilter-devel&m=159156583001993]
----
- src/main.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/src/main.c b/src/main.c
-index d830c7a2..e248a347 100644
---- a/src/main.c
-+++ b/src/main.c
-@@ -169,6 +169,7 @@ static void print_option(const struct nft_opt *opt)
-
- static void show_help(const char *name)
- {
-+ size_t i;
- printf("Usage: %s [ options ] [ cmds... ]\n"
- "\n"
- "Options:\n", name);
-@@ -185,7 +186,7 @@ static void show_help(const char *name)
-
- fputs("\n", stdout);
-
-- for (size_t i = IDX_INTERACTIVE + 1; i < NR_NFT_OPTIONS; ++i)
-+ for (i = IDX_INTERACTIVE + 1; i < NR_NFT_OPTIONS; ++i)
- print_option(&nft_options[i]);
-
- fputs("\n", stdout);
---
-2.26.2
-
diff --git a/package/nftables/nftables.hash b/package/nftables/nftables.hash
index afe16ddfaf..1112b7a8ad 100644
--- a/package/nftables/nftables.hash
+++ b/package/nftables/nftables.hash
@@ -1,3 +1,3 @@
# From https://netfilter.org/projects/nftables/downloads.html
-sha256 08b8683a9db5fba980bc092b75288af98d218bbe8ab446daf2338570d0730f9a nftables-0.9.4.tar.bz2
+sha256 68d6fdfe8ab02303e6b1f13968a4022da5b0120110eaee3233d806857937b66e nftables-0.9.6.tar.bz2
sha256 c17bc4fa5b2434c6f283ffcb2312e5bf3c7cdf5787b79505f094d8de734ac53e COPYING
diff --git a/package/nftables/nftables.mk b/package/nftables/nftables.mk
index c5503e2039..8a003a5e34 100644
--- a/package/nftables/nftables.mk
+++ b/package/nftables/nftables.mk
@@ -4,11 +4,10 @@
#
################################################################################
-NFTABLES_VERSION = 0.9.4
+NFTABLES_VERSION = 0.9.6
NFTABLES_SOURCE = nftables-$(NFTABLES_VERSION).tar.bz2
NFTABLES_SITE = https://www.netfilter.org/projects/nftables/files
-NFTABLES_DEPENDENCIES = libmnl libnftnl host-bison host-flex \
- host-pkgconf $(TARGET_NLS_DEPENDENCIES)
+NFTABLES_DEPENDENCIES = libmnl libnftnl host-pkgconf $(TARGET_NLS_DEPENDENCIES)
NFTABLES_LICENSE = GPL-2.0
NFTABLES_LICENSE_FILES = COPYING
NFTABLES_CONF_OPTS = --disable-man-doc --disable-pdf-doc
--
2.27.0
^ permalink raw reply related
* Re: [PATCH net-next 0/3] Fully describe the waveform for PTP periodic output
From: Jacob Keller @ 2020-07-16 21:31 UTC (permalink / raw)
To: Vladimir Oltean, kuba, davem, netdev
Cc: richardcochran, yangbo.lu, xiaoliang.yang_1, po.liu,
UNGLinuxDriver
In-Reply-To: <20200716212032.1024188-1-olteanv@gmail.com>
On 7/16/2020 2:20 PM, Vladimir Oltean wrote:
> While using the ancillary pin functionality of PTP hardware clocks to
> synchronize multiple DSA switches on a board, a need arised to be able
> to configure the duty cycle of the master of this PPS hierarchy.
>
> Also, the PPS master is not able to emit PPS starting from arbitrary
> absolute times, so a new flag is introduced to support such hardware
> without making guesses.
>
> With these patches, struct ptp_perout_request now basically describes a
> general-purpose square wave.
Nice!
>
> Vladimir Oltean (3):
> ptp: add ability to configure duty cycle for periodic output
> ptp: introduce a phase offset in the periodic output request
> net: mscc: ocelot: add support for PTP waveform configuration
>
> drivers/net/ethernet/mscc/ocelot_ptp.c | 74 +++++++++++++++++---------
> drivers/ptp/ptp_chardev.c | 33 +++++++++---
> include/uapi/linux/ptp_clock.h | 34 ++++++++++--
> 3 files changed, 107 insertions(+), 34 deletions(-)
>
^ permalink raw reply
* Re: [RFC PATCH] hwtracing: Add HiSilicon PCIe Tune and Trace device driver
From: Bjorn Helgaas @ 2020-07-16 21:31 UTC (permalink / raw)
To: Yicong Yang; +Cc: linux-kernel, alexander.shishkin, linux-pci, linuxarm
In-Reply-To: <6f945bfe-eaec-464e-9f01-8c76fb467a1d@hisilicon.com>
On Thu, Jul 16, 2020 at 05:06:19PM +0800, Yicong Yang wrote:
> On 2020/7/11 7:09, Bjorn Helgaas wrote:
> > On Sat, Jun 13, 2020 at 05:32:13PM +0800, Yicong Yang wrote:
> >> HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex
> >> integrated Endpoint(RCiEP) device, providing the capability
> >> to dynamically monitor and tune the PCIe traffic parameters(tune),
> >> and trace the TLP headers to the memory(trace).
> >>
> >> Add the driver for the device to enable its functions. The driver
> >> will create debugfs directory for each PTT device, and users can
> >> operate the device through the files under its directory.
> >> +Tune
> >> +====
> >> +
> >> +PTT tune is designed for monitoring and adjusting PCIe link parameters(events).
> >> +Currently we support events 4 classes. The scope of the events
> >> +covers the PCIe core with which the PTT device belongs to.
> > All of these look like things that have the potential to break the
> > PCIe protocol and cause errors like timeouts, receiver overflows, etc.
> > That's OK for a debug/analysis situation, but it should taint the
> > kernel somehow because I don't want to debug problems like that if
> > they're caused by users tweaking things.
> >
> > That might even be a reason *not* to merge the tune side of this. I
> > can see how it might be useful for you internally, but it's not
> > obvious to me how it will benefit other users. Maybe that part should
> > be an out-of-tree module?
>
> All the tuning values are not accurate, but abstracted to several
> _levels_ of each events. The levels are delicately designed to
> guarantee by the hardware that they are always valid and will not
> break the PCIe link. The possible level values exposed to the users
> is tested and safe and other values will not be accepted.
>
> The final tuning events is not settled and we'll not exposed the
> events which will may lead to the link broken. Furthermore, maybe we
> could default disable the tune events' level adjustment and make
> them readonly. The user can enable the full tune function by a
> module parameters or in the BIOS, and a warning message will be
> displayed.
>
> The tune part is beneficial for the users and not only for our
> internal use. We intends to provide a way to tune the link
> depending on the downstream components and link configuration. For
> example, users can tune the data path QoS level to get better
> performance according to the link width is x8 or x16, or according
> to the endpoints' class is a network card or a nvme disk. It will
> make our controller adapt to different condition with high
> performance, so we hope this feature to be merged.
OK. This driver itself is outside my area, so I guess merging it is
up to Alexander.
Do you have any measurements of performance improvements? I think it
would be good to have real numbers showing that this is useful.
You mentioned a warning message, so I assume you'll add some kind of
dmesg logging when tuning happens?
Is this protected so it's only usable by root or other appropriate
privileged user?
> >> + * The PTT can designate function for trace.
> >> + * Add the root port's subordinates in the list as we
> >> + * can specify certain function.
> >> + */
> >> + child_bus = tpdev->subordinate;
> >> + list_for_each_entry(tpdev, &child_bus->devices, bus_list) {
> > *This* looks like a potential problem with hotplug. How do you deal
> > with devices being added/removed after this loop?
>
> Yes. I have considered the add/remove situation but not intend to address it
> in this RFC and assume the topology is static after probing.
> I will manage the situation in next version.
What happens if a device is added or removed after boot? If the only
limitation is that you can't tune or trace a hot-added device, that's
fine. (I mean, it's really *not* fine because it's a poor user
experience, but at least it's just a usability issue, not a crash.)
But if hot-adding or hot-removing a device can cause an oops or a
crash or something, *that* is definitely a problem.
Bjorn
^ permalink raw reply
* Re: [PATCHv1 0/3] Enable RTC on Odroid N2
From: Kevin Hilman @ 2020-07-16 21:28 UTC (permalink / raw)
To: Neil Armstrong, Anand Moon
Cc: Mark Rutland, devicetree, Martin Blumenstingl, Rob Herring,
linux-amlogic, linux-arm-kernel, Jerome Brunet
In-Reply-To: <a7e9b154-ceb2-3915-454a-a53c9b65622e@baylibre.com>
Neil Armstrong <narmstrong@baylibre.com> writes:
> Hi,
>
> On 16/07/2020 10:20, Neil Armstrong wrote:
>> Hi,
>>
>> On 16/07/2020 10:14, Anand Moon wrote:
>>> Hi Neil,
>>>
>>> Thanks for your review comments.
>>>
>>> On Thu, 16 Jul 2020 at 12:35, Neil Armstrong <narmstrong@baylibre.com> wrote:
>>>>
>>>> Hi Anand,
>>>>
>>>> Only the vrtc is able to wakeup the device from suspend,
>>>> the external RTC is not capable.
>>>>
>>>> Neil
>>>
>>> Now I have two RTC driver registered
>>>
>>> $ dmesg | grep rtc
>>> [ 4.737315] rtc-pcf8563 0-0051: registered as rtc0
>>> [ 4.738763] rtc-pcf8563 0-0051: setting system clock to
>>> 2020-07-16T08:00:46 UTC (1594886446)
>>> [ 4.790206] meson-vrtc ff8000a8.rtc: registered as rtc1
>>>
>>> And there are two nodes
>>> # ls /dev/rtc*
>>> /dev/rtc /dev/rtc0 /dev/rtc1
>>>
>>> So it seames an issue that /dev/rtc0 is not able to handle wakeup events.
>>> How can we resolve this issue?
>>>
>>> # time rtcwake -s 30 -m mem
>>> rtcwake: /dev/rtc0 not enabled for wakeup events
>>
>> rtcwake -d /dev/rtc1 -s 30 -m mem
>>
>> As Christian reported off-list, it may be necessary to keep the vrtc as rtc0,
>> so you should add aliases in the odroid-n2 DT to have vrtc as rtc0 and the on-board
>> rtc as rtc1, but it may break the hwclock tools, so the reverse may be better
>> but you'll need to specify rtc1 to rtcwake.
>
> While looking closer to the Odroid-N2 schematics and U-Boot/SCP Firmware, the external on-board
> RTC can wake the device with the GPIO_AO 7, and wakeup is enabled in:
> https://github.com/hardkernel/u-boot/blob/odroidn2-v2015.01/board/hardkernel/odroidn2/firmware/scp_task/pwr_ctrl.c#L143
>
> So, something must be missing.
A couple possibilities come to mind (without looking at the specific RTC
driver):
1) pinctrl for that GPIO needs proper settings
2) DT node for the RTC needs "wakeup-source" property
Kevin
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v2 2/2] pinctrl: qcom: Add msm8226 pinctrl driver.
From: Bartosz Dudziak @ 2020-07-16 20:55 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Bartosz Dudziak, Andy Gross, Linus Walleij, Rob Herring,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
In-Reply-To: <20200716205530.22910-1-bartosz.dudziak@snejp.pl>
Add initial Qualcomm msm8226 pinctrl driver to support pin configuration
with pinctrl framework for msm8226 SoC.
- Initial formatting and style was taken from the msm8x74 pinctrl driver
added by Björn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
---
drivers/pinctrl/qcom/Kconfig | 9 +
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-msm8226.c | 631 +++++++++++++++++++++++++
3 files changed, 641 insertions(+)
create mode 100644 drivers/pinctrl/qcom/pinctrl-msm8226.c
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index ff1ee159dc..97ddc535fc 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -60,6 +60,15 @@ config PINCTRL_IPQ6018
Qualcomm Technologies Inc. IPQ6018 platform. Select this for
IPQ6018.
+config PINCTRL_MSM8226
+ tristate "Qualcomm 8226 pin controller driver"
+ depends on GPIOLIB && OF
+ select PINCTRL_MSM
+ help
+ This is the pinctrl, pinmux, pinconf and gpiolib driver for the
+ Qualcomm Technologies Inc TLMM block found on the Qualcomm
+ Technologies Inc MSM8226 platform.
+
config PINCTRL_MSM8660
tristate "Qualcomm 8660 pin controller driver"
depends on GPIOLIB && OF
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 061ec9fb65..9e3d9c91a4 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_IPQ4019) += pinctrl-ipq4019.o
obj-$(CONFIG_PINCTRL_IPQ8064) += pinctrl-ipq8064.o
obj-$(CONFIG_PINCTRL_IPQ8074) += pinctrl-ipq8074.o
obj-$(CONFIG_PINCTRL_IPQ6018) += pinctrl-ipq6018.o
+obj-$(CONFIG_PINCTRL_MSM8226) += pinctrl-msm8226.o
obj-$(CONFIG_PINCTRL_MSM8660) += pinctrl-msm8660.o
obj-$(CONFIG_PINCTRL_MSM8960) += pinctrl-msm8960.o
obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8226.c b/drivers/pinctrl/qcom/pinctrl-msm8226.c
new file mode 100644
index 0000000000..82010703c3
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-msm8226.c
@@ -0,0 +1,631 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "pinctrl-msm.h"
+
+static const struct pinctrl_pin_desc msm8226_pins[] = {
+ PINCTRL_PIN(0, "GPIO_0"),
+ PINCTRL_PIN(1, "GPIO_1"),
+ PINCTRL_PIN(2, "GPIO_2"),
+ PINCTRL_PIN(3, "GPIO_3"),
+ PINCTRL_PIN(4, "GPIO_4"),
+ PINCTRL_PIN(5, "GPIO_5"),
+ PINCTRL_PIN(6, "GPIO_6"),
+ PINCTRL_PIN(7, "GPIO_7"),
+ PINCTRL_PIN(8, "GPIO_8"),
+ PINCTRL_PIN(9, "GPIO_9"),
+ PINCTRL_PIN(10, "GPIO_10"),
+ PINCTRL_PIN(11, "GPIO_11"),
+ PINCTRL_PIN(12, "GPIO_12"),
+ PINCTRL_PIN(13, "GPIO_13"),
+ PINCTRL_PIN(14, "GPIO_14"),
+ PINCTRL_PIN(15, "GPIO_15"),
+ PINCTRL_PIN(16, "GPIO_16"),
+ PINCTRL_PIN(17, "GPIO_17"),
+ PINCTRL_PIN(18, "GPIO_18"),
+ PINCTRL_PIN(19, "GPIO_19"),
+ PINCTRL_PIN(20, "GPIO_20"),
+ PINCTRL_PIN(21, "GPIO_21"),
+ PINCTRL_PIN(22, "GPIO_22"),
+ PINCTRL_PIN(23, "GPIO_23"),
+ PINCTRL_PIN(24, "GPIO_24"),
+ PINCTRL_PIN(25, "GPIO_25"),
+ PINCTRL_PIN(26, "GPIO_26"),
+ PINCTRL_PIN(27, "GPIO_27"),
+ PINCTRL_PIN(28, "GPIO_28"),
+ PINCTRL_PIN(29, "GPIO_29"),
+ PINCTRL_PIN(30, "GPIO_30"),
+ PINCTRL_PIN(31, "GPIO_31"),
+ PINCTRL_PIN(32, "GPIO_32"),
+ PINCTRL_PIN(33, "GPIO_33"),
+ PINCTRL_PIN(34, "GPIO_34"),
+ PINCTRL_PIN(35, "GPIO_35"),
+ PINCTRL_PIN(36, "GPIO_36"),
+ PINCTRL_PIN(37, "GPIO_37"),
+ PINCTRL_PIN(38, "GPIO_38"),
+ PINCTRL_PIN(39, "GPIO_39"),
+ PINCTRL_PIN(40, "GPIO_40"),
+ PINCTRL_PIN(41, "GPIO_41"),
+ PINCTRL_PIN(42, "GPIO_42"),
+ PINCTRL_PIN(43, "GPIO_43"),
+ PINCTRL_PIN(44, "GPIO_44"),
+ PINCTRL_PIN(45, "GPIO_45"),
+ PINCTRL_PIN(46, "GPIO_46"),
+ PINCTRL_PIN(47, "GPIO_47"),
+ PINCTRL_PIN(48, "GPIO_48"),
+ PINCTRL_PIN(49, "GPIO_49"),
+ PINCTRL_PIN(50, "GPIO_50"),
+ PINCTRL_PIN(51, "GPIO_51"),
+ PINCTRL_PIN(52, "GPIO_52"),
+ PINCTRL_PIN(53, "GPIO_53"),
+ PINCTRL_PIN(54, "GPIO_54"),
+ PINCTRL_PIN(55, "GPIO_55"),
+ PINCTRL_PIN(56, "GPIO_56"),
+ PINCTRL_PIN(57, "GPIO_57"),
+ PINCTRL_PIN(58, "GPIO_58"),
+ PINCTRL_PIN(59, "GPIO_59"),
+ PINCTRL_PIN(60, "GPIO_60"),
+ PINCTRL_PIN(61, "GPIO_61"),
+ PINCTRL_PIN(62, "GPIO_62"),
+ PINCTRL_PIN(63, "GPIO_63"),
+ PINCTRL_PIN(64, "GPIO_64"),
+ PINCTRL_PIN(65, "GPIO_65"),
+ PINCTRL_PIN(66, "GPIO_66"),
+ PINCTRL_PIN(67, "GPIO_67"),
+ PINCTRL_PIN(68, "GPIO_68"),
+ PINCTRL_PIN(69, "GPIO_69"),
+ PINCTRL_PIN(70, "GPIO_70"),
+ PINCTRL_PIN(71, "GPIO_71"),
+ PINCTRL_PIN(72, "GPIO_72"),
+ PINCTRL_PIN(73, "GPIO_73"),
+ PINCTRL_PIN(74, "GPIO_74"),
+ PINCTRL_PIN(75, "GPIO_75"),
+ PINCTRL_PIN(76, "GPIO_76"),
+ PINCTRL_PIN(77, "GPIO_77"),
+ PINCTRL_PIN(78, "GPIO_78"),
+ PINCTRL_PIN(79, "GPIO_79"),
+ PINCTRL_PIN(80, "GPIO_80"),
+ PINCTRL_PIN(81, "GPIO_81"),
+ PINCTRL_PIN(82, "GPIO_82"),
+ PINCTRL_PIN(83, "GPIO_83"),
+ PINCTRL_PIN(84, "GPIO_84"),
+ PINCTRL_PIN(85, "GPIO_85"),
+ PINCTRL_PIN(86, "GPIO_86"),
+ PINCTRL_PIN(87, "GPIO_87"),
+ PINCTRL_PIN(88, "GPIO_88"),
+ PINCTRL_PIN(89, "GPIO_89"),
+ PINCTRL_PIN(90, "GPIO_90"),
+ PINCTRL_PIN(91, "GPIO_91"),
+ PINCTRL_PIN(92, "GPIO_92"),
+ PINCTRL_PIN(93, "GPIO_93"),
+ PINCTRL_PIN(94, "GPIO_94"),
+ PINCTRL_PIN(95, "GPIO_95"),
+ PINCTRL_PIN(96, "GPIO_96"),
+ PINCTRL_PIN(97, "GPIO_97"),
+ PINCTRL_PIN(98, "GPIO_98"),
+ PINCTRL_PIN(99, "GPIO_99"),
+ PINCTRL_PIN(100, "GPIO_100"),
+ PINCTRL_PIN(101, "GPIO_101"),
+ PINCTRL_PIN(102, "GPIO_102"),
+ PINCTRL_PIN(103, "GPIO_103"),
+ PINCTRL_PIN(104, "GPIO_104"),
+ PINCTRL_PIN(105, "GPIO_105"),
+ PINCTRL_PIN(106, "GPIO_106"),
+ PINCTRL_PIN(107, "GPIO_107"),
+ PINCTRL_PIN(108, "GPIO_108"),
+ PINCTRL_PIN(109, "GPIO_109"),
+ PINCTRL_PIN(110, "GPIO_110"),
+ PINCTRL_PIN(111, "GPIO_111"),
+ PINCTRL_PIN(112, "GPIO_112"),
+ PINCTRL_PIN(113, "GPIO_113"),
+ PINCTRL_PIN(114, "GPIO_114"),
+ PINCTRL_PIN(115, "GPIO_115"),
+ PINCTRL_PIN(116, "GPIO_116"),
+
+ PINCTRL_PIN(117, "SDC1_CLK"),
+ PINCTRL_PIN(118, "SDC1_CMD"),
+ PINCTRL_PIN(119, "SDC1_DATA"),
+ PINCTRL_PIN(120, "SDC2_CLK"),
+ PINCTRL_PIN(121, "SDC2_CMD"),
+ PINCTRL_PIN(122, "SDC2_DATA"),
+};
+
+#define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
+DECLARE_MSM_GPIO_PINS(0);
+DECLARE_MSM_GPIO_PINS(1);
+DECLARE_MSM_GPIO_PINS(2);
+DECLARE_MSM_GPIO_PINS(3);
+DECLARE_MSM_GPIO_PINS(4);
+DECLARE_MSM_GPIO_PINS(5);
+DECLARE_MSM_GPIO_PINS(6);
+DECLARE_MSM_GPIO_PINS(7);
+DECLARE_MSM_GPIO_PINS(8);
+DECLARE_MSM_GPIO_PINS(9);
+DECLARE_MSM_GPIO_PINS(10);
+DECLARE_MSM_GPIO_PINS(11);
+DECLARE_MSM_GPIO_PINS(12);
+DECLARE_MSM_GPIO_PINS(13);
+DECLARE_MSM_GPIO_PINS(14);
+DECLARE_MSM_GPIO_PINS(15);
+DECLARE_MSM_GPIO_PINS(16);
+DECLARE_MSM_GPIO_PINS(17);
+DECLARE_MSM_GPIO_PINS(18);
+DECLARE_MSM_GPIO_PINS(19);
+DECLARE_MSM_GPIO_PINS(20);
+DECLARE_MSM_GPIO_PINS(21);
+DECLARE_MSM_GPIO_PINS(22);
+DECLARE_MSM_GPIO_PINS(23);
+DECLARE_MSM_GPIO_PINS(24);
+DECLARE_MSM_GPIO_PINS(25);
+DECLARE_MSM_GPIO_PINS(26);
+DECLARE_MSM_GPIO_PINS(27);
+DECLARE_MSM_GPIO_PINS(28);
+DECLARE_MSM_GPIO_PINS(29);
+DECLARE_MSM_GPIO_PINS(30);
+DECLARE_MSM_GPIO_PINS(31);
+DECLARE_MSM_GPIO_PINS(32);
+DECLARE_MSM_GPIO_PINS(33);
+DECLARE_MSM_GPIO_PINS(34);
+DECLARE_MSM_GPIO_PINS(35);
+DECLARE_MSM_GPIO_PINS(36);
+DECLARE_MSM_GPIO_PINS(37);
+DECLARE_MSM_GPIO_PINS(38);
+DECLARE_MSM_GPIO_PINS(39);
+DECLARE_MSM_GPIO_PINS(40);
+DECLARE_MSM_GPIO_PINS(41);
+DECLARE_MSM_GPIO_PINS(42);
+DECLARE_MSM_GPIO_PINS(43);
+DECLARE_MSM_GPIO_PINS(44);
+DECLARE_MSM_GPIO_PINS(45);
+DECLARE_MSM_GPIO_PINS(46);
+DECLARE_MSM_GPIO_PINS(47);
+DECLARE_MSM_GPIO_PINS(48);
+DECLARE_MSM_GPIO_PINS(49);
+DECLARE_MSM_GPIO_PINS(50);
+DECLARE_MSM_GPIO_PINS(51);
+DECLARE_MSM_GPIO_PINS(52);
+DECLARE_MSM_GPIO_PINS(53);
+DECLARE_MSM_GPIO_PINS(54);
+DECLARE_MSM_GPIO_PINS(55);
+DECLARE_MSM_GPIO_PINS(56);
+DECLARE_MSM_GPIO_PINS(57);
+DECLARE_MSM_GPIO_PINS(58);
+DECLARE_MSM_GPIO_PINS(59);
+DECLARE_MSM_GPIO_PINS(60);
+DECLARE_MSM_GPIO_PINS(61);
+DECLARE_MSM_GPIO_PINS(62);
+DECLARE_MSM_GPIO_PINS(63);
+DECLARE_MSM_GPIO_PINS(64);
+DECLARE_MSM_GPIO_PINS(65);
+DECLARE_MSM_GPIO_PINS(66);
+DECLARE_MSM_GPIO_PINS(67);
+DECLARE_MSM_GPIO_PINS(68);
+DECLARE_MSM_GPIO_PINS(69);
+DECLARE_MSM_GPIO_PINS(70);
+DECLARE_MSM_GPIO_PINS(71);
+DECLARE_MSM_GPIO_PINS(72);
+DECLARE_MSM_GPIO_PINS(73);
+DECLARE_MSM_GPIO_PINS(74);
+DECLARE_MSM_GPIO_PINS(75);
+DECLARE_MSM_GPIO_PINS(76);
+DECLARE_MSM_GPIO_PINS(77);
+DECLARE_MSM_GPIO_PINS(78);
+DECLARE_MSM_GPIO_PINS(79);
+DECLARE_MSM_GPIO_PINS(80);
+DECLARE_MSM_GPIO_PINS(81);
+DECLARE_MSM_GPIO_PINS(82);
+DECLARE_MSM_GPIO_PINS(83);
+DECLARE_MSM_GPIO_PINS(84);
+DECLARE_MSM_GPIO_PINS(85);
+DECLARE_MSM_GPIO_PINS(86);
+DECLARE_MSM_GPIO_PINS(87);
+DECLARE_MSM_GPIO_PINS(88);
+DECLARE_MSM_GPIO_PINS(89);
+DECLARE_MSM_GPIO_PINS(90);
+DECLARE_MSM_GPIO_PINS(91);
+DECLARE_MSM_GPIO_PINS(92);
+DECLARE_MSM_GPIO_PINS(93);
+DECLARE_MSM_GPIO_PINS(94);
+DECLARE_MSM_GPIO_PINS(95);
+DECLARE_MSM_GPIO_PINS(96);
+DECLARE_MSM_GPIO_PINS(97);
+DECLARE_MSM_GPIO_PINS(98);
+DECLARE_MSM_GPIO_PINS(99);
+DECLARE_MSM_GPIO_PINS(100);
+DECLARE_MSM_GPIO_PINS(101);
+DECLARE_MSM_GPIO_PINS(102);
+DECLARE_MSM_GPIO_PINS(103);
+DECLARE_MSM_GPIO_PINS(104);
+DECLARE_MSM_GPIO_PINS(105);
+DECLARE_MSM_GPIO_PINS(106);
+DECLARE_MSM_GPIO_PINS(107);
+DECLARE_MSM_GPIO_PINS(108);
+DECLARE_MSM_GPIO_PINS(109);
+DECLARE_MSM_GPIO_PINS(110);
+DECLARE_MSM_GPIO_PINS(111);
+DECLARE_MSM_GPIO_PINS(112);
+DECLARE_MSM_GPIO_PINS(113);
+DECLARE_MSM_GPIO_PINS(114);
+DECLARE_MSM_GPIO_PINS(115);
+DECLARE_MSM_GPIO_PINS(116);
+
+static const unsigned int sdc1_clk_pins[] = { 117 };
+static const unsigned int sdc1_cmd_pins[] = { 118 };
+static const unsigned int sdc1_data_pins[] = { 119 };
+static const unsigned int sdc2_clk_pins[] = { 120 };
+static const unsigned int sdc2_cmd_pins[] = { 121 };
+static const unsigned int sdc2_data_pins[] = { 122 };
+
+#define FUNCTION(fname) \
+ [MSM_MUX_##fname] = { \
+ .name = #fname, \
+ .groups = fname##_groups, \
+ .ngroups = ARRAY_SIZE(fname##_groups), \
+ }
+
+#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \
+ { \
+ .name = "gpio" #id, \
+ .pins = gpio##id##_pins, \
+ .npins = ARRAY_SIZE(gpio##id##_pins), \
+ .funcs = (int[]){ \
+ MSM_MUX_gpio, \
+ MSM_MUX_##f1, \
+ MSM_MUX_##f2, \
+ MSM_MUX_##f3, \
+ MSM_MUX_##f4, \
+ MSM_MUX_##f5, \
+ MSM_MUX_##f6, \
+ MSM_MUX_##f7 \
+ }, \
+ .nfuncs = 8, \
+ .ctl_reg = 0x1000 + 0x10 * id, \
+ .io_reg = 0x1004 + 0x10 * id, \
+ .intr_cfg_reg = 0x1008 + 0x10 * id, \
+ .intr_status_reg = 0x100c + 0x10 * id, \
+ .intr_target_reg = 0x1008 + 0x10 * id, \
+ .mux_bit = 2, \
+ .pull_bit = 0, \
+ .drv_bit = 6, \
+ .oe_bit = 9, \
+ .in_bit = 0, \
+ .out_bit = 1, \
+ .intr_enable_bit = 0, \
+ .intr_status_bit = 0, \
+ .intr_target_bit = 5, \
+ .intr_target_kpss_val = 4, \
+ .intr_raw_status_bit = 4, \
+ .intr_polarity_bit = 1, \
+ .intr_detection_bit = 2, \
+ .intr_detection_width = 2, \
+ }
+
+#define SDC_PINGROUP(pg_name, ctl, pull, drv) \
+ { \
+ .name = #pg_name, \
+ .pins = pg_name##_pins, \
+ .npins = ARRAY_SIZE(pg_name##_pins), \
+ .ctl_reg = ctl, \
+ .io_reg = 0, \
+ .intr_cfg_reg = 0, \
+ .intr_status_reg = 0, \
+ .intr_target_reg = 0, \
+ .mux_bit = -1, \
+ .pull_bit = pull, \
+ .drv_bit = drv, \
+ .oe_bit = -1, \
+ .in_bit = -1, \
+ .out_bit = -1, \
+ .intr_enable_bit = -1, \
+ .intr_status_bit = -1, \
+ .intr_target_bit = -1, \
+ .intr_target_kpss_val = -1, \
+ .intr_raw_status_bit = -1, \
+ .intr_polarity_bit = -1, \
+ .intr_detection_bit = -1, \
+ .intr_detection_width = -1, \
+ }
+
+/*
+ * TODO: Add the rest of the possible functions and fill out
+ * the pingroup table below.
+ */
+enum msm8226_functions {
+ MSM_MUX_gpio,
+ MSM_MUX_cci_i2c0,
+ MSM_MUX_blsp_i2c1,
+ MSM_MUX_blsp_i2c2,
+ MSM_MUX_blsp_i2c3,
+ MSM_MUX_blsp_i2c5,
+ MSM_MUX_blsp_spi1,
+ MSM_MUX_blsp_spi2,
+ MSM_MUX_blsp_spi3,
+ MSM_MUX_blsp_spi5,
+ MSM_MUX_blsp_uart1,
+ MSM_MUX_blsp_uart2,
+ MSM_MUX_blsp_uart3,
+ MSM_MUX_blsp_uart5,
+ MSM_MUX_blsp_uim1,
+ MSM_MUX_blsp_uim2,
+ MSM_MUX_blsp_uim3,
+ MSM_MUX_blsp_uim5,
+ MSM_MUX_cam_mclk0,
+ MSM_MUX_cam_mclk1,
+ MSM_MUX_wlan,
+ MSM_MUX_NA,
+};
+
+static const char * const gpio_groups[] = {
+ "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
+ "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
+ "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
+ "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
+ "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
+ "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
+ "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
+ "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
+ "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
+ "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
+ "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
+ "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
+ "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
+ "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
+ "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
+ "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
+};
+
+static const char * const blsp_uart1_groups[] = {
+ "gpio0", "gpio1", "gpio2", "gpio3"
+};
+
+static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" };
+static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" };
+static const char * const blsp_spi1_groups[] = {
+ "gpio0", "gpio1", "gpio2", "gpio3"
+};
+
+static const char * const blsp_uart2_groups[] = {
+ "gpio4", "gpio5", "gpio6", "gpio7"
+};
+
+static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" };
+static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" };
+static const char * const blsp_spi2_groups[] = {
+ "gpio4", "gpio5", "gpio6", "gpio7"
+};
+
+static const char * const blsp_uart3_groups[] = {
+ "gpio8", "gpio9", "gpio10", "gpio11"
+};
+
+static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" };
+static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" };
+static const char * const blsp_spi3_groups[] = {
+ "gpio8", "gpio9", "gpio10", "gpio11"
+};
+
+static const char * const blsp_uart5_groups[] = {
+ "gpio16", "gpio17", "gpio18", "gpio19"
+};
+
+static const char * const blsp_uim5_groups[] = { "gpio16", "gpio17" };
+static const char * const blsp_i2c5_groups[] = { "gpio18", "gpio19" };
+static const char * const blsp_spi5_groups[] = {
+ "gpio16", "gpio17", "gpio18", "gpio19"
+};
+
+static const char * const cci_i2c0_groups[] = { "gpio29", "gpio30" };
+
+static const char * const cam_mclk0_groups[] = { "gpio26" };
+static const char * const cam_mclk1_groups[] = { "gpio27" };
+
+static const char * const wlan_groups[] = {
+ "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
+};
+
+static const struct msm_function msm8226_functions[] = {
+ FUNCTION(gpio),
+ FUNCTION(cci_i2c0),
+ FUNCTION(blsp_uim1),
+ FUNCTION(blsp_uim2),
+ FUNCTION(blsp_uim3),
+ FUNCTION(blsp_uim5),
+ FUNCTION(blsp_i2c1),
+ FUNCTION(blsp_i2c2),
+ FUNCTION(blsp_i2c3),
+ FUNCTION(blsp_i2c5),
+ FUNCTION(blsp_spi1),
+ FUNCTION(blsp_spi2),
+ FUNCTION(blsp_spi3),
+ FUNCTION(blsp_spi5),
+ FUNCTION(blsp_uart1),
+ FUNCTION(blsp_uart2),
+ FUNCTION(blsp_uart3),
+ FUNCTION(blsp_uart5),
+ FUNCTION(cam_mclk0),
+ FUNCTION(cam_mclk1),
+ FUNCTION(wlan),
+};
+
+static const struct msm_pingroup msm8226_groups[] = {
+ PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
+ PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
+ PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
+ PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
+ PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
+ PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
+ PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
+ PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
+ PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA),
+ PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA),
+ PINGROUP(10, blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
+ PINGROUP(11, blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
+ PINGROUP(12, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(13, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(14, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(15, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(16, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
+ PINGROUP(17, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
+ PINGROUP(18, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
+ PINGROUP(19, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
+ PINGROUP(20, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(21, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(22, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(23, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(24, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(25, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(26, cam_mclk0, NA, NA, NA, NA, NA, NA),
+ PINGROUP(27, cam_mclk1, NA, NA, NA, NA, NA, NA),
+ PINGROUP(28, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(29, cci_i2c0, NA, NA, NA, NA, NA, NA),
+ PINGROUP(30, cci_i2c0, NA, NA, NA, NA, NA, NA),
+ PINGROUP(31, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(32, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(33, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(34, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(35, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(36, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(37, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(38, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(39, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(40, wlan, NA, NA, NA, NA, NA, NA),
+ PINGROUP(41, wlan, NA, NA, NA, NA, NA, NA),
+ PINGROUP(42, wlan, NA, NA, NA, NA, NA, NA),
+ PINGROUP(43, wlan, NA, NA, NA, NA, NA, NA),
+ PINGROUP(44, wlan, NA, NA, NA, NA, NA, NA),
+ PINGROUP(45, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(46, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(47, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(48, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(49, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(50, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(51, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(52, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(53, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(54, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(55, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(56, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(57, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(58, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(59, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(60, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(61, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(62, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(63, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(64, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(65, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(66, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(67, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(68, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(69, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(70, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(71, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(72, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(73, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(74, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(75, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(76, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(77, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(78, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(79, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(80, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(81, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(82, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(83, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(84, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(85, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(86, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(87, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(88, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(89, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(90, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(91, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(92, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(93, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(94, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(95, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(96, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(97, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(98, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(99, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(100, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(101, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(102, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(103, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(104, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(105, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(106, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(107, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(108, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(109, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(110, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(111, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(112, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(113, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(114, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(115, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(116, NA, NA, NA, NA, NA, NA, NA),
+ SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
+ SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
+ SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
+ SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
+ SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
+ SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
+};
+
+#define NUM_GPIO_PINGROUPS 117
+
+static const struct msm_pinctrl_soc_data msm8226_pinctrl = {
+ .pins = msm8226_pins,
+ .npins = ARRAY_SIZE(msm8226_pins),
+ .functions = msm8226_functions,
+ .nfunctions = ARRAY_SIZE(msm8226_functions),
+ .groups = msm8226_groups,
+ .ngroups = ARRAY_SIZE(msm8226_groups),
+ .ngpios = NUM_GPIO_PINGROUPS,
+};
+
+static int msm8226_pinctrl_probe(struct platform_device *pdev)
+{
+ return msm_pinctrl_probe(pdev, &msm8226_pinctrl);
+}
+
+static const struct of_device_id msm8226_pinctrl_of_match[] = {
+ { .compatible = "qcom,msm8226-pinctrl", },
+ { },
+};
+
+static struct platform_driver msm8226_pinctrl_driver = {
+ .driver = {
+ .name = "msm8226-pinctrl",
+ .of_match_table = msm8226_pinctrl_of_match,
+ },
+ .probe = msm8226_pinctrl_probe,
+ .remove = msm_pinctrl_remove,
+};
+
+static int __init msm8226_pinctrl_init(void)
+{
+ return platform_driver_register(&msm8226_pinctrl_driver);
+}
+arch_initcall(msm8226_pinctrl_init);
+
+static void __exit msm8226_pinctrl_exit(void)
+{
+ platform_driver_unregister(&msm8226_pinctrl_driver);
+}
+module_exit(msm8226_pinctrl_exit);
+
+MODULE_AUTHOR("Bartosz Dudziak <bartosz.dudziak@snejp.pl>");
+MODULE_DESCRIPTION("Qualcomm MSM8226 pinctrl driver");
+MODULE_LICENSE("GPL v2");
+MODULE_DEVICE_TABLE(of, msm8226_pinctrl_of_match);
+
--
2.25.1
^ permalink raw reply related
* [dhowells-fs:keys-acl 4/5] fs/crypto/keyring.c:145:32: sparse: sparse: not enough arguments for function keyring_search
From: kernel test robot @ 2020-07-16 21:30 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3210 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git keys-acl
head: 2a3c3edfc979691a7dc4733da827f508da90995a
commit: d1aa67ba9c4d53ddb95f6b5ec73968287df65fb4 [4/5] keys: Split the search perms between KEY_NEED_USE and KEY_NEED_SEARCH
config: arc-randconfig-s032-20200716 (attached as .config)
compiler: arc-elf-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-49-g707c5017-dirty
git checkout d1aa67ba9c4d53ddb95f6b5ec73968287df65fb4
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> fs/crypto/keyring.c:145:32: sparse: sparse: not enough arguments for function keyring_search
vim +145 fs/crypto/keyring.c
23c688b54016ee Eric Biggers 2019-08-04 133
23c688b54016ee Eric Biggers 2019-08-04 134 /* Search ->s_master_keys or ->mk_users */
22d94f493bfb40 Eric Biggers 2019-08-04 135 static struct key *search_fscrypt_keyring(struct key *keyring,
22d94f493bfb40 Eric Biggers 2019-08-04 136 struct key_type *type,
22d94f493bfb40 Eric Biggers 2019-08-04 137 const char *description)
22d94f493bfb40 Eric Biggers 2019-08-04 138 {
22d94f493bfb40 Eric Biggers 2019-08-04 139 /*
22d94f493bfb40 Eric Biggers 2019-08-04 140 * We need to mark the keyring reference as "possessed" so that we
22d94f493bfb40 Eric Biggers 2019-08-04 141 * acquire permission to search it, via the KEY_POS_SEARCH permission.
22d94f493bfb40 Eric Biggers 2019-08-04 142 */
22d94f493bfb40 Eric Biggers 2019-08-04 143 key_ref_t keyref = make_key_ref(keyring, true /* possessed */);
22d94f493bfb40 Eric Biggers 2019-08-04 144
22d94f493bfb40 Eric Biggers 2019-08-04 @145 keyref = keyring_search(keyref, type, description, false);
22d94f493bfb40 Eric Biggers 2019-08-04 146 if (IS_ERR(keyref)) {
22d94f493bfb40 Eric Biggers 2019-08-04 147 if (PTR_ERR(keyref) == -EAGAIN || /* not found */
22d94f493bfb40 Eric Biggers 2019-08-04 148 PTR_ERR(keyref) == -EKEYREVOKED) /* recently invalidated */
22d94f493bfb40 Eric Biggers 2019-08-04 149 keyref = ERR_PTR(-ENOKEY);
22d94f493bfb40 Eric Biggers 2019-08-04 150 return ERR_CAST(keyref);
22d94f493bfb40 Eric Biggers 2019-08-04 151 }
22d94f493bfb40 Eric Biggers 2019-08-04 152 return key_ref_to_ptr(keyref);
22d94f493bfb40 Eric Biggers 2019-08-04 153 }
22d94f493bfb40 Eric Biggers 2019-08-04 154
:::::: The code at line 145 was first introduced by commit
:::::: 22d94f493bfb408fdd764f7b1d0363af2122fba5 fscrypt: add FS_IOC_ADD_ENCRYPTION_KEY ioctl
:::::: TO: Eric Biggers <ebiggers@google.com>
:::::: CC: Eric Biggers <ebiggers@google.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 23635 bytes --]
^ permalink raw reply
* [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add msm8226 pinctrl bindings
From: Bartosz Dudziak @ 2020-07-16 20:55 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Bartosz Dudziak, Andy Gross, Linus Walleij, Rob Herring,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
In-Reply-To: <20200716205530.22910-1-bartosz.dudziak@snejp.pl>
Add device tree binding Documentation details for Qualcomm msm8226
pinctrl driver.
- Bindings documentation was based on qcom,ipq6018-pinctrl.yaml added by
Sricharan R <sricharan@codeaurora.org> and then modified for msm8226
content
Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
---
.../pinctrl/qcom,msm8226-pinctrl.yaml | 132 ++++++++++++++++++
1 file changed, 132 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
new file mode 100644
index 0000000000..1f0f5757f9
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
@@ -0,0 +1,132 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. MSM8226 TLMM block
+
+maintainers:
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description: |
+ This binding describes the Top Level Mode Multiplexer block found in the
+ MSM8226 platform.
+
+properties:
+ compatible:
+ const: qcom,msm8226-pinctrl
+
+ reg:
+ description: Specifies the base address and size of the TLMM register space
+ maxItems: 1
+
+ interrupts:
+ description: Specifies the TLMM summary IRQ
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ description: Specifies the PIN numbers and Flags, as defined in
+ include/dt-bindings/interrupt-controller/irq.h
+ const: 2
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ description: Specifying the pin number and flags, as defined in
+ include/dt-bindings/gpio/gpio.h
+ const: 2
+
+ gpio-ranges:
+ maxItems: 1
+
+ gpio-reserved-ranges:
+ maxItems: 1
+
+#PIN CONFIGURATION NODES
+patternProperties:
+ '-pins$':
+ type: object
+ description:
+ Pinctrl node's client devices use subnodes for desired pin configuration.
+ Client device subnodes use below standard properties.
+ $ref: "/schemas/pinctrl/pincfg-node.yaml"
+
+ properties:
+ pins:
+ description:
+ List of gpio pins affected by the properties specified in this
+ subnode.
+ items:
+ oneOf:
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
+ - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
+ minItems: 1
+ maxItems: 36
+
+ function:
+ description:
+ Specify the alternative function to be configured for the specified
+ pins. Functions are only valid for gpio pins.
+ enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,
+ blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1,
+ blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
+ blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]
+
+ drive-strength:
+ enum: [2, 4, 6, 8, 10, 12, 14, 16]
+ default: 2
+ description:
+ Selects the drive strength for the specified pins, in mA.
+
+ bias-pull-down: true
+
+ bias-pull-up: true
+
+ bias-disable: true
+
+ output-high: true
+
+ output-low: true
+
+ required:
+ - pins
+ - function
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+ - gpio-controller
+ - '#gpio-cells'
+ - gpio-ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ msmgpio: pinctrl@fd510000 {
+ compatible = "qcom,msm8226-pinctrl";
+ reg = <0xfd510000 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&msmgpio 0 0 117>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+
+ serial-pins {
+ pins = "gpio8", "gpio9";
+ function = "blsp_uart3";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
--
2.25.1
^ permalink raw reply related
* [PATCH v2 0/2] Qualcomm MSM8226 TLMM binding and driver
From: Bartosz Dudziak @ 2020-07-16 20:55 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Bartosz Dudziak, Andy Gross, Linus Walleij, Rob Herring,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
Binding and driver for the Qualcomm MSM8226 TLMM pinctrl block
Changes in v2:
- Changed node name pattern to '-pins$' in qcom,msm8226-pinctrl.yaml binding
- Expanded example in yaml binding with a 'serial-pins' node sample
Bartosz Dudziak (2):
dt-bindings: pinctrl: qcom: Add msm8226 pinctrl bindings
pinctrl: qcom: Add msm8226 pinctrl driver.
.../pinctrl/qcom,msm8226-pinctrl.yaml | 132 ++++
drivers/pinctrl/qcom/Kconfig | 9 +
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-msm8226.c | 631 ++++++++++++++++++
4 files changed, 773 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
create mode 100644 drivers/pinctrl/qcom/pinctrl-msm8226.c
--
2.25.1
^ permalink raw reply
* [Buildroot] [PATCH 1/1] package/lm-sensors: always pass TARGET_CONFIGURE_OPTS
From: Thomas Petazzoni @ 2020-07-16 21:29 UTC (permalink / raw)
To: buildroot
In-Reply-To: <20200713093729.203008-1-fontaine.fabrice@gmail.com>
On Mon, 13 Jul 2020 11:37:29 +0200
Fabrice Fontaine <fontaine.fabrice@gmail.com> wrote:
> lm-sensors dropped MACHINE variable since version 3.6.0 and
> https://github.com/lm-sensors/lm-sensors/commit/0863eff8fa1d32797e3aec19672878aff893b0ae
> instead it uses $(CC) -dumpmachine to guess the architecture
>
> However, as $(TARGET_CONFIGURE_OPTS) is only passed to build step and
> not to install steps, this result in some binaries being built for the
> host during install step and raising a build failure on some autobuilders
>
> Fixes:
> - http://autobuild.buildroot.org/results/0180989afdd9272ecd5010a787931e0b10a6cdcf
>
> Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
> ---
> package/lm-sensors/lm-sensors.mk | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Applied to master, thanks.
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [RFC PATCH net-next 6/6] ice: implement devlink parameters to control flash update
From: Jacob Keller @ 2020-07-16 21:29 UTC (permalink / raw)
To: Jakub Kicinski; +Cc: netdev, Jiri Pirko, Jesse Brandeburg, Tom Herbert
In-Reply-To: <d8f88c91-57fa-9ca4-1838-5f63b6613c59@intel.com>
On 7/15/2020 5:21 PM, Jacob Keller wrote:
>
>
> On 7/15/2020 4:23 PM, Jakub Kicinski wrote:
>> On Wed, 15 Jul 2020 14:41:04 -0700 Jacob Keller wrote:
>>> To summarize this discussion, the next spin will have the following changes:
>>>
>>> 1) remove all parameters except for the preservation_level. Both
>>> ignore_pending_flash_update and allow_downgrade_on_flash_update will be
>>> removed and change the default behavior to the most accepting case:
>>> updates will always be tried even if firmware says its a downgrade, and
>>> we will always cancel a pending update. We will now expect user space
>>> tools to be aware of this and handle the equivalent options themselves
>>> if they desire.
>>>
>>> 2) reset_after_flash_update will be removed, and we will replace it with
>>> a new interface, perhaps like the devlink reset command suggested in
>>> another thread.
>>>
>>> 3) preservation_level will remain, but I have updated the documentation
>>> slightly.
>>
>> Okay, then. But let's make it a parameter to the flash update operation
>> (extend the uAPI), rather than a devlink param, shall we?
>>
>
> Ok, that seems reasonable. Ofcourse we'll need to find something generic
> enough that it can be re-used and isn't driver specific.
>
Hi Jakub,
I think I have something that will be more clear and will be sending a
new RFC with the change this afternoon:
an extension to the DEVLINK_CMD_FLASH_UPDATE with a new parameter,
"overwrite" with these values:
a) "nothing" (or maybe, "firmware-only" or "binary-only"?, need a way to
clarify difference between settings/vital data and firmware program
binary) will request that we do not overwrite any settings or fields.
This is equivalent to the "PRESERVE_ALL" I had in the original proposal,
where we will maintain all settings and all vital data, but update the
firmware binary.
b) "settings" will request that the firmware overwrite all the settings
fields with the contents from the new image. However, vital data such as
the PCI Serial ID, VPD section, MAC Addresses, and similar "static" data
will be kept (not overwritten). This is the same as the
"PRESERVE_LIMITED" option I had in the original proposal
c) "all" or "everything" will request that firmware overwrite all
contents of the image. This means all settings and all vital data will
be overwritten by the contents in the new image.
d) if we need it, a "default" that would be the current behavior of
doing whatever the driver default is? (since it's not clear to me what
other implementations do but perhaps they all behavior as either
"nothing" or "all"?
I think I agree that "factory" settings doesn't really belong here, and
I will try to push for finding an alternative way to allow access to
that behavior. If we wanted it we could use "from_factory" to request
that we overwrite the settings and vital data "from" the factory
portion, but I think that is pushing the boundary here a bit...
I am aiming to have a new patch up with this proposal
Thanks,
Jake
^ permalink raw reply
* Re: [PATCH bpf-next 2/5] bpf: allow for tailcalls in BPF subprograms
From: Daniel Borkmann @ 2020-07-16 21:29 UTC (permalink / raw)
To: Maciej Fijalkowski, ast; +Cc: bpf, netdev, bjorn.topel, magnus.karlsson
In-Reply-To: <20200715233634.3868-3-maciej.fijalkowski@intel.com>
On 7/16/20 1:36 AM, Maciej Fijalkowski wrote:
> Relax verifier's restriction that was meant to forbid tailcall usage
> when subprog count was higher than 1.
>
> Also, do not max out the stack depth of program that utilizes tailcalls.
>
> Signed-off-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com>
> ---
> kernel/bpf/verifier.c | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
> index 3c1efc9d08fd..6481342b31ba 100644
> --- a/kernel/bpf/verifier.c
> +++ b/kernel/bpf/verifier.c
> @@ -4172,10 +4172,6 @@ static int check_map_func_compatibility(struct bpf_verifier_env *env,
> case BPF_FUNC_tail_call:
> if (map->map_type != BPF_MAP_TYPE_PROG_ARRAY)
> goto error;
> - if (env->subprog_cnt > 1) {
> - verbose(env, "tail_calls are not allowed in programs with bpf-to-bpf calls\n");
> - return -EINVAL;
> - }
> break;
> case BPF_FUNC_perf_event_read:
> case BPF_FUNC_perf_event_output:
> @@ -10252,7 +10248,6 @@ static int fixup_bpf_calls(struct bpf_verifier_env *env)
> * the program array.
> */
> prog->cb_access = 1;
> - env->prog->aux->stack_depth = MAX_BPF_STACK;
> env->prog->aux->max_pkt_offset = MAX_PACKET_OFF;
>
> /* mark bpf_tail_call as different opcode to avoid
Also, isn't this broken when JIT is not used (as in stack oob access)?
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