From: "Alex Bennée" <alex.bennee@linaro.org>
To: Claudio Fontana <claudio.fontana@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
patches@linaro.org, Michael Matz <matz@suse.de>,
qemu-devel@nongnu.org, Alexander Graf <agraf@suse.de>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [RFC] target-arm: provide skeleton for a64 insn decoding
Date: Tue, 12 Nov 2013 10:59:43 +0000 [thread overview]
Message-ID: <p1siv16g2o.fsf@linaro.org> (raw)
In-Reply-To: <1384182837-5925-1-git-send-email-claudio.fontana@linaro.org>
claudio.fontana@linaro.org writes:
> provide a skeleton for a64 instruction decoding in translate-a64.c,
> by dividing instructions into the classes defined by the
> ARM Architecture Reference Manual(DDI0487A_a) C3
>
> Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
> ---
> The following patch has been started during Linaro Connect
> by me and Alex Bennee.
<snip>
With the proviso of Richard's decode comment you can add:
Reviewed-by: Alex Bennée <alex@bennee.com>
Signed-of-by: Alex Bennée <alex@bennee.com>
--
Alex Bennée
prev parent reply other threads:[~2013-11-12 10:59 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-11 15:13 [Qemu-devel] [RFC] target-arm: provide skeleton for a64 insn decoding Claudio Fontana
2013-11-11 19:25 ` Richard Henderson
2013-11-12 10:59 ` Alex Bennée [this message]
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