From: sashiko-bot@kernel.org
To: "Devendra K Verma" <devverma@amd.com>
Cc: Frank.Li@kernel.org, linux-pci@vger.kernel.org,
dmaengine@vger.kernel.org, vkoul@kernel.org
Subject: Re: [PATCH RESEND v2 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position
Date: Wed, 07 Oct 2026 10:22:15 +0000 [thread overview]
Message-ID: <sashiko-outbox-162855@kernel.org> (raw)
In-Reply-To: <20261007100336.4009004-2-devverma@amd.com>
> Sort register field macros by bit position to improve readability.
> No functional change.
>
> Signed-off-by: Devendra K Verma <devverma@amd.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261007100336.4009004-2-devverma@amd.com?part=1
next prev parent reply other threads:[~2026-10-07 10:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 10:03 [PATCH RESEND v2 0/2] Macro Ordering and Typo Correction Devendra K Verma
2026-10-07 10:03 ` [PATCH RESEND v2 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position Devendra K Verma
2026-10-07 10:22 ` sashiko-bot [this message]
2026-10-07 10:03 ` [PATCH RESEND v2 2/2] dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment Devendra K Verma
2026-10-07 10:19 ` sashiko-bot
2026-10-07 10:53 ` [PATCH RESEND v2 0/2] Macro Ordering and Typo Correction Vinod Koul
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