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* [PATCH RESEND v2 0/2] Macro Ordering and Typo Correction
@ 2026-10-07 10:03 Devendra K Verma
  2026-10-07 10:03 ` [PATCH RESEND v2 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position Devendra K Verma
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Devendra K Verma @ 2026-10-07 10:03 UTC (permalink / raw)
  To: mani, vkoul, frank.li, den
  Cc: dmaengine, linux-pci, linux-kernel, michal.simek, devverma

These are minor and cosmetic changes.

o If the macros declaring the bit positions of a register
  are in order then it provides a good view. Corrected
  the ordering for once such register.
o Corrected the typo under the IP related data struct to
  have the correct name under respective IP structs.

Previous reviewed-by tags were part of the following
review:

https://lore.kernel.org/all/aoW7vxy2lpXEbmRq@SMW015318/
https://lore.kernel.org/all/dx5jvko7ygrqugzkt3k74l3d7lk7iauikmxrzuhvn2b4bdv5ub@s2l6zl3alx3z/#t

Devendra K Verma (2):
  dmaengine: dw-edma: Sort Register Field Macros by Bit Position
  dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment

 drivers/dma/dw-edma/dw-edma-pcie.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
2.43.0


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2026-10-07 10:53 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-07 10:03 [PATCH RESEND v2 0/2] Macro Ordering and Typo Correction Devendra K Verma
2026-10-07 10:03 ` [PATCH RESEND v2 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position Devendra K Verma
2026-10-07 10:22   ` sashiko-bot
2026-10-07 10:03 ` [PATCH RESEND v2 2/2] dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment Devendra K Verma
2026-10-07 10:19   ` sashiko-bot
2026-10-07 10:53 ` [PATCH RESEND v2 0/2] Macro Ordering and Typo Correction Vinod Koul

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