Re: [PATCH 1/3] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Nord cfg_ahb clock

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: phy: qmp-usb43dp: missing minItems constraint for cfg_ahb clock
--

commit 764bc6428baefa52be476d672ac87df285751a59
Author: Shawn Guo <shengchao.guo@oss.qualcomm.com>

dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Nord cfg_ahb clock

This commit adds the Nord compatible string to the qmp-usb43dp PHY binding.
It includes Nord in the conditional blocks that require a fifth cfg_ahb clock.

> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> index 13e64fe510b8f..809bd4e1090a7 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> @@ -209,6 +209,7 @@ allOf:
>          compatible:
>            contains:
>              enum:
> +              - qcom,nord-qmp-usb3-dp-phy
>                - qcom,sc7180-qmp-usb3-dp-phy
>                - qcom,sdm845-qmp-usb3-dp-phy
>      then:
>        properties:
>          clocks:
>            maxItems: 5
>          clock-names:
>            items:
>              - const: aux
>              - const: ref
>              - const: com_aux
>              - const: usb3_pipe
>              - const: cfg_ahb

[Severity: Low]
The conditional block for platforms that require the fifth cfg_ahb clock
defines a 5-item list for clock-names, but it fails to specify minItems: 5 
for clocks or clock-names.

Because the global schema allows minItems: 4, a device tree providing only
4 clocks will pass schema validation.

The driver uses devm_clk_bulk_get_optional() for these clocks, so it won't
fail to probe. However, as stated in the commit message, the cfg_ahb clock
is strictly required to gate the AHB2PHY bridge and access PHY registers.
Accessing unclocked registers will lead to a system hang or PHY failure.

Should this block include minItems: 5 to correctly enforce the presence of
the 5th clock? A follow-up check through the series ends shows this was not
corrected.

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261008015017.3359804-1-shengchao.guo@oss.qualcomm.com?part=1

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